For Broadcom STB PCIe HW. The 7425 and 7435 are MIPs-based SOCs. Not much
difference between the two for the DT properties except that they have
slightly different PCIe interrupt assignments.
Signed-off-by: Jim Quinlan <jim2101024@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The module is now supported, enable it.
Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
After getting the regmap size from the device tree we should
reduce the ranges to the really available registers. This
allows to read only existing registers from the debug fs
and makes the regmap check out-of-bounds access.
For the jz4780 we have done this already.
Suggested-for: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
We need to hook up
* HDMI connector
* HDMI power regulator
* JZ4780_CLK_HDMI @ 27 MHz
* DDC pinmux
* HDMI and LCDC endpoint connections
Signed-off-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
A specialisation of the generic Synopsys HDMI driver is employed for
JZ4780 HDMI support. This requires a new driver, plus device tree and
configuration modifications.
Here we add jz4780 device tree setup.
Signed-off-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Tidy up a bit the tree, by prefixing all include/dt-bindings/clock/ files
related to Ingenic SoCs with 'ingenic,'.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211016133322.40771-1-paul@crapouillou.net
- removed support for Netlogic SOCs
- fixes and cleanup
-----BEGIN PGP SIGNATURE-----
iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmGE6OEaHHRzYm9nZW5k
QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHA3zQ//Ze+qwFP53nl21DTx+viH
1wvoy+rMa95Udrzf8/Mp8qskZG9Jq2UKskYeWPq2cgMD2X7JSh8b0Xz3O9K8XxKD
a21jGoY61np7HHl9XOhYD7A87DvrHS2VrYh6IiN9tqV5tK0x7uzYnH0pJDqhU4im
0zDtnnvVDvUPU9EDEusD8xPaKHquQXEd0JyNXLo+hvuwc1RZ2VckjE8dsS3I0kn2
2Sz4j7K/e1hB85vE1LXuuU8cL8IuMpDxkDnK6STA7mzNBPAdqnClnKuB70zjnwp0
lCjZBWmSeVIqCEdoerB7wgn1g+8k/1TBbCoqtN2poQMiLBUKFbfv5gXg3Uei0SDa
Q/c3od8Mr2jn39EbG5/cf0FOyuKtLDFvGXASaSuW7Xhvn3ue4I6MrKh2bb5nimXP
3ShvsvYfoc2cGSz7Pt7tOCP6WHFlIi+9wjZEr8XZlGhJE6BgE4CbJHA3/Q4VAl+Q
4whAcNldSX+sVS/dSHPo0s/9eLCPm1EWulD8mBpvj27cmeUVhqXCIY34Df7aIDBi
F1+rFxt6/uDTDEJp3PkwkmVJuyzivN5CcXl4xks/MaJ/8BgYZVRbafyGlJxm+MMf
ufAXvfiwZhyVg4cHajtMiFO2m1itmoyg3CvIffiVZMbegqy4Dsu+ZIf0csPmGheK
88AfVKBfrRwrJG1yK2iX/Dw=
=mvn0
-----END PGP SIGNATURE-----
Merge tag 'mips_5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- added printing of CPU options for /proc/cpuinfo
- removed support for Netlogic SOCs
- fixes and cleanup
* tag 'mips_5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux:
MIPS: Cobalt: Explain GT64111 early PCI fixup
mips: fix HUGETLB function without THP enabled
mips: cm: Convert to bitfield API to fix out-of-bounds access
MIPS: Remove NETLOGIC support
MIPS: kernel: proc: add CPU option reporting
MIPS: kernel: proc: use seq_puts instead of seq_printf
MIPS: kernel: proc: fix trivial style errors
MIPS: Fix assembly error from MIPSr2 code used within MIPS_ISA_ARCH_LEVEL
MIPS: octeon: Remove unused functions
MIPS: Loongson64: Add of_node_put() before break
bcm47xx: Replace printk(KERN_ALERT ... pci_devname(dev)) with pci_alert()
bcm47xx: Get rid of redundant 'else'
MIPS: sni: Fix the build
MIPS: Avoid macro redefinitions
MIPS: loongson64: Fix no screen display during boot-up
MIPS: loongson64: make CPU_LOONGSON64 depends on MIPS_FP_SUPPORT
1. Add nodes for the two SPI controllers found in MIPS Creator CI20.
2. Reparent SPI clock source to effectively use MPLL and set its clock
rate to 54MHz.
NOTE: To use the SPI controllers, `pinctrl-0` property must be set in
order to configure the used pins. As SPI functionality is multiplexed on
multiple pin groups, this choice is left to the user.
An example configuration:
```
&spi0 {
pinctrl-0 = <&pins_spi0>;
}
pins_spi0: spi0 {
function = "ssi0";
groups = "ssi0-dt-e", "ssi0-dr-e", "ssi0-clk-e",
"ssi0-ce0-e", "ssi0-ce1-e";
bias-disable;
};
```
Consult the CI20 pinout description for more details.
Signed-off-by: Artur Rojek <contact@artur-rojek.eu>
Link: https://lore.kernel.org/r/20210830230139.21476-4-contact@artur-rojek.eu
Signed-off-by: Mark Brown <broonie@kernel.org>
The ocelot driver was converted to phylink, and that expects a valid
phy_interface_t. Without a phy-mode, of_get_phy_mode returns
PHY_INTERFACE_MODE_NA, which is not ideal because phylink rejects that.
The ocelot driver was patched to treat PHY_INTERFACE_MODE_NA as
PHY_INTERFACE_MODE_INTERNAL to work with the broken DT blobs, but we
should fix the device trees and specify the phy-mode too.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The ocelot switch driver used to ignore ports which do not have a
phy-handle property and not probe those, but this is not quite ok since
it is valid to not have a phy-handle property if there is a fixed-link.
It seems that checking for a phy-handle was a proxy for the proper check
which is for the status, but that doesn't make a lot of sense, since the
ocelot driver already iterates using for_each_available_child_of_node
which skips the disabled ports, so I have no idea.
Anyway, a widespread pattern in device trees is for a SoC dtsi to
disable by default all hardware, and let board dts files enable what is
used. So let's do that and enable only the ports with a phy-handle in
the pcb120 and pcb123 device tree files.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Now it can be replaced by generic kernel.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
CPC and CDMM addresses are adjustable and we should tell kernel
how to place them in devicetree.
Note that MACH_PISTACHIO code hardcoded CDMM base to 0x1bdd0000,
however it will collide with GIC address range. As we don't have
any CDMM device on this platform it won't be a problem.
I found another spare range, 0x1bdf0000~0x1be00000 to place CDMM
instead.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Marduk is based on IMG pistachio SoC. The platform is using
MIPS UHI booting protocol and does have a proper devicetree
implement, thus it could be a part of generic kernel.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
- Ingenic fixes/improvments
- other fixes and cleanups
-----BEGIN PGP SIGNATURE-----
iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAmDdyJQaHHRzYm9nZW5k
QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHBlyRAAhj5dC1EyGsc0cWyzC8ZU
Nh45vzMCSxa4mxAelNjuVKdE0h7gLeRa8/sKPV+EcS3ZFcSfZQeIHEbH9Na3EDS7
KtUZmkjrHCDdRTh7kou7E7mb716HvoQEyq6d1VyZOahyqf2ZcjIsFinK+As+4wBV
JcXJMcpUWemI4Ojm8cbmNWQW3V2Ty9qLNUa6BpmntbdOdYowTih9QWHv2u1YsOR7
R6LJXdyo6V1RieeqfZaWXTQtN8yyXYhBewLIy0DxBAm329f5sRHUVd9/ZD2RMByD
1weEhbs0jhmYZFSfkwZ8SjAb4GkusjNTnDiK4Rsuz6pQK0BIGNAV0Mrnedq+i5eD
wrrTI1/envStDpj9XGlSNajcaQGpTza1V1uaCIm4EanOMMTBc8DTXaj7MCOlTD8j
fkNE3ykfloVSSzZAWCmcpV9fBsFwQp3m+cWrtIAAnOJDK+NV5FfABUwFHKnBUpxG
YOUNCed0WJFx++xrHKylt8hWILLEATLHh1h5vDsEYJi4gwt2KxCSYQBGgSYKa1At
tOUa5UINTMvpe4U9GEjHh6f1VedtUNYUzXjD5g2cn62d81RCSx3hB1KkfQSKtaDw
H9sR8d+rDFt4fK9T/HPZ3EyM2i9FkZNv+CulfGNd3M0vnF8+qX2xRehWrqhwBBi0
2p7V9/t5TPhziAfJySKX+Jg=
=j2kH
-----END PGP SIGNATURE-----
Merge tag 'mips_5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- add support for OpeneEmbed SOM9331 board
- Ingenic fixes/improvments
- other fixes and cleanups
* tag 'mips_5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (39 commits)
MIPS: Fix PKMAP with 32-bit MIPS huge page support
MIPS: CI20: Add second percpu timer for SMP.
MIPS: CI20: Reduce clocksource to 750 kHz.
MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs.
dt-bindings: clock: Add documentation for MAC PHY control bindings.
MIPS: X1830: Respect cell count of common properties.
MIPS: set mips32r5 for virt extensions
MIPS: loongsoon64: Reserve memory below starting pfn to prevent Oops
MIPS: MT extensions are not available on MIPS32r1
mips/kvm: Use BUG_ON instead of if condition followed by BUG
MIPS: OCTEON: octeon-usb: Use devm_platform_get_and_ioremap_resource()
MIPS: add PMD table accounting into MIPS'pmd_alloc_one
MIPS: Loongson64: fix spelling of SPDX tag
MIPS: ingenic: rs90: Add dedicated VRAM memory region
MIPS: ingenic: gcw0: Set codec to cap-less mode for FM radio
MIPS: ingenic: jz4780: Fix I2C nodes to match DT doc
MIPS: ingenic: Select CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER
MIPS: Kconfig: ingenic: Ensure MACH_INGENIC_GENERIC selects all SoCs
MIPS: cpu-probe: Fix FPU detection on Ingenic JZ4760(B)
MIPS: boot: Support specifying UART port on Ingenic SoCs
...
1.Add a new TCU channel as the percpu timer of core1, this is to
prepare for the subsequent SMP support. The newly added channel
will not adversely affect the current single-core state.
2.Adjust the position of TCU node to make it consistent with the
order in jz4780.dtsi file.
Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The original clock (3 MHz) is too fast for the clocksource,
there will be a chance that the system may get stuck.
Reported-by: Nikolaus Schaller <hns@goldelico.com>
Tested-by: Nikolaus Schaller <hns@goldelico.com> # on CI20
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
If N fields of X cells should be provided, then that's what the
devicetree should represent, instead of having one single field of
(N * X) cells.
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
checkpatch looks for SPDX-License-Identifier.
So change the '_' to '-'
Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a 1 MiB memory area dedicated to the video driver. This area will be
managed by Linux' CMA, so that the ingenic-drm driver can be sure to
always be able to allocate contiguous buffers.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
When using the FM radio, we must not have capacitors on the headphones
line, since it is used as the antenna.
The "FM Radio" widget is removed so that the cap-less mode can be
enabled dynamically through DAPM when the line input is used.
This widget was useless anyway.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The "ingenic,jz4780-i2c" should have "ingenic,jz4770-i2c" as a fallback
compatible, as per the Device Tree documentation found in
Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Fixes the following W=1 kernel build warning(s):
arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name
arch/mips/boot/dts/loongson/rs780e-pch.dtsi:24.7-41.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000"
Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Fixes the following W=1 kernel build warning(s):
arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name
arch/mips/boot/dts/loongson/ls7a-pch.dtsi:410.7-415.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000"
Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Fixes the following W=1 kernel build warning(s):
arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (unit_address_vs_reg): /bus@10000000/isa: node has a reg or ranges property, but no unit name
arch/mips/boot/dts/loongson/loongson64v_4core_virtio.dts:91.7-96.5: Warning (simple_bus_reg): /bus@10000000/isa: simple-bus unit address format error, expected "18000000"
Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Fixes the following W=1 kernel build warning(s):
arch/mips/boot/dts/loongson/loongson64g-package.dtsi:42.30-49.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e0: simple-bus unit address format error, expected "1fe00100"
arch/mips/boot/dts/loongson/loongson64g-package.dtsi:51.30-59.5: Warning (simple_bus_reg): /bus@1fe00000/serial@1fe001e8: simple-bus unit address format error, expected "1fe00110"
Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com>
Acked-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Fixes the following W=1 kernel build warning(s):
arch/mips/boot/dts/loongson/loongson64-2k1000.dtsi:26.9-32.4: Warning (unit_address_vs_reg): /memory: node has a reg or ranges property, but no unit name
Signed-off-by: zhaoxiao <zhaoxiao@uniontech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Both, MAC and switch support flow control, so add pause property for the
MAC <> switch link.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add SOM9331 based Board. It has 3 LAN ports, usb to uart controller and
USB type A port.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
make dtbs_check:
eth@1f010000: $nodename:0: 'eth@1f010000' does not match '^ethernet(@.*)?$'
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
from Loongson-2K user manual know that Loongson-2K have two
pcie controller pcie0 and pcie1, pcie0 have four port named port0~port3
and pcie1 have 2 port named port0~port1. the device id of port0 is 7a19
in each pcie controller and others are 7a09.
Signed-off-by: Xiaochuan Mao <maoxiaochuan@loongson.cn>
Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
make license from GPL3.0 to GPL2.0
Signed-off-by: xiaochuan mao <maoxiaochuan@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
from Loongson-2K1000 user manual know that under pci bus
the device num is 4, function number is 2 and register is 0x2200
is ohci. the ohci interrupt number is 51. because Loongson-2K1000 has
64 interrupt sources, 0-31 correspond to the device tree liointc0 device
node, and the other correspond to liointc1 node. so it should be
number 19 correspon to liointc1.
Signed-off-by: xiaochuan mao <maoxiaochuan@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add DeviceTree files for Loongson-2K1000 processor, currently only
supports single-core boot.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Qing Zhang <zhangqing@loongson.cn>
Tested-by: Ming Wang <wangming01@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The NT39016 panel is a fun beast, even though the documentation states
that the CS line is active-low, it will work just fine if the CS line is
configured as active-high, but it won't work if the CS line is forced
low or forced high.
Since it did actually work with the spi-cs-high property, this is not a
bugfix, but we should nonetheless remove that property to match the
documentation.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Now that there are proper device tree bindings we can start using them.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Change /include/ with #include in order to be able to include header files
from dt-bindings.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The RTL838x/839x family of SoCs are Realtek switches with an embedded
MIPS core.
* RTL838x - 500MHz 4kce single core - 1Gbit ports and L2 features
* RTL839x - 700MHz 34Kc single core - 1Gbit ports and L2 features
These switches, depending on the exact part number, will have anywhere
between 8 and 52 ports. The MIPS core is wired to a switch cpu port which
has a tagging feature allowing us to make use of the DSA subsystem.
The SoCs are somewhat basic in certain areas, getting better with more
advanced features on newer series.
The switch functionality is MMIO-mapped via a large MFD region.
The SoCs have the following peripherals
* ethernet
* switch
* uart - ns16550a
* spi-flash interface
* gpio
* wdt
* led
The code was derived from various vendor SDKs based on Linux v2.6
kernels.
This patchset allows us to boot RTL838x/RTL839x units with basic support.
Most of the other drivers are already written and functional, and work to
get them upstream is already in progress.
Signed-off-by: Birger Koblitz <mail@birger-koblitz.de>
Signed-off-by: Bert Vermeulen <bert@biot.com>
Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The node names for devices using the pwm-leds driver follow a certain
naming scheme (now). Parent node name is not enforced, but recommended
by DT project.
Signed-off-by: Alexander Dahl <post@lespocky.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
BCM63268 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
BCM6368 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
BCM6362 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
BCM6358 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
BCM6328 SoCs have a reset controller for certain components.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device trees and FIT image support for the Microsemi Serval SoC
which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device trees and FIT image support for the Microsemi Jaguar2 SoC
which belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device tree for the Microsemi Luton PCB091 evaluation board.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device tree include file for the Microsemi Luton SoC which
belongs to same family of the Ocelot SoC.
It is based on the work of Lars Povlsen <lars.povlsen@microchip.com>.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Ocelot belongs to a family of SoC named the VCore III. In order to add
these new Soc, use the new symbol SOC_VCOREIII instead of a one
dedicated to Ocelot.
In order to avoid regression on driver building, the MSCC_OCELOT
configuration symbol is kept until the driver will be converted.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
In accordance with the Generic EHCI/OHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-ehci" and "generic-ohci"-compatible
nodes are correctly named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Paul Cercueil <paul@crapouillou.net>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Various driver updates for platforms. A bulk of this is smaller fixes or
cleanups, but some of the new material this time around is:
- Support for Nvidia Tegra234 SoC
- Ring accelerator support for TI AM65x
- PRUSS driver for TI platforms
- Renesas support for R-Car V3U SoC
- Reset support for Cortex-M4 processor on i.MX8MQ
There are also new socinfo entries for a handful of different SoCs
and platforms.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCgAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl+TUboPHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3T4YP/R5pjF2C1gt8FrCaG4IfhIY1VHWelfPcB5qB
RC7Pn4MCRCEY+10YPXA70oS6KBaC+gtZ4bPeInzfLXh1ynFJJb+XtAIxoRhnkEw+
/R979wNcIls9JqkvnHWFx29Y008W2ZNcXVNKH7O2Gxy+eKzDcTMsoH/zj8xWrV5b
+eBllTzGU4RArYRJdcwOBQwMO6L2pzADHZ7hGMAY//8fo+qrxg8b9EINsH1UHCa8
gQdWdVlmv6GeLB6RYLRBCWxpW4jOLDqEAvyDV84QQmYHvzD9tqJExNR0hfGTs4TU
TZWK7LWSNqF0ujQUbFh9Ikcx6DypU1gvE7LKhCDrf4D7HLRX5v4BjGH+xtVtjsyD
xzh4WEoa3qCNu1mxQjKG8Y6U7bB9cRI2TPVxbbmI4ZuF0njvybecwwOZUBQl4aD4
5x+Df3pO/E5ECLOBeTnLgvw20fcjHv4HP8l63B6ADb31FUiZrJXItvayY5qXWe+P
HSgUykmVA4nd4PnLsSj9seyWqOTIqUZ3U3TsmfxIQh2Otie01okwuHb1J7ErO/u0
W148SgSwVbnkPxjbBHKGgC2r+Q/AjSDGRBYL0ThIVFUztxTBBwhj3FIvMnyyxTIj
yFBY14KQ8FcNUs8DrbPCaAx/RDCB02IHdvvIlyTmU3RBq7UhJVIglpLzzo2ed9F2
5u/aVH3y
=tfPb
-----END PGP SIGNATURE-----
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC-related driver updates from Olof Johansson:
"Various driver updates for platforms. A bulk of this is smaller fixes
or cleanups, but some of the new material this time around is:
- Support for Nvidia Tegra234 SoC
- Ring accelerator support for TI AM65x
- PRUSS driver for TI platforms
- Renesas support for R-Car V3U SoC
- Reset support for Cortex-M4 processor on i.MX8MQ
There are also new socinfo entries for a handful of different SoCs and
platforms"
* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (131 commits)
drm/mediatek: reduce clear event
soc: mediatek: cmdq: add clear option in cmdq_pkt_wfe api
soc: mediatek: cmdq: add jump function
soc: mediatek: cmdq: add write_s_mask value function
soc: mediatek: cmdq: add write_s value function
soc: mediatek: cmdq: add read_s function
soc: mediatek: cmdq: add write_s_mask function
soc: mediatek: cmdq: add write_s function
soc: mediatek: cmdq: add address shift in jump
soc: mediatek: mtk-infracfg: Fix kerneldoc
soc: amlogic: pm-domains: use always-on flag
reset: sti: reset-syscfg: fix struct description warnings
reset: imx7: add the cm4 reset for i.MX8MQ
dt-bindings: reset: imx8mq: add m4 reset
reset: Fix and extend kerneldoc
reset: reset-zynqmp: Added support for Versal platform
dt-bindings: reset: Updated binding for Versal reset driver
reset: imx7: Support module build
soc: fsl: qe: Remove unnessesary check in ucc_set_tdm_rxtx_clk
soc: fsl: qman: convert to use be32_add_cpu()
...
- removed support for PNX833x alias NXT_STB22x
- included Ingenic SoC support into generic MIPS kernels
- added support for new Ingenic SoCs
- converted workaround selection to use Kconfig
- replaced old boot mem functions by memblock_*
- enabled COP2 usage in kernel for Loongson64 to make usage
of usage of 16byte load/stores possible
- cleanups and fixes
-----BEGIN PGP SIGNATURE-----
iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAl+Jk/MaHHRzYm9nZW5k
QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHDjyA/9EAEb8woPRsEfbQE8GLgT
vW2y2/fSHFJHoYY/t9+G81lJVKsg9TXQ9LyNk3WSU6+a6qELVqmnHY7+e43rSkfG
qaxMRJOmwsMU7NWQOy1OSyESHidsAXrGYMY40TKrcClyVbS/Ob6wZ5QbBp+MTEsU
ane8Yq/QTS60xIxsS0SZSiQpqzumUn7oHAwCAlqcqo26tV94mtrtsFG4pReqI2gh
Bxs2ZoQYdx1/rPGXHV74fwP3Iz1Rwq3Z38FCyK7ME98cTEiLxYs1/ztgL1y0IC07
F3Dv3wmPtCGZtNyqDJxs7lHsbi74owSyoueywNeOA+YV8IzkOCEW0XpgL7vI2gPL
OIi+LbH7MXt3P14h5ekzK+dSILg3yNFD152PmGxpUVzVhfDCw+uyUHzHdhZSCF/J
aldlDm1wtUV5PacruVbH26amownTsfdei+WTtgGN3QAISmnLjUghsplPZE6KWbGW
uPPpuIA2pTwW2FQdXL/WwGZm1k44ii5zX1Cjc55AZISZOzFXqklbuEZbMEM5O76N
EFR+zOd4+wueOZOI7vpBTmKSSY/r12Ve25hbMMYeY0G3bbsubcIIIHHRxhdPp/+R
8t+PTC9//bT9r/OKdGV6TDsSJmSZWfaaNd30actDHpss8ruUlNxwWv7awp/z0sOs
U+R5CAaVvzQlhxkzdO+M03w=
=Aa/Q
-----END PGP SIGNATURE-----
Merge tag 'mips_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Thomas Bogendoerfer:
- removed support for PNX833x alias NXT_STB22x
- included Ingenic SoC support into generic MIPS kernels
- added support for new Ingenic SoCs
- converted workaround selection to use Kconfig
- replaced old boot mem functions by memblock_*
- enabled COP2 usage in kernel for Loongson64 to make use
of 16byte load/stores possible
- cleanups and fixes
* tag 'mips_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (92 commits)
MIPS: DEC: Restore bootmem reservation for firmware working memory area
MIPS: dec: fix section mismatch
bcm963xx_tag.h: fix duplicated word
mips: ralink: enable zboot support
MIPS: ingenic: Remove CPU_SUPPORTS_HUGEPAGES
MIPS: cpu-probe: remove MIPS_CPU_BP_GHIST option bit
MIPS: cpu-probe: introduce exclusive R3k CPU probe
MIPS: cpu-probe: move fpu probing/handling into its own file
MIPS: replace add_memory_region with memblock
MIPS: Loongson64: Clean up numa.c
MIPS: Loongson64: Select SMP in Kconfig to avoid build error
mips: octeon: Add Ubiquiti E200 and E220 boards
MIPS: SGI-IP28: disable use of ll/sc in kernel
MIPS: tx49xx: move tx4939_add_memory_regions into only user
MIPS: pgtable: Remove used PAGE_USERIO define
MIPS: alchemy: Share prom_init implementation
MIPS: alchemy: Fix build breakage, if TOUCHSCREEN_WM97XX is disabled
MIPS: process: include exec.h header in process.c
MIPS: process: Add prototype for function arch_dup_task_struct
MIPS: idle: Add prototype for function check_wait
...
As a preparation step for the offloading to ES0, let's create the
infrastructure for talking with this hardware block.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
As a preparation step for the offloading to IS1, let's create the
infrastructure for talking with this hardware block.
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
When I update the latest kernel on the Loongson platform used with
LS7A bridge chip, the serial console has no output, this is because
the machine uses LS7A UART0 instead of CPU UART0, add UART node for
LS7A PCH to enhance the compatibility.
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add 'cpus' node to the jz4725b.dtsi, jz4740.dtsi, jz4770.dtsi,
jz4780.dtsi, x1000.dtsi, and x1830.dtsi files.
Tested-by: H. Nikolaus Schaller <hns@goldelico.com>
Tested-by: Paul Boddie <paul@boddie.org.uk>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cleanup a bit the Device Tree file:
1. Respect the number of cells in GPIO descriptors and keyboard matrix;
2. Use 'ecc-engine' instead of deprecated 'ingenic,bch-controller'
property;
3. The NAND's rb-gpios is actually active high;
3. The FRE/FWE pins must be configured in the proper mode for the NAND
to work if it was not already done by the bootloader.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
BCM63268 SoCs have a power domain controller to enable/disable certain
components in order to save power.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BCM6362 SoCs have a power domain controller to enable/disable certain
components in order to save power.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
BCM6328 SoCs have a power domain controller to enable/disable certain
components in order to save power.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
- improvements for Loongson64
- extended ingenic support
- removal of not maintained paravirt system type
- cleanups and fixes
-----BEGIN PGP SIGNATURE-----
iQJOBAABCAA4FiEEbt46xwy6kEcDOXoUeZbBVTGwZHAFAl8sOj8aHHRzYm9nZW5k
QGFscGhhLmZyYW5rZW4uZGUACgkQeZbBVTGwZHDaKxAAj2Ptqna21sGQaRW3wQ4L
Bt41xZUw5m62DjAfd2j8w6PkJLvwcXx8y5v7ZpA79fLFJcDNzBgZzmjfqVxGue6P
j1Ei/Bc1UPF6s+hsjjr7IJG3Y50CKD1AY0VgKzZzY42NhCkkOVlzyUh0wER/COhG
jDAJtkrtFJeyNx2x+aWV5ILg2HTFsjCDfkLlwDWZdhMLa4XuDJoruRDBjQ8RVTs8
NsYANHaO8M1I/x9aGDpiQbE5j11WSm/GrA154ivIpenLHT+lx4HWoEjfLskIG0Bx
n+bMuUUdHw/T0dpj/51/eCIoaSXzEEMgLo5K5vowaikY/Q6++M+ePSQw6ohxFQ/q
PPWNJIilpufw6Utvkdzw6j/oGB65k1Tz1gxlQRVeF9vWf/qLW1O7gTuKJDebjPnH
3f+NfqlKuygF4zV0RJ4Kk5k0S+C6h8Q6qTlAZe4G2Ixcy1AV8USd+RBacwdSxzvE
z7c7wovHpIhvZ8Zkheli0WeB0DKX5KH8H1GcFki/fZ748qP02cfzkZ8sU4n3OF93
6z3AdShnDb9sCTB4trSXe7EvwVrirYbUtCPNCCRWgIZrJFVuw/2L197IzYF94mTE
ilqJ121hL7ETr7Wk8+HTOMbLUaYnh7Dt842Y7RvOEOzPhN9dlvMcABimpaIHf1rp
45aCNTwT6V5og2v73UhqTmk=
=I/vU
-----END PGP SIGNATURE-----
Merge tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS upates from Thomas Bogendoerfer:
- improvements for Loongson64
- extended ingenic support
- removal of not maintained paravirt system type
- cleanups and fixes
* tag 'mips_5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (81 commits)
MIPS: SGI-IP27: always enable NUMA in Kconfig
MAINTAINERS: Update KVM/MIPS maintainers
MIPS: Update default config file for Loongson-3
MIPS: KVM: Add kvm guest support for Loongson-3
dt-bindings: mips: Document Loongson kvm guest board
MIPS: handle Loongson-specific GSExc exception
MIPS: add definitions for Loongson-specific CP0.Diag1 register
MIPS: only register FTLBPar exception handler for supported models
MIPS: ingenic: Hardcode mem size for qi,lb60 board
MIPS: DTS: ingenic/qi,lb60: Add model and memory node
MIPS: ingenic: Use fw_passed_dtb even if CONFIG_BUILTIN_DTB
MIPS: head.S: Init fw_passed_dtb to builtin DTB
of: address: Fix parser address/size cells initialization
of_address: Guard of_bus_pci_get_flags with CONFIG_PCI
MIPS: DTS: Fix number of msi vectors for Loongson64G
MIPS: Loongson64: Add ISA node for LS7A PCH
MIPS: Loongson64: DTS: Fix ISA and PCI I/O ranges for RS780E PCH
MIPS: Loongson64: Enlarge IO_SPACE_LIMIT
MIPS: Loongson64: Process ISA Node in DeviceTree
of_address: Add bus type match for pci ranges parser
...
Loongson-3 KVM guest is based on virtio, it use liointc as its interrupt
controller and use GPEX as the pci controller.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a memory node, which was missing until now, and use the retail name
"Ben Nanonote" as the model, as it is way more known under that name
than under the name "LB60".
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
HT irqs vectors are 8 groups, each group has 32 irqs, Loongson64C CPUs
can use only 4 groups and Loongson64G CPUs can use all 8 groups. So the
number of msi vectors of Loongson64G is 192 (32*8 - 64 = 192).
Fixes: 24af105962 ("MIPS: Loongson64: DeviceTree for LS7A PCH")
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Although currently we're not enabling any ISA device in devicetree,
but this node is required to express the ranges of address reserved
for ISA.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Ranges should express the actual physical address on bus.
Also enlarge the PCI I/O size to the actual hardware limit.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The ROUT (right channel output of audio codec) was connected to INL
(left channel of audio amplifier) instead of INR (right channel of audio
amplifier).
Fixes: 8ddebad15e ("MIPS: qi_lb60: Migrate to devicetree")
Cc: stable@vger.kernel.org # v5.3
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a devicetree node for the Image Processing Unit (IPU) found in the
JZ4725B. Connect it with graph nodes to the LCD node. The LCD driver
will expect the IPU node to be accessed through graph port #8, as stated
in the bindings documentation.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
1.The CU1000-Neo board actually uses X1000E instead of X1000,
so the wrongly written "ingenic,x1000" in compatible should
be changed to "ingenic,x1000e".
2.Adjust the order of nodes according to the corresponding
address value.
3.Drop unnecessary node in "wlan_pwrseq".
4.Add the leds node to "cu1000-neo.dts".
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add a device tree and a defconfig for the Ingenic X1830 based
YSH & ATIL CU Neo board.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Support the Ingenic X1830 SoC using the code under arch/mips/jz4740.
This is left unselectable in Kconfig until a X1830 based board is
added in a later commit.
Tested-by: 周正 (Zhou Zheng) <sernia.zhou@foxmail.com>
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
From previous commits, the machine names with "loongson3-" prefix have
renamed to "loongson64c-" prefix in documents, but the .dts files have
not been updated as well. So fix it.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Tested-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The RS-90, better known as RetroMini, is a small and pocketable handheld
gaming console from YLMChina. It has little more than a JZ4725B SoC, a
NAND, a screen, some buttons and a speaker.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add preliminary support for boards based on the JZ4725B SoC from
Ingenic.
The JZ4725B SoC is supposed to be older than the JZ4740 SoC, but its
internals are much closer to what can be found on the JZ4750 and newer
SoCs.
It is low-power SoC with a MIPS32r1 SoC running at ~360 MHz, and no FPU.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The size of ioports in the current RS780E dts file is not enough, which
sometimes causes device initialize fail. So we increase the size of ISA/
LPC ioports to 0x4000, and increase the size of PCI ioports to 0x8000.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Loongson-3A R1/R2/R3 and Loongson-3B R1/R2 use the same package naming
in dts, and Loongson-3A R4 will be different. In cpu.h the classic 64bit
Loongson processors are called Loongson64C (C for classic, pre Loongson-
3A R4), and the new 64bit Loongson processors are called Loongson64G (G
for generic, Loongson-3A R4+). To keep consistency and make extensible,
we rename the classic "loongson3" prefix to "loongson64c", and the new
prefix for Loongson-3A R4+ will be "loongson64g".
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Previously marked as active high, but is in reality active low.
Cc: stable@vger.kernel.org
Fixes: b1bfdb6605 ("MIPS: ingenic: DTS: Update GCW0 support")
Signed-off-by: João H. Spies <jhlspies@gmail.com>
Tested-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This patch adds a description of the load/save GPIN pin, used in the
VSC8584 PHY for timestamping operations. The related pinctrl description
is also added.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: Antoine Tenart <antoine.tenart@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
If CONFIG_MIPS_MALTA is not set but CONFIG_LEGACY_BOARD_SEAD3 is set,
the subdir arch/mips/boot/dts/mti will not be built, so the sead3.dts
which depends on CONFIG_LEGACY_BOARD_SEAD3 in this subdir is also not
built, and then there exists the following build error, fix it.
LD .tmp_vmlinux.kallsyms1
arch/mips/generic/board-sead3.o:(.mips.machines.init+0x4): undefined reference to `__dtb_sead3_begin'
Makefile:1106: recipe for target 'vmlinux' failed
make: *** [vmlinux] Error 1
Additionally, add CONFIG_FIT_IMAGE_FDT_BOSTON check for subdir img to
fix the following build error when CONFIG_MACH_PISTACHIO is not set but
CONFIG_FIT_IMAGE_FDT_BOSTON is set.
FATAL ERROR: Couldn't open "boot/dts/img/boston.dtb": No such file or directory
Reported-by: kbuild test robot <lkp@intel.com>
Reported-by: Guenter Roeck <linux@roeck-us.net>
Fixes: 41528ba6af ("MIPS: DTS: Only build subdir of current platform")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add support for the GCW Zero prototype. The only (?) difference is that
it only has 256 MiB of RAM, compared to the 512 MiB of RAM of the retail
device.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add memory info of the GCW Zero in its devicetree. The bootloader
generally provides this information, but since it is fixed to 512 MiB,
it doesn't hurt to have it in devicetree. It allows the kernel to boot
without any parameter passed as argument.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add PCI Host controller node for Loongson64 with RS780E PCH dts.
Note that PCI interrupts are probed via legacy way, as different
machine have different interrupt arrangement, we can't cover all
of them in dt.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add config check in Makefile to only build the subdir of current platform.
E.g. without this patch:
AR arch/mips/built-in.a
AR arch/mips/boot/dts/brcm/built-in.a
AR arch/mips/boot/dts/cavium-octeon/built-in.a
AR arch/mips/boot/dts/img/built-in.a
AR arch/mips/boot/dts/ingenic/built-in.a
AR arch/mips/boot/dts/lantiq/built-in.a
DTC arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb
DTB arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.S
AS arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.o
DTC arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb
DTB arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.S
AS arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.o
AR arch/mips/boot/dts/loongson/built-in.a
AR arch/mips/boot/dts/mscc/built-in.a
AR arch/mips/boot/dts/mti/built-in.a
AR arch/mips/boot/dts/netlogic/built-in.a
AR arch/mips/boot/dts/ni/built-in.a
AR arch/mips/boot/dts/pic32/built-in.a
AR arch/mips/boot/dts/qca/built-in.a
AR arch/mips/boot/dts/ralink/built-in.a
AR arch/mips/boot/dts/xilfpga/built-in.a
AR arch/mips/boot/dts/built-in.a
With this patch:
AR arch/mips/built-in.a
DTC arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb
DTB arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.S
AS arch/mips/boot/dts/loongson/loongson3_4core_rs780e.dtb.o
DTC arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb
DTB arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.S
AS arch/mips/boot/dts/loongson/loongson3_8core_rs780e.dtb.o
AR arch/mips/boot/dts/loongson/built-in.a
AR arch/mips/boot/dts/built-in.a
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
schema violation was detected by the dtbs_check
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Fit led nodes to the latest naming schema.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This is an add-on patch to the main SoC Sparx5 series
(Message-ID: <20200513125532.24585-1-lars.povlsen@microchip.com>).
This changes the miim pinctrl function name from "miim1" to "miim" due
to refactoring in the driver, obsoleting the instance number.
The change in the driver was to better fit new platforms, as the
instance number is redundant information. Specifically, support for
the Microchip Sparx5 SoC is being submitted, where this change became
necessary.
Reviewed-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Lars Povlsen <lars.povlsen@microchip.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add support for the face buttons, the ACT8600 PMUC, the LCD panel
with backlight, the rumble, internal/external SD readers, and other
things.
Note that the otg-phy node was dropped in the process as it was neither
useful nor used, and was inside a non-compliant board "bus".
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add support for the RTC, AIC, CODEC, MMC 0/1/2, ADC, GPU, LCD,
USB OTG, USB PHY controllers.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add the TCU nodes to the JZ4780, JZ4770 and JZ4740 devicetree files.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
If N fields of X cells should be provided, then that's what the
devicetree should represent, instead of having one single field of
(N*X) cells.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The driver requires two cells and not just one.
Since these nodes are both disabled as no hardware currently use them,
this fix does not really requires a Fixes: tag.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Add ACPI Controller Node for RS780E PCH to fit newly added driver.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
There is a unique MAC address programmed into the eFuses
of the JZ4780 chip in the CI20 factory. By using this
for initializing the DM9000 Ethernet controller, every
CI20 board has an individual - but stable - MAC address
and DHCP can assign stable IP addresses.
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
This patch brings support for the JZ4780 efuse. Currently it only exposes
a read only access to the entire 8K bits efuse memory and the
ethernet mac address for the davicom dm9000 chip on the CI20 board.
It also changes the nemc ranges definition to give the driver
access to the efuse registers, which are in the middle of the
nemc reg range.
Tested-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: PrasannaKumar Muralidharan <prasannatsmkumar@gmail.com>
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
* Fix issue where write_cached_data() fails but write() still returns success
* maps: sa1100-flash: Replace zero-length array with flexible-array member
* phram: Fix a double free issue in error path
* Convert fallthrough comments into statements
* MAINTAINERS: Add the IRC channel to the MTD related subsystems
Raw NAND core changes:
* Add support for manufacturer specific suspend/resume operation
* Add support for manufacturer specific lock/unlock operation
* Replace zero-length array with flexible-array member
* Fix a typo ("manufecturer")
* Ensure nand_soft_waitrdy wait period is enough
Raw NAND controller driver changes:
* Brcmnand:
- Add support for flash-edu for dma transfers (+ bindings)
* Cadence:
- Reinit completion before executing a new command
- Change bad block marker size
- Fix the calculation of the avaialble OOB size
- Get meta data size from registers
* Qualcom:
- Use dma_request_chan() instead dma_request_slave_channel()
- Release resources on failure within qcom_nandc_alloc()
* Allwinner:
- Use dma_request_chan() instead dma_request_slave_channel()
* Marvell:
- Use dma_request_chan() instead dma_request_slave_channel()
- Release DMA channel on error
* Freescale:
- Use dma_request_chan() instead dma_request_slave_channel()
* Macronix:
- Add support for Macronix NAND randomizer (+ bindings)
* Ams-delta:
- Rename structures and functions to gpio_nand*
- Make the driver custom I/O ready
- Drop useless local variable
- Support custom driver initialisation
- Add module device tables
- Handle more GPIO pins as optional
- Make read pulses optional
- Don't hardcode read/write pulse widths
- Push inversion handling to gpiolib
- Enable OF partition info support
- Drop board specific partition info
- Use struct gpio_nand_platdata
- Write protect device during probe
* Ingenic:
- Use devm_platform_ioremap_resource()
- Add dependency on MIPS || COMPILE_TEST
* Denali:
- Deassert write protect pin
* ST:
- Use dma_request_chan() instead dma_request_slave_channel()
Raw NAND chip driver changes:
* Toshiba:
- Support reading the number of bitflips for BENAND (Built-in ECC NAND)
* Macronix:
- Add support for deep power down mode
- Add support for block protection
SPI-NAND core changes:
* Do not erase the block before writing a bad block marker
* Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
* Stop using spinand->oobbuf for buffering bad block markers
* Rework detect procedure for different READ_ID operation
SPI-NAND driver changes:
* Toshiba:
- Support for new Kioxia Serial NAND
- Rename function name to change suffix and prefix (8Gbit)
- Add comment about Kioxia ID
* Micron:
- Add new Micron SPI NAND devices with multiple dies
- Add M70A series Micron SPI NAND devices
- identify SPI NAND device with Continuous Read mode
- Add new Micron SPI NAND devices
- Describe the SPI NAND device MT29F2G01ABAGD
- Generalize the OOB layout structure and function names
SPI NOR core changes:
* Move all the manufacturer specific quirks/code out of the core,
to make the core logic more readable and thus ease maintenance.
* Move the SFDP logic out of the core, it provides a better
separation between the SFDP parsing and core logic.
* Trim what is exposed in spi-nor.h. The SPI NOR controllers drivers
must not be able to use structures that are meant just for the
SPI NOR core.
* Use the spi-mem direct mapping API to let advanced controllers
optimize the read/write operations when they support direct mapping.
* Add generic formula for the Status Register block protection
handling. It fixes some long standing locking limitations and eases
the addition of the 4bit block protection support.
* Add block protection support for flashes with 4 block protection
bits in the Status Register.
SPI NOR controller drivers changes:
* The mtk-quadspi driver is replaced by the new spi-mem spi-mtk-nor
driver.
* Merge tag 'mtk-mtd-spi-move' into spi-nor/next to avoid conflicts.
HyperBus changes:
* Print error msg when compatible is wrong or missing
* Move mapping of direct access window from core to individual drivers
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAl6GEU8ACgkQJWrqGEe9
VoSQ8gf/WV1vfxfAlgKRQ6WGkdrI+EndmciKx/sqf9KfAu6uNLHx3qcxQeibqvgC
KmIgJbCLXhgCUBZQLqyjqHtO3zImgPI2WWWR/tkieNaT9NT5jrAunYZpiqkCkjVD
HjML4iVcLwDJoHPZWTTTsFWd2cDLA8nFVXJQeaGRgdsx3j3D9OSOnfLGTUGfcg2H
lC0BxA6JRO7tdZlErqzy9BXUasjO5C7rsRzqgTiGT4h/H2yhYmDQhMW+Kz86zWiB
XdZsZJ2qLlTKntQmzR+30vbolId3iZqsO9q0mVkqWd2UQn5TpmmzNqLoYA6ys8KK
lW/1E53E3/Pq0+5ejGbD5m4afff+nw==
=/p2x
-----END PGP SIGNATURE-----
Merge tag 'mtd/for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux
Pull MTD updates from Miquel Raynal:
"MTD core changes:
- Fix issue where write_cached_data() fails but write() still returns
success
- maps: sa1100-flash: Replace zero-length array with flexible-array
member
- phram: Fix a double free issue in error path
- Convert fallthrough comments into statements
- MAINTAINERS: Add the IRC channel to the MTD related subsystems
Raw NAND core changes:
- Add support for manufacturer specific suspend/resume operation
- Add support for manufacturer specific lock/unlock operation
- Replace zero-length array with flexible-array member
- Fix a typo ("manufecturer")
- Ensure nand_soft_waitrdy wait period is enough
Raw NAND controller driver changes:
- Brcmnand:
* Add support for flash-edu for dma transfers (+ bindings)
- Cadence:
* Reinit completion before executing a new command
* Change bad block marker size
* Fix the calculation of the avaialble OOB size
* Get meta data size from registers
- Qualcom:
* Use dma_request_chan() instead dma_request_slave_channel()
* Release resources on failure within qcom_nandc_alloc()
- Allwinner:
* Use dma_request_chan() instead dma_request_slave_channel()
- Marvell:
* Use dma_request_chan() instead dma_request_slave_channel()
* Release DMA channel on error
- Freescale:
* Use dma_request_chan() instead dma_request_slave_channel()
- Macronix:
* Add support for Macronix NAND randomizer (+ bindings)
- Ams-delta:
* Rename structures and functions to gpio_nand*
* Make the driver custom I/O ready
* Drop useless local variable
* Support custom driver initialisation
* Add module device tables
* Handle more GPIO pins as optional
* Make read pulses optional
* Don't hardcode read/write pulse widths
* Push inversion handling to gpiolib
* Enable OF partition info support
* Drop board specific partition info
* Use struct gpio_nand_platdata
* Write protect device during probe
- Ingenic:
* Use devm_platform_ioremap_resource()
* Add dependency on MIPS || COMPILE_TEST
- Denali:
* Deassert write protect pin
- ST:
* Use dma_request_chan() instead dma_request_slave_channel()
Raw NAND chip driver changes:
- Toshiba:
* Support reading the number of bitflips for BENAND (Built-in ECC NAND)
- Macronix:
* Add support for deep power down mode
* Add support for block protection
SPI-NAND core changes:
- Do not erase the block before writing a bad block marker
- Explicitly use MTD_OPS_RAW to write the bad block marker to OOB
- Stop using spinand->oobbuf for buffering bad block markers
- Rework detect procedure for different READ_ID operation
SPI-NAND driver changes:
- Toshiba:
* Support for new Kioxia Serial NAND
* Rename function name to change suffix and prefix (8Gbit)
* Add comment about Kioxia ID
- Micron:
* Add new Micron SPI NAND devices with multiple dies
* Add M70A series Micron SPI NAND devices
* identify SPI NAND device with Continuous Read mode
* Add new Micron SPI NAND devices
* Describe the SPI NAND device MT29F2G01ABAGD
* Generalize the OOB layout structure and function names
SPI NOR core changes:
- Move all the manufacturer specific quirks/code out of the core, to
make the core logic more readable and thus ease maintenance.
- Move the SFDP logic out of the core, it provides a better
separation between the SFDP parsing and core logic.
- Trim what is exposed in spi-nor.h. The SPI NOR controllers drivers
must not be able to use structures that are meant just for the SPI
NOR core.
- Use the spi-mem direct mapping API to let advanced controllers
optimize the read/write operations when they support direct
mapping.
- Add generic formula for the Status Register block protection
handling. It fixes some long standing locking limitations and eases
the addition of the 4bit block protection support.
- Add block protection support for flashes with 4 block protection
bits in the Status Register.
SPI NOR controller drivers changes:
- The mtk-quadspi driver is replaced by the new spi-mem spi-mtk-nor
driver.
- Merge tag 'mtk-mtd-spi-move' into spi-nor/next to avoid conflicts.
HyperBus changes:
- Print error msg when compatible is wrong or missing
- Move mapping of direct access window from core to individual
drivers"
* tag 'mtd/for-5.7' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (103 commits)
mtd: Convert fallthrough comments into statements
mtd: rawnand: toshiba: Support reading the number of bitflips for BENAND (Built-in ECC NAND)
MAINTAINERS: Add the IRC channel to the MTD related subsystems
mtd: Fix issue where write_cached_data() fails but write() still returns success
mtd: maps: sa1100-flash: Replace zero-length array with flexible-array member
mtd: phram: fix a double free issue in error path
mtd: spinand: toshiba: Support for new Kioxia Serial NAND
mtd: spinand: toshiba: Rename function name to change suffix and prefix (8Gbit)
mtd: rawnand: macronix: Add support for deep power down mode
mtd: rawnand: Add support for manufacturer specific suspend/resume operation
mtd: spi-nor: Enable locking for n25q512ax3/n25q512a
mtd: spi-nor: Add SR 4bit block protection support
mtd: spi-nor: Add generic formula for SR block protection handling
mtd: spi-nor: Set all BP bits to one when lock_len == mtd->size
mtd: spi-nor: controllers: aspeed-smc: Replace zero-length array with flexible-array member
mtd: spi-nor: Clear WEL bit when erase or program errors occur
MAINTAINERS: update entry after SPI NOR controller move
mtd: spi-nor: Trim what is exposed in spi-nor.h
mtd: spi-nor: Drop the MFR definitions
mtd: spi-nor: Get rid of the now empty spi_nor_ids[] table
...
Add generic device dts for Loongson-3 devices.
They are currently almost identical but will be different later.
Some PCH devices like PCI Host Bridge is still enabled by platform
code for now.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com>
Co-developed-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
a) add DT node for SW1 as Enter button
The SW1 button can be used as a simple one-button keyboard
and is connected to PD17.
Note: SW1 has a second meaning to change the boot sequence
when pressed while powering on.
b) give eth0_power a defined voltage.
This is a 3.3V power switch (DVNET3.3V).
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The infrared sensor on the CI20 board is connected to a GPIO and can
be operated by using the gpio-ir-recv driver. Add a DT node for the
sensor to allow that driver to be used.
Signed-off-by: Alex Smith <alex.smith@imgtec.com>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Nand controller v5.0 and v6.0 have nand edu blocks that enable
dma nand flash transfers. This allows for faster read and write
access.
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Acked-by: Paul Burton <paulburton@kernel.org>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20200122213313.35820-3-kdasu.kdev@gmail.com
Interrupts should not be specified by interrupt line but by
gpio parent and reference.
Fixes: 73f2b94047 ("MIPS: CI20: DTS: Add I2C nodes")
Cc: stable@vger.kernel.org
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
There is a ACT8600 on the CI20 board and the bindings of the
ACT8865 driver have changed without updating the CI20 device
tree. Therefore the PMU can not be probed successfully and
is running in power-on reset state.
Fix DT to match the latest act8865-regulator bindings.
Fixes: 73f2b94047 ("MIPS: CI20: DTS: Add I2C nodes")
Cc: stable@vger.kernel.org
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
The devicetree ABI was broken on purpose by commit 6d532143c9
("watchdog: jz4740: Use regmap provided by TCU driver"), and
commit 1d9c307454 ("watchdog: jz4740: Use WDT clock provided
by TCU driver"). The commit message of the latter explains why the ABI
was broken.
However, the current devicetree files were not updated to the new ABI
described in Documentation/devicetree/bindings/timer/ingenic,tcu.txt,
so the watchdog driver would not probe.
Fix this problem by updating the watchdog nodes to comply with the new
ABI.
Fixes: 6d532143c9 ("watchdog: jz4740: Use regmap provided by TCU driver")
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Zhou Yanjie <zhouyanjie@wanyeetech.com>
Cc: od@zcrc.me
Cc: linux-mips@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: <stable@vger.kernel.org> # v5.5+
The devicetree ABI was broken on purpose by commit 6d532143c9
("watchdog: jz4740: Use regmap provided by TCU driver"), and
commit 1d9c307454 ("watchdog: jz4740: Use WDT clock provided
by TCU driver"). The commit message of the latter explains why the ABI
was broken.
However, the current devicetree files were not updated to the new ABI
described in Documentation/devicetree/bindings/timer/ingenic,tcu.txt,
so the watchdog driver would not probe.
Fix this problem by updating the clock of watchdog node from
"&cgu X1000_CLK_RTCLK" to "&tcu TCU_CLK_WDT" to comply with the new
ABI.
Fixes: 7a16ccd300 ("[v8,1/4] MIPS: Ingenic: Add Ingenic X1000 support.").
Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: paul@crapouillou.net
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: ralf@linux-mips.org
Cc: sernia.zhou@foxmail.com
Cc: zhenwenjin@gmail.com
Cc: dongsheng.qiu@ingenic.com
- Support mremap() for the VDSO, primarily to allow CRIU to restore the
VDSO to its checkpointed location.
- Restore the MIPS32 cBPF JIT, after having reverted the enablement of
the eBPF JIT for MIPS32 systems in the 5.5 cycle.
- Improve cop0 counter synchronization behaviour whilst onlining CPUs by
running with interrupts disabled.
- Better match FPU behaviour when emulating multiply-accumulate
instructions on pre-r6 systems that implement IEEE754-2008 style MACs.
- Loongson64 kernels now build using the MIPS64r2 ISA, allowing them to
take advantage of instructions introduced by r2.
- Support for the Ingenic X1000 SoC & the really nice little CU Neo
development board that's using it.
- Support for WMAC on GARDENA Smart Gateway devices.
- Lots of cleanup & refactoring of SGI IP27 (Origin 2*) support in
preparation for introducing IP35 (Origin 3*) support.
- Various Kconfig & Makefile cleanups.
-----BEGIN PGP SIGNATURE-----
iIwEABYIADQWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXjRnpxYccGF1bGJ1cnRv
bkBrZXJuZWwub3JnAAoJED6nn6y1dQDdNYoA/3ZhgKX1L/hwvkPKwu7FxbL41pjB
WAm8IYDaxPvgxkcSAP9FNNepHK+oBPM8I2e3DvDvmcuYjumztdikzYbJ5HuMBA==
=MV2S
-----END PGP SIGNATURE-----
Merge tag 'mips_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS changes from Paul Burton:
"Nothing too big or scary in here:
- Support mremap() for the VDSO, primarily to allow CRIU to restore
the VDSO to its checkpointed location.
- Restore the MIPS32 cBPF JIT, after having reverted the enablement
of the eBPF JIT for MIPS32 systems in the 5.5 cycle.
- Improve cop0 counter synchronization behaviour whilst onlining CPUs
by running with interrupts disabled.
- Better match FPU behaviour when emulating multiply-accumulate
instructions on pre-r6 systems that implement IEEE754-2008 style
MACs.
- Loongson64 kernels now build using the MIPS64r2 ISA, allowing them
to take advantage of instructions introduced by r2.
- Support for the Ingenic X1000 SoC & the really nice little CU Neo
development board that's using it.
- Support for WMAC on GARDENA Smart Gateway devices.
- Lots of cleanup & refactoring of SGI IP27 (Origin 2*) support in
preparation for introducing IP35 (Origin 3*) support.
- Various Kconfig & Makefile cleanups"
* tag 'mips_5.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (60 commits)
MIPS: PCI: Add detection of IOC3 on IO7, IO8, IO9 and Fuel
MIPS: Loongson64: Disable exec hazard
MIPS: Loongson64: Bump ISA level to MIPSR2
MIPS: Make DIEI support as a config option
MIPS: OCTEON: octeon-irq: fix spelling mistake "to" -> "too"
MIPS: asm: local: add barriers for Loongson
MIPS: Loongson64: Select mac2008 only feature
MIPS: Add MAC2008 Support
Revert "MIPS: Add custom serial.h with BASE_BAUD override for generic kernel"
MIPS: sort MIPS and MIPS_GENERIC Kconfig selects alphabetically (again)
MIPS: make CPU_HAS_LOAD_STORE_LR opt-out
MIPS: generic: don't unconditionally select PINCTRL
MIPS: don't explicitly select LIBFDT in Kconfig
MIPS: sync-r4k: do slave counter synchronization with disabled HW interrupts
MIPS: SGI-IP30: Check for valid pointer before using it
MIPS: syscalls: fix indentation of the 'SYSNR' message
MIPS: boot: fix typo in 'vmlinux.lzma.its' target
MIPS: fix indentation of the 'RELOCS' message
dt-bindings: Document loongson vendor-prefix
MIPS: CU1000-Neo: Refresh defconfig to support HWMON and WiFi.
...
The radio module asserts CTS when its RX buffer has 10 bytes left.
Putting just 8 instead of 16 bytes into the UART1 TX buffer on the Linux
side ensures to not overflow the RX buffer on the radio module side.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
This patch enables the WMAC controller on the GARDENA smart Gateway and
configures the board specific factory EEPROM setting for this driver.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: John Crispin <john@phrozen.org>
Cc: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
This patch adds the WMAC controller description to the MT7628A dtsi file.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: John Crispin <john@phrozen.org>
Cc: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Paul Burton <paulburton@kernel.org>
Cc: linux-mips@vger.kernel.org
Add switch node supported by dsa ar9331 driver.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
This patch adds support for the GARDENA smart Gateway, which is based on
the MediaTek MT7688 SoC. It is equipped with 128 MiB of DDR and 8 MiB of
flash (SPI NOR) and additional 128MiB SPI NAND storage.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Cc: linux-mips@vger.kernel.org
This patch adds the I2C controller description to the MT7628A dtsi file.
Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Cc: linux-mips@vger.kernel.org
It is two registers each of 4 byte.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Merge the Ingenic TCU patchset from the ingenic-tcu-v5.4 branch which
was created to enable follow-on changes in other subsystems.
Signed-off-by: Paul Burton <paul.burton@mips.com>
The default clock (12 MHz) is too fast for the system timer.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: od@zcrc.me
The default clock (48 MHz) is too fast for the system timer.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: od@zcrc.me
The default clock (12 MHz) is too fast for the system timer, which fails
to report time accurately.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: od@zcrc.me
Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Lee Jones <lee.jones@linaro.org>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-doc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-clk@vger.kernel.org
Cc: od@zcrc.me
Move all the platform data to devicetree.
The only bit dropped is the PWM beeper, which requires the PWM driver
to be updated. I figured it's okay to remove it here since it's really
a non-critical device, and it'll be re-introduced soon enough.
The other change is the CS line of the SPI is now set as active low. The
SPI core would have forced "active low" anyway, unless the 'spi-cs-high'
property is set.
In the process of moving to devicetree, we also switched to new drivers:
- We use the simple-audio-card and simple-amplifier drivers instead of
the custom ASoC code;
- We use the new Ingenic DRM driver coupled with the GiantPlus GPM940B0
DRM panel driver instead of the old framebuffer driver;
- We use the new jz4780-dma driver instead of the old jz4740-dma one;
- We use the ingenic-nand and jz4740-ecc drivers instead of the old
jz4740-nand driver;
- We use ingenic-battery instead of jz4740-battery;
- We use iio-hwmon instead of jz4740-hwmon;
- We use ingenic-iio instead of the old jz4740-adc MFD driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
[paul.burton@mips.com:
Drop the unused & undocumented ili8960 spi@0 node.]
Signed-off-by: Paul Burton <paul.burton@mips.com>
Add nodes for the MMC, AIC, ADC, CODEC, MUSB, LCD, memory,
and BCH controllers.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Artur Rojek <contact@artur-rojek.eu>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Move the MMC configuration from the board C file to devicetree.
The 'power' GPIO was removed and instead the vmmc regulator is used,
to follow the changes introduced in the jz4740-mmc driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Now that we have a driver for the clock controller, add nodes to allow
devices to make use of it.
Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: bcm-kernel-feedback-list@broadcom.com
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
- Removal of readq & writeq for MIPS32 kernels where they would simply
BUG() anyway, allowing drivers or other code that #ifdefs on their
presence to work properly.
- Improvements for Ingenic JZ4740 systems, including support for the
external memory controller & pinmuxing fixes for qi_lb60/NanoNote
systems.
- Improvements for Lantiq systems, in particular around SMP & IPIs.
- DT updates for ralink/MediaTek MT7628a systems to probe & configure a
bunch more devices.
- Miscellaneous cleanups & build fixes.
-----BEGIN PGP SIGNATURE-----
iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXS85dBUccGF1bC5idXJ0
b25AbWlwcy5jb20ACgkQPqefrLV1AN2yJwEA6SUzzTXdywxEy78Ala3tzghMjkD5
818q6a9DREGofyIA/ie08di/MIYS9++ETsaQemVXoe7KT333+SgTeXCb1lIJ
=RiKE
-----END PGP SIGNATURE-----
Merge tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Paul Burton:
"A light batch this time around but significant improvements for
certain systems:
- Removal of readq & writeq for MIPS32 kernels where they would
simply BUG() anyway, allowing drivers or other code that #ifdefs on
their presence to work properly.
- Improvements for Ingenic JZ4740 systems, including support for the
external memory controller & pinmuxing fixes for qi_lb60/NanoNote
systems.
- Improvements for Lantiq systems, in particular around SMP & IPIs.
- DT updates for ralink/MediaTek MT7628a systems to probe & configure
a bunch more devices.
- Miscellaneous cleanups & build fixes"
* tag 'mips_5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
MIPS: fix some more fall through errors in arch/mips
MIPS: perf events: handle switch statement falling through warnings
mips/kprobes: Export kprobe_fault_handler()
MAINTAINERS: Add myself as Ingenic SoCs maintainer
MIPS: ralink: mt7628a.dtsi: Add watchdog controller DT node
MIPS: ralink: mt7628a.dtsi: Add SPI controller DT node
MIPS: ralink: mt7628a.dtsi: Add GPIO controller DT node
MIPS: ralink: mt7628a.dtsi: Add pinctrl DT properties to the UART nodes
MIPS: ralink: mt7628a.dtsi: Add pinmux DT node
MIPS: ralink: mt7628a.dtsi: Add SPDX GPL-2.0 license identifier
MIPS: lantiq: Add SMP support for lantiq interrupt controller
MIPS: lantiq: Shorten register names, remove unused macros
MIPS: lantiq: Fix bitfield masking
MIPS: lantiq: Remove unused macros
MIPS: lantiq: Fix attributes of of_device_id structure
MIPS: lantiq: Change variables to the same type as the source
MIPS: lantiq: Move macro directly to iomem function
mips: Remove q-accessors from non-64bit platforms
FDDI: defza: Include linux/io-64-nonatomic-lo-hi.h
MIPS: configs: Remove useless UEVENT_HELPER_PATH
...
This patch adds the watchdog controller description to the MT7628A dtsi
file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
This patch adds the SPI controller description to the MT7628A dtsi file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
This patch adds the GPIO controller description to the MT7628A dtsi file.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Now that pinmux is available, let's use it for the UART DT nodes.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
This patch adds the pinmux DT node using the generic "pinctrl-single"
pinmux driver. For this the system-controller register area needs to be
changed to not overlap with the pinmux registers.
This patch is based on work done by John Crispin.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
As done in commit b24413180f ("License cleanup: add SPDX GPL-2.0
license identifier to files with no license"), this patch adds the SPDX
license identifier to mt7628a.dtsi, which is currently still missing
this identifier.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Paul Burton <paul.burton@mips.com>
Cc: Harvey Hunt <harveyhuntnexus@gmail.com>
Cc: John Crispin <john@phrozen.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add ACL support using the TCAM. Using ACL it is possible to create rules
in hardware to filter/redirect frames.
Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add ethernet nodes supported by ag71xx driver.
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add SPDX license identifiers to all Make/Kconfig files which:
- Have no license information of any form
These files fall under the project license, GPL v2 only. The resulting SPDX
license identifier is:
GPL-2.0-only
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
(GINVT) instructions, allowing for more efficient TLB maintenance when
running on a CPU such as the I6500 that supports these.
- Enable huge page support for MIPS64r6.
- Optimize post-DMA cache sync by removing that code entirely for kernel
configurations in which we know it won't be needed.
- The number of pages allocated for interrupt stacks is now calculated
correctly, where before we would wastefully allocate too much memory
in some configurations.
- The ath79 platform migrates to devicetree.
- The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.
- The ingenic/jz4740 platform gains support for appended devicetrees.
- The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
cleanups as do various pieces of core architecture code.
-----BEGIN PGP SIGNATURE-----
iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCXH3BQxUccGF1bC5idXJ0
b25AbWlwcy5jb20ACgkQPqefrLV1AN1+4wD+Oh4JTfZN/NEOQMlrSkXxjEHqjX3u
1Y6CiiPCs+q2UnYBANb+ic+ZH5MnvJxxmcvlYI2q3rIh4b8TDriip4KMUTUP
=Sw9X
-----END PGP SIGNATURE-----
Merge tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Paul Burton:
- Support for the MIPSr6 MemoryMapID register & Global INValidate TLB
(GINVT) instructions, allowing for more efficient TLB maintenance
when running on a CPU such as the I6500 that supports these.
- Enable huge page support for MIPS64r6.
- Optimize post-DMA cache sync by removing that code entirely for
kernel configurations in which we know it won't be needed.
- The number of pages allocated for interrupt stacks is now calculated
correctly, where before we would wastefully allocate too much memory
in some configurations.
- The ath79 platform migrates to devicetree.
- The bcm47xx platform sees fixes for the Buffalo WHR-G54S board.
- The ingenic/jz4740 platform gains support for appended devicetrees.
- The cavium_octeon, lantiq, loongson32 & sgi-ip27 platforms all see
cleanups as do various pieces of core architecture code.
* tag 'mips_5.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (66 commits)
MIPS: lantiq: Remove separate GPHY Firmware loader
MIPS: ingenic: Add support for appended devicetree
MIPS: SGI-IP27: rework HUB interrupts
MIPS: SGI-IP27: do boot CPU init later
MIPS: SGI-IP27: do xtalk scanning later
MIPS: SGI-IP27: use pr_info/pr_emerg and pr_cont to fix output
MIPS: SGI-IP27: clean up bridge access and header files
MIPS: SGI-IP27: get rid of volatile and hubreg_t
MIPS: irq: Allocate accurate order pages for irq stack
MIPS: dma-noncoherent: Remove bogus condition in dma_sync_phys()
MIPS: eBPF: Remove REG_32BIT_ZERO_EX
MIPS: eBPF: Always return sign extended 32b values
MIPS: CM: Fix indentation
MIPS: BCM47XX: Fix/improve Buffalo WHR-G54S support
MIPS: OCTEON: program rx/tx-delay always from DT
MIPS: OCTEON: delete board-specific link status
MIPS: OCTEON: don't lie about interface type of CN3005 board
MIPS: OCTEON: warn if deprecated link status is being used
MIPS: OCTEON: add fixed-link nodes to in-kernel device tree
MIPS: Delete unused flush_cache_sigtramp()
...
Program rx/tx-delay always from DT.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Currently OCTEON ethernet falls back to phyless operation on
boards where we have no known PHY address or a fixed-link node.
Add fixed-link support for boards that need it, so we can clean up
the platform code and ethernet driver from some legacy code.
Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
DTC introduced an i2c_bus_reg check in v1.4.7, used since Linux v4.20,
which complains about upper case addresses used in the unit name.
nexys4ddr.dts names an I2C device node "ad7420@4B", leading to:
arch/mips/boot/dts/xilfpga/nexys4ddr.dts:109.16-112.8: Warning
(i2c_bus_reg): /i2c@10A00000/ad7420@4B: I2C bus unit address format
error, expected "4b"
Fix this by switching to lower case addresses throughout the file, as is
*mostly* the case in the file already & fairly standard throughout the
tree.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: stable@vger.kernel.org # v4.20+
Cc: linux-mips@vger.kernel.org
The interrupt number set in the devicetree node of the DMA driver was
wrong.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Remove the Malta display platform code in favour of probing the
img-ascii-lcd driver via device tree. This reduces the amount of
platform code & the img-ascii-lcd driver offers us advantages in terms
of code sharing with other boards & functionality such as changing the
displayed message via sysfs. Defconfigs are untouched because the driver
already defaults y on when CONFIG_MIPS_MALTA=y.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21182/
Cc: linux-mips@linux-mips.org
The Intel EG20T Platform Controller Hub used on the MIPS Boston
development board supports prefetching memory to optimize DMA transfers.
Unfortunately for unknown reasons this doesn't work well with some MIPS
CPUs such as the P6600, particularly when using an I/O Coherence Unit
(IOCU) to provide cache-coherent DMA. In these systems it is common for
DMA data to be lost, resulting in broken access to EG20T devices such as
the MMC or SATA controllers.
Support for a DT property to configure the prefetching was added a while
back by commit 549ce8f134 ("misc: pch_phub: Read prefetch value from
device tree if passed") but we never added the DT snippet to make use of
it. Add that now in order to disable the prefetching & fix DMA on the
affected systems.
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/21068/
Cc: linux-mips@linux-mips.org
- kexec support for the generic MIPS platform when running on a CPU
including the MIPS Coherence Manager & related hardware.
- Improvements to the definition of memory barriers used around MMIO
accesses, and fixes in their use.
- Switch to CONFIG_NO_BOOTMEM from Mike Rapoport, finally dropping
reliance on the old bootmem code.
- A number of fixes & improvements for Loongson 3 systems.
- DT & config updates for the Microsemi Ocelot platform.
- Workaround to enable USB power on the Netgear WNDR3400v3.
- Various cleanups & fixes.
-----BEGIN PGP SIGNATURE-----
iIsEABYIADMWIQRgLjeFAZEXQzy86/s+p5+stXUA3QUCW9NfwRUccGF1bC5idXJ0
b25AbWlwcy5jb20ACgkQPqefrLV1AN1LNgD9Hy73DkYnnYeLNLcCe+5QMCr+NO2C
kwIs7kAI40X+/LQA/RgCcg6z4rUSH38hfNEobD6VXva7QiFhiYcJj5rCFH8O
=nDQg
-----END PGP SIGNATURE-----
Merge tag 'mips_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux
Pull MIPS updates from Paul Burton:
- kexec support for the generic MIPS platform when running on a CPU
including the MIPS Coherence Manager & related hardware.
- Improvements to the definition of memory barriers used around MMIO
accesses, and fixes in their use.
- Switch to CONFIG_NO_BOOTMEM from Mike Rapoport, finally dropping
reliance on the old bootmem code.
- A number of fixes & improvements for Loongson 3 systems.
- DT & config updates for the Microsemi Ocelot platform.
- Workaround to enable USB power on the Netgear WNDR3400v3.
- Various cleanups & fixes.
* tag 'mips_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (51 commits)
MIPS: Cleanup DSP ASE detection
MIPS: dts: Change upper case to lower case
MIPS: generic: Add Network, SPI and I2C to ocelot_defconfig
MIPS: Loongson-3: Fix BRIDGE irq delivery problem
MIPS: Loongson-3: Fix CPU UART irq delivery problem
MIPS: Remove unused PREF, PREFE & PREFX macros
MIPS: lib: Use kernel_pref & user_pref in memcpy()
MIPS: Remove unused CAT macro
MIPS: Add kernel_pref & user_pref helpers
MIPS: Remove unused TTABLE macro
MIPS: Remove unused PIC macros
MIPS: Remove unused MOVN & MOVZ macros
MIPS: Provide actually relaxed MMIO accessors
MIPS: Enforce strong ordering for MMIO accessors
MIPS: Correct `mmiowb' barrier for `wbflush' platforms
MIPS: Define MMIO ordering barriers
MIPS: mscc: add PCB120 to the ocelot fitImage
MIPS: mscc: add DT for Ocelot PCB120
MIPS: memset: Limit excessive `noreorder' assembly mode use
MIPS: memset: Fix CPU_DADDI_WORKAROUNDS `small_fixup' regression
...
Change this time round are:
- Support for ColdFire mcf5441x edma controller
- Support for link list mode in sprd dma
- More users of managed dmaenginem_async_device_register API
- Cyclic mode support in owl dma driver
- DT updates for renesas drivers, dma-jz4780 updates and support for
JZ4770, JZ4740 and JZ4725B controllers
- Removal of deprecated dma_slave_config direction in dmaengine drivers,
few more users will be removed in next cycle and eventually users.
- Minor updates to idma64, ioat, pxa, ppc drivers
-----BEGIN PGP SIGNATURE-----
iQIcBAABAgAGBQJb0YtfAAoJEHwUBw8lI4NHJoQP/3JVOPM9Zi6CNnWsGUSGR1Ok
DZyGMJLe92t+EtQyhLfApGypscJifIRTn3IYD1cWBmHReiaWvMJjcZDh5w4L/mbB
LHmUPOuDrw9V2WtN8y9gyX3syjtKZi64OuT5eEbZKCiRAELsiqu0CZs92kXAV7QQ
vo1zCyN0hGivGRi9jkICVbq0yzixwuQsjgkekvw1VChYXQeB6S6UydeEl/HACraO
6a92XdAIMXlvnvTTV5DSldILfQAP+nh8Dp8J/U6kNTEPgrYZDBouNb3foJDv0EA2
7tJ8ryRK5E/ZcqG5enhaATTou/e8fvInazGG1T4rFl0p6UX19Y0kYzP7XD2TrCBJ
ro0bw+BBeKE66lkT/di8vxDzPxDh2COdbbPuAA8vPXX8XJxctGNNiYXiB8dNyHxD
d2SGFVjY4ttrNMENNxNH2jnkfjSGiV4VJdvD/FzKNm6edoG+hRGVh8N8R3hORkKb
9m5Si1zySkZ7jsq/MsUBCfPzpj0vjS7fS4SIsm+WLEm+cmr6m4cAeblhy61lvp9Y
4i0MgkoX+Jh0uP+3czPAtw+TAPHQ3xmLQBNyimDBbk6APXDTez9O4oraYRjru1Ue
IDo3GQO98wV01M8jVZDm/wqfI73XB8z9tARaBAiu5uXh9b+erG13be8l5ZKOHyPE
gd/kPgz70+vKuqtYiC9S
=/pTg
-----END PGP SIGNATURE-----
Merge tag 'dmaengine-4.20-rc1' of git://git.infradead.org/users/vkoul/slave-dma
Pull dmaengine updates from Vinod Koul:
- Support for ColdFire mcf5441x edma controller
- Support for link list mode in sprd dma
- More users of managed dmaenginem_async_device_register API
- Cyclic mode support in owl dma driver
- DT updates for renesas drivers, dma-jz4780 updates and support for
JZ4770, JZ4740 and JZ4725B controllers
- Removal of deprecated dma_slave_config direction in dmaengine
drivers, few more users will be removed in next cycle and eventually
removed.
- Minor updates to idma64, ioat, pxa, ppc drivers
* tag 'dmaengine-4.20-rc1' of git://git.infradead.org/users/vkoul/slave-dma: (66 commits)
dmaengine: ppc4xx: fix off-by-one build failure
dmaengine: owl: Fix warnings generated during build
dmaengine: fsl-edma: remove dma_slave_config direction usage
dmaengine: rcar-dmac: set scatter/gather max segment size
dmaengine: mmp_tdma: remove dma_slave_config direction usage
dmaengine: ep93xx_dma: remove dma_slave_config direction usage
dmaengine: k3dma: remove dma_slave_config direction usage
dmaengine: k3dma: dont use direction for memcpy
dmaengine: imx-dma: remove dma_slave_config direction usage
dmaengine: idma: remove dma_slave_config direction usage
dmaengine: hsu: remove dma_slave_config direction usage
dmaengine: dw: remove dma_slave_config direction usage
dmaengine: jz4740: remove dma_slave_config direction usage
dmaengine: coh901318: remove dma_slave_config direction usage
dmaengine: bcm2835: remove dma_slave_config direction usage
dmaengine: at_hdmac: remove dma_slave_config direction usage
dmaengine: owl: Add Slave and Cyclic mode support for Actions Semi Owl S900 SoC
dmaengine: ioat: fix prototype of ioat_enumerate_channels
dmaengine: stm32-dma: check whether length is aligned on FIFO threshold
dt-bindings: dmaengine: usb-dmac: Add binding for r8a7744
...
All the upper case in unit-address and hex constants are
changed to lower case according to the DT conventions.
Signed-off-by: Songjun Wu <songjun.wu@linux.intel.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Patchwork: https://patchwork.linux-mips.org/patch/20768/
Cc: yixin.zhu@linux.intel.com
Cc: chuanhua.lei@linux.intel.com
Cc: hauke.mehrtens@intel.com
Cc: devicetree@vger.kernel.org
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Philippe Ombredanne <pombredanne@nexb.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Kate Stewart <kstewart@linuxfoundation.org>
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
The Microsemi Ocelot has a set of register for SerDes/switch port muxing
as well as PCIe muxing for a specific SerDes, so let's add the device
and all SerDes in the Device Tree.
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
HSIO contains registers for PLL5 configuration, SerDes/switch port
muxing and a thermal sensor, hence we can't keep it in the switch DT
node.
Acked-by: Paul Burton <paul.burton@mips.com>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add the devicetree nodes for the DMA core of the JZ4740 SoC, disabled
by default, as currently there are no clients for the DMA driver
(until the MMC driver and/or others get a devicetree node).
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Add the two devicetree nodes for the two DMA cores of the JZ4770 SoC,
disabled by default, as currently there are no clients for the DMA
driver (until the MMC driver and/or others get a devicetree node).
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Acked-by: Paul Burton <paul.burton@mips.com>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
The driver now accepts two memory resources, the first one for the
channel-specific registers, the second one for the controller-specific
registers.
Note that older devicetrees, without this commit, will still work with
the jz4780-dma driver.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Tested-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Enable the i2c controller on ocelot PCB123. While there are no i2c devices
on the board itself, it can be used to control the SFP transceivers.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20352/
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: linux-i2c@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Allan Nielsen <allan.nielsen@microchip.com>
Ocelot has an i2c controller, add it. There is only one possible pinmux
configuration so add it as well.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/20353/
Cc: Wolfram Sang <wsa@the-dreams.de>
Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Cc: James Hogan <jhogan@kernel.org>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: linux-i2c@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Allan Nielsen <allan.nielsen@microchip.com>
The binding for the USB PHY went thru before the driver. However the
new version of the driver now use the PHY core support for reset, and
this expect the reset to be named "phy". So remove the "usb-" prefix
from the the reset names.
Signed-off-by: Alban Bedel <albeu@free.fr>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/15282/
Cc: linux-kernel@vger.kernel.org
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Antony Pavlov <antonynpavlov@gmail.com>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Ocelot now has a u-boot port, allow building FIT images instead of relying
on the legacy detection and builtin DTB.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19632/
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Make use of the spi-gpio driver to provide SPI support on the Ingenic
JZ4780 SoC using the pins that can be used with the SSI0 device as
GPIOs, until such time as we have support for the Ingenic SPI/SSI
controller.
[paul.burton@mips.com: Rewrite commit message.]
Signed-off-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Patchwork: https://patchwork.linux-mips.org/patch/19489/
Cc: James Hogan <jhogan@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
- Decrease polling rate for erase/trim/discard
- Allow non-sleeping GPIOs for card detect
- Improve mmc block removal path
- Enable support for mmc_sw_reset() for SDIO cards
- Add mmc_sw_reset() to allow users to do a soft reset of the card
- Allow power delay to be tunable via DT
- Allow card detect debounce delay to be tunable via DT
- Enable new quirk to limit clock rate for Marvell 8887 chip
- Don't show eMMC RPMB and BOOT areas in /proc/partitions
- Add capability to avoid 3.3V signaling for fragile HWs
MMC host:
- Improve/fixup support for handle highmem pages
- Remove depends on HAS_DMA in case of platform dependency
- mvsdio: Enable support for erase/trim/discard
- rtsx_usb: Enable support for erase/trim/discard
- renesas_sdhi: Fix WP logic regressions
- renesas_sdhi: Add r8a77965 support
- renesas_sdhi: Add R8A77980 to whitelist
- meson: Add optional support for device reset
- meson: Add support for the Meson-AXG platform
- dw_mmc: Add new driver for BlueField DW variant
- mediatek: Add support for 64G DRAM DMA
- sunxi: Deploy runtime PM support
- jz4740: Add support for JZ4780
- jz4740: Enable support for DT based platforms
- sdhci: Various improvement to timeout handling
- sdhci: Disable support for HS200/HS400/UHS when no 1.8V support
- sdhci-omap: Add support for controller in k2g SoC
- sdhci-omap: Add workarounds for a couple of Erratas
- sdhci-omap: Enable support for generic sdhci DT properties
- sdhci-cadence: Re-send tune request to deal with errata
- sdhci-pci: Fix 3.3V voltage switch for some BYT-based Intel controllers
- sdhci-pci: Avoid 3.3V signaling on some NI 904x
- sdhci-esdhc-imx: Use watermark levels for PIO access
- sdhci-msm: Improve card detection handling
- sdhci-msm: Add support voltage pad switching
-----BEGIN PGP SIGNATURE-----
iQJLBAABCgA1FiEEugLDXPmKSktSkQsV/iaEJXNYjCkFAlsWMJUXHHVsZi5oYW5z
c29uQGxpbmFyby5vcmcACgkQ/iaEJXNYjCkWhw/9GdsKWGAezGYcBC9fBKVbZgvl
Mu7kTebyQy1N7kbIVD7sBz2ila1O2DhVI9SVS7lVhzFwrG4Hup0szb/mjEQgiOAi
+S2EjKRD3+9sA612fi1uWY+2cXoQiwCHhFZsCS5deL4pYspebzuYRNO5vZD7QlN8
vLHZ85yxBtMSiysDUTRm9MH2EXb9j6PfrHnVKj0ih112U/ip4PZVc7zHGBZq9zzy
6WSUMYBe2d1jajJ6MS3gf5Vrp53mz2OLkxKRCtMgut7YOwLZ8biKVa3G69ruQTm8
jqrMoNrZnhO3aT/1kassCE4ygoXewMZPhYq8k24PcaihR3o/tVI1dlb4Zz70cBb8
AGAdmdzu1sDEzY6KkSVTZ5IaxQo9SNANste/O/LfsOxHWkWxBQ6H0EeqMdt+W7of
A0zGKTQrcTFhxzA9OeX3aZwZhjcipQlf8TWnI5+ayPY/UKwMhvWNCTMQtTJAhqBh
mS7Uk5qd7OSJZTzVYrfLZ2ZOQKhtMbD9lAza/9Ldy5j5QDscLmxmhLOP0yuKI2Zp
92N3JPIGzfK4aKGCLKSA3KhYwuwaicwsXqfJV+cPz9fFtNs8WdHqyU+nslD0Oxm4
v3QZKPJa3LWCezPvWGSSTGLEgOvJtLQtJBefX1Hm6sxLbY12aBgu/iNp5UckGlzW
7zaWXtH8nzYlBKsXf/8=
=MwCT
-----END PGP SIGNATURE-----
Merge tag 'mmc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc
Pull MMC updates from Ulf Hansson:
"MMC core:
- Decrease polling rate for erase/trim/discard
- Allow non-sleeping GPIOs for card detect
- Improve mmc block removal path
- Enable support for mmc_sw_reset() for SDIO cards
- Add mmc_sw_reset() to allow users to do a soft reset of the card
- Allow power delay to be tunable via DT
- Allow card detect debounce delay to be tunable via DT
- Enable new quirk to limit clock rate for Marvell 8887 chip
- Don't show eMMC RPMB and BOOT areas in /proc/partitions
- Add capability to avoid 3.3V signaling for fragile HWs
MMC host:
- Improve/fixup support for handle highmem pages
- Remove depends on HAS_DMA in case of platform dependency
- mvsdio: Enable support for erase/trim/discard
- rtsx_usb: Enable support for erase/trim/discard
- renesas_sdhi: Fix WP logic regressions
- renesas_sdhi: Add r8a77965 support
- renesas_sdhi: Add R8A77980 to whitelist
- meson: Add optional support for device reset
- meson: Add support for the Meson-AXG platform
- dw_mmc: Add new driver for BlueField DW variant
- mediatek: Add support for 64G DRAM DMA
- sunxi: Deploy runtime PM support
- jz4740: Add support for JZ4780
- jz4740: Enable support for DT based platforms
- sdhci: Various improvement to timeout handling
- sdhci: Disable support for HS200/HS400/UHS when no 1.8V support
- sdhci-omap: Add support for controller in k2g SoC
- sdhci-omap: Add workarounds for a couple of Erratas
- sdhci-omap: Enable support for generic sdhci DT properties
- sdhci-cadence: Re-send tune request to deal with errata
- sdhci-pci: Fix 3.3V voltage switch for some BYT-based Intel controllers
- sdhci-pci: Avoid 3.3V signaling on some NI 904x
- sdhci-esdhc-imx: Use watermark levels for PIO access
- sdhci-msm: Improve card detection handling
- sdhci-msm: Add support voltage pad switching"
* tag 'mmc-v4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (104 commits)
mmc: renesas_sdhi: really fix WP logic regressions
mmc: mvsdio: Enable MMC_CAP_ERASE
mmc: mvsdio: Respect card busy time out from mmc core
mmc: sdhci-msm: Remove NO_CARD_NO_RESET quirk
mmc: sunxi: Use ifdef rather than __maybe_unused
mmc: mxmmc: Use ifdef rather than __maybe_unused
mmc: mxmmc: include linux/highmem.h
mmc: sunxi: mark PM functions as __maybe_unused
mmc: Throttle calls to MMC_SEND_STATUS during mmc_do_erase()
mmc: au1xmmc: handle highmem pages
mmc: Allow non-sleeping GPIO cd
mmc: sdhci-*: Don't emit error msg if sdhci_add_host() fails
mmc: sd: Define name for default speed dtr
mmc: core: Move calls to ->prepare_hs400_tuning() closer to mmc code
mmc: sdhci-xenon: use match_string() helper
mmc: wbsd: handle highmem pages
mmc: ushc: handle highmem pages
mmc: mxcmmc: handle highmem pages
mmc: atmel-mci: use sg_copy_{from,to}_buffer
mmc: android-goldfish: use sg_copy_{from,to}_buffer
...
Add phy to switch port connections for PCB123 for internal PHYs.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Signed-off-by: James Hogan <jhogan@kernel.org>
Ocelot has an integrated switch, add support for it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: linux-mips@linux-mips.org
Cc: netdev@vger.kernel.org
Signed-off-by: James Hogan <jhogan@kernel.org>
- The previous node requested a memory area of 0x100 bytes, while the
driver only manipulates four registers present in the first 0x10 bytes.
- The driver requests for the "rtc" clock, but the previous node did not
provide any.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Reviewed-by: Mathieu Malaterre <malat@debian.org>
Acked-by: James Hogan <jhogan@kernel.org>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
Cc: Mathieu Malaterre <malat@debian.org>
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-watchdog@vger.kernel.org
Signed-off-by: James Hogan <jhogan@kernel.org>
Also remove the watchdog platform_device from platform.c, since it
wasn't used anywhere anyway.
Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Wim Van Sebroeck <wim@linux-watchdog.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Mathieu Malaterre <malat@debian.org>
Cc: linux-mips@linux-mips.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
[jhogan@kernel.org: Drop jz4740_wdt_device declaration from header]
Signed-off-by: James Hogan <jhogan@kernel.org>
A dtb.o is generated from nexys4ddr.dts but this is never used since it
has been moved to mips/generic with commit b35565bb16 ("MIPS: generic:
Add support for MIPSfpga").
Fixes: b35565bb16 ("MIPS: generic: Add support for MIPSfpga")
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: <stable@vger.kernel.org> # 4.15+
Patchwork: https://patchwork.linux-mips.org/patch/19244/
Signed-off-by: James Hogan <jhogan@kernel.org>
Now that we have support for JZ480 SoCs in the MMC driver,
let's enable it on the devicetree.
Acked-by: James Hogan <jhogan@kernel.org>
Tested-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.co.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add the devicetree node to support the MMC host controller
available in JZ480 SoCs.
Acked-by: James Hogan <jhogan@kernel.org>
Tested-by: Mathieu Malaterre <malat@debian.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.co.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Add the devicetree node to support the DMA controller found
in JZ480 SoCs.
Tested-by: Mathieu Malaterre <malat@debian.org>
Acked-by: James Hogan <jhogan@kernel.org>
Signed-off-by: Ezequiel Garcia <ezequiel@collabora.co.uk>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
