Commit Graph

36 Commits

Author SHA1 Message Date
Michal Simek
8258cf0d4a arm64: zynqmp: Rename i2c?-gpio to i2c?-gpio-grp
Anything ending with gpio/gpios is taken as gpio phande/description which
is reported as the issue coming from gpio-consumer.yaml schema.
That's why rename the gpio suffix to gpio-grp to avoid name collision.

Link: https://lore.kernel.org/r/94f633e26b7b16cabddb8c7210c2e79208c364da.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2024-01-22 14:10:10 +01:00
Manikanta Guntupalli
ee6c637f38 arm64: zynqmp: Fix open drain warning on ZynqMP
Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT
binding. Similar change was done by commit 8df80c1801 ("ARM: dts: exynos:
Convert to new i2c-gpio bindings").

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a0faf488dde310e1c1c1a676c371e223db6bdca6.1686227712.git.michal.simek@amd.com
2023-07-10 12:05:16 +02:00
Amit Kumar Mahapatra
1d831cade7 arm64: zynqmp: Set qspi tx-buswidth to 4
All ZynqMP boards are setting up tx-buswidth to 1. Due to this the
framework only issues 1-1-1 write commands to the GQSPI driver. But the
GQSPI controller is capable of handling 1-4-4 write commands, so updated
the tx-buswidth to 4.
Using all 4 lines will increase the tx data transfer rate, as now the
tx data will be transferred on four lines instead on single line.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/1f1b0028106d83aa06e0777e91862a07df100fa1.1684767562.git.michal.simek@amd.com
2023-06-05 13:15:02 +02:00
Ashok Reddy Soma
f8673fd570 arm64: zynqmp: Fix usb node drive strength and slew rate
As per design, all input/rx pins should have fast slew rate and 12mA
drive strength. Rest all pins should be slow slew rate and 4mA drive
strength. Fix usb nodes as per this and remove setting of slow slew rate
for all the usb group pins.

Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/379071f44ceb27a0e32d74e13221640922d989d1.1684767562.git.michal.simek@amd.com
2023-06-05 13:15:02 +02:00
Michal Simek
c720a1f5e6 arm64: zynqmp: Describe TI phy as ethernet-phy-id
TI DP83867 is using strapping based on MIO pins. Tristate setup can
influence PHY address. That's why switch description with ethernet-phy-id
compatible string which enable calling reset. PHY itself setups phy address
after power up or reset. Phy reset is done via gpio.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/b49904649a363f40dc9c4d3fa275e42129562082.1684767562.git.michal.simek@amd.com
2023-06-05 13:15:02 +02:00
Michal Simek
4e4ddd3d1d arm64: zynqmp: Switch to amd.com emails
Update my and DPs email address to match current setup.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/108cbbbab29e13d386d38a779fd582f10844a030.1685443337.git.michal.simek@amd.com
2023-06-05 13:14:21 +02:00
Parth Gajjar
37e7894910 arm64: zynqmp: Add mali-400 gpu node for zynqmp
Add mali-400 gpu node for zynqmp.
Enabled gpu node for xilinx boards.

Signed-off-by: Parth Gajjar <parth.gajjar@amd.com>
Signed-off-by: Vishal Sagar <vishal.sagar@amd.com>
Link: https://lore.kernel.org/r/20230321070619.29440-3-parth.gajjar@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
2023-05-12 13:23:07 +02:00
Krzysztof Kozlowski
228e8a88b1 arm64: dts: xilinx: align gpio-key node names with dtschema
The node names should be generic and DT schema expects certain pattern
(e.g. with key/button/switch).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220616005333.18491-30-krzysztof.kozlowski@linaro.org
Signed-off-by: Michal Simek <michal.simek@amd.com>
2022-06-23 10:11:19 +02:00
Michal Simek
b61c4ff951 arm64: zynqmp: Enable xlnx,zynqmp-dwc3 driver for xilinx boards
The commit 84770f028f ("usb: dwc3: Add driver for Xilinx platforms")
finally add proper support for Xilinx dwc3 driver. This patch is adding DT
description for it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.kernel.org/r/640a3bc0dc3e32560d3e84c2f78b5ae561396eb0.1628244703.git.michal.simek@xilinx.com
2021-09-13 08:55:56 +02:00
Michal Simek
adc40ff803 arm64: zynqmp: Remove not documented is-dual property
Remove is-dual not documented property and also update comment about QSPI
sizes to reflect dual configuration as 16MB + 16MB.
Only single configuration is supported now.

Reported-by: Quanyang Wang <quanyang.wang@windriver.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/876c53b92f99623bae45d5c0c5ae79ee3e24f745.1628239345.git.michal.simek@xilinx.com
2021-09-13 08:55:55 +02:00
Michal Simek
31533c2176 arm64: zynqmp: Remove description for 8T49N287 and si5382 chips
Based on commit 73d677e9f3 ("arm64: dts: zynqmp: Remove si5328 device
nodes") also remove description for clock chips which don't have Linux
driver yet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/7557288230567fa136ba3edc004d5bfe4f4c6590.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:55 +02:00
Michal Simek
56e5460151 arm64: zynqmp: Wire qspi on multiple boards
Couple of boards have qspi on the board that's why enable controller and
describe them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/01a69ee6590245b5bee70a2553f6faac0d31ca76.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:55 +02:00
Michal Simek
1d4bd118c9 arm64: zynqmp: Add note about UHS mode on some boards
Add note about UHS mode and add no-1-8-v property to zc1751-dc1 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/462b95844e7aedb00768035913265d7af90c3b2f.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:54 +02:00
Michal Simek
d65ec93f21 arm64: zynqmp: Add nvmem alises for eeproms
Use nvmem alias to point to eeprom memory which contains information about
board. The change is done based on discussion in the link below.

Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9b860b47ec3ca64340b4d29317e92b667236d7d1.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:54 +02:00
Michal Simek
2f6aa2a51a arm64: zynqmp: Disable WP on zcu111
On this board there is SD slot without WP connected.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/88e41d4f5c6a7353762bd5ad38b92ce352c3a123.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:53 +02:00
Michal Simek
8b698f1b98 arm64: zynqmp: Add phy description for usb3.0
usb3.0 requires serdes setting that's why also wire it up.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cd856e5f87bc967373691d04e79de3d0022ef424.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:53 +02:00
Michal Simek
b20c1e4d1f arm64: zynqmp: Correct zcu111 psgtr description
DP and SATA psgtrs are swapped.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d47cbf374423cb71bb4be5e45e3d834da0c4673a.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:52 +02:00
Michal Simek
c821045f18 arm64: zynqmp: Add pinctrl description for all boards
The commit 1dccb5ec01 ("dt-bindings: pinctrl: Add binding for ZynqMP
pinctrl driver") and commit 8b242ca700 ("pinctrl: Add Xilinx ZynqMP
pinctrl driver support") add support for Xilinx ZynqMP pinctrl driver
that's why describe pins configuration for current boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d8bc42600da85f5a23d977d4b61e6528720573e5.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:52 +02:00
Michal Simek
d8e4bc0b91 arm64: zynqmp: Fix irps5401 device nodes
- Add compatible string for irps5401 chip.
- Do not use irps54012 as device node which is not correct.
- Fix addresses of irps5401/u180 on zcu104 revisions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/10bf5f9e7a18579626fb1850e3a8a7476ba6f2ed.1623684253.git.michal.simek@xilinx.com
2021-09-13 08:55:52 +02:00
Laurent Pinchart
55563399bb arm64: dts: zynqmp: Wire up the DisplayPort subsystem
Enable the dpsub device and wire it up to the PS-GTR PHY lanes routed to
the DisplayPort connector.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9769d4d103b6eb75e3324825117f6832a746004e.1611232558.git.michal.simek@xilinx.com
2021-02-01 10:40:37 +01:00
Michal Simek
63481699d6 arm64: dts: zynqmp: Add missing mio-bank properties to sdhcis
Add missing xlnx,mio-bank property to sdhci nodes. Also add properties with
0 value to have it listed in case that files are copied to different
projects where default case doesn't need to be handled in the same way.
That's why explicitly list them too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/dbdfcc1b25af8b28fc658a37ce18902978cb410d.1611224800.git.michal.simek@xilinx.com
2021-02-01 10:36:30 +01:00
Michal Simek
51733f16c6 arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106
Enable psgtr driver and write clocks property to get sata to work.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/80b52ef97501968ee97fc152363bc4b9b7bb2cff.1611224800.git.michal.simek@xilinx.com
2021-02-01 10:36:26 +01:00
Michal Simek
928a574759 arm64: dts: zynqmp: Enable si5341 driver for zcu102/106/111
Enable si5341 driver is the main chip for providing preprogrammed clocks
for the whole platform.

 # cat /sys/kernel/debug/clk/clk_summary
...
 refhdmi                              1        1        0   114285000          0     0  50000
    xtal_0                            0        0        0   114285000          0     0  50000
       pll_0                          0        0        0 40731174000000          0     0  50000
          clk1_0                      0        0        0    27000000          0     0  50000
          clk0_0                      0        0        0    27000000          0     0  50000
 ref48M                               1        2        0    48000000          0     0  50000
    si5341                            0        4        0    14000000          0     0  50000
       clock-generator.N4             0        0        0           0          0     0  50000
       clock-generator.N3             0        1        0   733260000          0     0  50000
          clock-generator.9           0        1        0    33330000          0     0  50000
       clock-generator.N2             0        1        0   104000000          0     0  50000
          clock-generator.2           0        1        0    26000000          0     0  50000
       clock-generator.N1             0        2        0   594000000          0     0  50000
          clock-generator.7           0        1        0    74250000          0     0  50000
          clock-generator.0           0        1        0    27000000          0     0  50000
       clock-generator.N0             0        4        0  1000000000          0     0  50000
          clock-generator.8           0        0        0           0          0     0  50000
          clock-generator.6           0        1        0   125000000          0     0  50000
          clock-generator.5           0        1        0   100000000          0     0  50000
          clock-generator.4           0        1        0   100000000          0     0  50000
          clock-generator.3           0        1        0   125000000          0     0  50000
          clock-generator.1           0        0        0           0          0     0  50000
...

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/b93f13297684704a60e8d7274009a20aa98d14f7.1611224800.git.michal.simek@xilinx.com
2021-02-01 10:36:09 +01:00
Michal Simek
5f816e36e3 arm64: dts: zynqmp: Fix u48 si5382 chip on zcu111
u48 chip on zcu111 is si5382 not si5328.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cefda1a894fb54059aa1b018e4ecad0eb36fdc9d.1611224800.git.michal.simek@xilinx.com
2021-02-01 10:36:05 +01:00
Michal Simek
9529be140f arm64: zynqmp: Add label property to all ina226 on zcu111
Label property is adding capability to distiguish chips from each other
when iio framework is used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09 14:56:46 +01:00
Michal Simek
2fe8397833 arm64: zynqmp: Enable iio-hwmon for ina226 on zcu111
ina226 hwmon driver is deprecated and it is recommended to use new iio
based driver. The patch is enabling iio-hwmon driver to export
functionality from IIO to hwmon interface to be able to use lm-sensors
package.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09 14:56:46 +01:00
Venkatesh Yadav Abbarapu
25ef9bb6c2 arm64: zynqmp: Fix the si570 clock frequency on zcu111
The si570 clock frequency should be 156.25MHz as per datasheet.

Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09 14:48:44 +01:00
Michal Simek
48b44b9090 arm64: zynqmp: Setup clock-output-names for si570 chips
If there are more instances of si570 clock-output-names property
should be used for differentiation of clock output.
The patch is adding this optional properties for all zynqmp boards with
si570 chip.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09 14:48:44 +01:00
Michal Simek
13d21eba78 arm64: zynqmp: Use ethernet-phy as node name for ethernet phys
Ethernet phys based on devicetree specification should be using
ethernet-phy@ node name instead of pure phy@.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09 14:48:20 +01:00
Rajan Vaja
9c8a47b484 arm64: dts: xilinx: Add the clock nodes for zynqmp
Add clock nodes for zynqmp based on CCF.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2020-01-09 14:21:39 +01:00
Anurag Kumar Vulisha
df906cf54b arm64: zynqmp: Add dr_mode property to usb node
This patch adds dr_mode property to the usb node for
zynqmp boards.

Signed-off-by: Anurag Kumar Vulisha <anurag.kumar.vulisha@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-12-12 15:41:04 +01:00
Harini Katakam
78c484a55d arm64: zynqmp: dt: Add TI PHY quirk
Add TI PHY strap ctrl quirk for all the HW where applicable.

Signed-off-by: Harini Katakam <harini.katakam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2019-03-18 15:59:08 +01:00
Michal Simek
d1d4445abf arm64: dts: zynqmp: Fix node names which contain "_"
s/_/-/ for node names.

It fixes warnings like this:
... Warning (node_name_chars_strict): /cpu_opp_table:
Character '_' not recommended in node name ...

Issues reported by make dtbs W=12

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-16 09:17:49 +01:00
Sudeep Holla
1696acf44e arm64: dts: zynqmp: replace gpio-key,wakeup with wakeup-source property
Most of the legacy "gpio-key,wakeup" boolean property is already
replaced with "wakeup-source". However few occurrences of old property
has popped up again, probably from the remnants in downstream trees.

This patch replaces the legacy properties with the unified
"wakeup-source" property introduced by:
"Input: gpio_keys - switch to using generic device properties"
(sha1: 700a38b27e)

Cc: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-11-06 12:52:49 +01:00
Michal Simek
e4c986bb46 arm64: dts: zynqmp: Remove #address/#size-cells from gpio-keys
dts reports incorrect usage of these properties in gpio-keys node.
Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary

The patch is removing these useless properties.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-07-19 09:48:23 +02:00
Michal Simek
b8aee0229d arm64: zynqmp: Add support for Xilinx zcu111-revA
Xilinx zcu111 is a customer board. It is reusing some parts from zcu102.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
2018-03-08 08:06:50 +01:00