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9 Commits

Author SHA1 Message Date
Michal Simek
8258cf0d4a arm64: zynqmp: Rename i2c?-gpio to i2c?-gpio-grp 
Anything ending with gpio/gpios is taken as gpio phande/description which
is reported as the issue coming from gpio-consumer.yaml schema.
That's why rename the gpio suffix to gpio-grp to avoid name collision.

Link: https://lore.kernel.org/r/94f633e26b7b16cabddb8c7210c2e79208c364da.1704728353.git.michal.simek@amd.com
Signed-off-by: Michal Simek <michal.simek@amd.com>
 2024-01-22 14:10:10 +01:00
Michal Simek
2da2ac3c8d arm64: xilinx: Put ethernet phys to mdio node 
All zynqmp boards have been already described via mdio node that's why also
convert zc1751. With using mdio node there is an option to add reset
property for the whole mdio bus.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/dc228a27579b48f3e768fcb439d118b4a0f0ef5b.1695040866.git.michal.simek@amd.com
 2023-12-13 16:52:47 +01:00
Manikanta Guntupalli
ee6c637f38 arm64: zynqmp: Fix open drain warning on ZynqMP 
Mark both GPIO lines as GPIO_OPEN_DRAIN which is required by i2c-gpio DT
binding. Similar change was done by commit 8df80c1801 ("ARM: dts: exynos:
Convert to new i2c-gpio bindings").

Signed-off-by: Manikanta Guntupalli <manikanta.guntupalli@amd.com>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/a0faf488dde310e1c1c1a676c371e223db6bdca6.1686227712.git.michal.simek@amd.com
 2023-07-10 12:05:16 +02:00
Michal Simek
4e4ddd3d1d arm64: zynqmp: Switch to amd.com emails 
Update my and DPs email address to match current setup.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/108cbbbab29e13d386d38a779fd582f10844a030.1685443337.git.michal.simek@amd.com
 2023-06-05 13:14:21 +02:00
Michal Simek
69f8aec4f9 arm64: zynqmp: Add missing mio-bank properties to dc1 and dc5 
Add missing mio-bank properties to zc1751 dc1 and dc5 boards.
The same change was done by commit 63481699d6 ("arm64: dts: zynqmp: Add
missing mio-bank properties to sdhcis").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2b2ab31639c706651dfd319f5b6bc59e68f111b6.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
c821045f18 arm64: zynqmp: Add pinctrl description for all boards 
The commit 1dccb5ec01 ("dt-bindings: pinctrl: Add binding for ZynqMP
pinctrl driver") and commit 8b242ca700 ("pinctrl: Add Xilinx ZynqMP
pinctrl driver support") add support for Xilinx ZynqMP pinctrl driver
that's why describe pins configuration for current boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d8bc42600da85f5a23d977d4b61e6528720573e5.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:52 +02:00
Michal Simek
13d21eba78 arm64: zynqmp: Use ethernet-phy as node name for ethernet phys 
Ethernet phys based on devicetree specification should be using
ethernet-phy@ node name instead of pure phy@.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2020-01-09 14:48:20 +01:00
Rajan Vaja
9c8a47b484 arm64: dts: xilinx: Add the clock nodes for zynqmp 
Add clock nodes for zynqmp based on CCF.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2020-01-09 14:21:39 +01:00
Michal Simek
e2fc49e198 arm64: zynqmp: Add support for Xilinx zc1751 
Xilinx zc1751 boards is used for silicon validation. Board can be
extended with 5 FMCs/DCs cards to connect various IPs. Describe all
these combinations.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
 2018-03-08 08:06:53 +01:00