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4 Commits

Author SHA1 Message Date
Nobuhiro Iwamatsu
340657b179 arm64: dts: visconti: Update the clock providers for SPI 
Remove fixed clock and source common clock for SPI.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-5-nobuhiro1.iwamatsu@toshiba.co.jp/
 2022-05-10 11:18:01 +09:00
Nobuhiro Iwamatsu
27b754902d arm64: dts: visconti: Update the clock providers for watchdog timer 
Remove fixed clock and source common clock for watchdog timer.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-4-nobuhiro1.iwamatsu@toshiba.co.jp/
 2022-05-10 11:17:28 +09:00
Nobuhiro Iwamatsu
0e7cd4395b arm64: dts: visconti: Update the clock providers for I2C 
Replace I2C clock with common clock framework.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Link: https://lore.kernel.org/r/20220510015229.139818-3-nobuhiro1.iwamatsu@toshiba.co.jp/
 2022-05-10 11:17:00 +09:00
Yuji Ishikawa
518d432fd5 arm64: dts: visconti: Add DTS for the VisROBO board 
This board consists of two boards:
the SoM board (VRC SoM) with the SoC on board, and the board for I/O (VRB).

The functions of each board supported by this update are as follows:
  - VRC SoM
    - WDT
    - GPIO
    - SDCard (SPI-MMC mode)
    - I2C x1
  - VRB board
    - VRC SoM
    - UART x2
    - Ethernet phy

Signed-off-by: Yuji Ishikawa <yuji2.ishikawa@toshiba.co.jp>
Link: https://lore.kernel.org/r/20211014092703.15251-4-yuji2.ishikawa@toshiba.co.jp
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
 2021-10-16 07:09:42 +09:00