Commit Graph

1 Commits

Author SHA1 Message Date
Siddharth Vadapalli
7c4270de28 arm64: dts: ti: k3-j784s4-evm: Add overlay for PCIe0 and PCIe1 EP Mode
Add overlay to enable the PCIe0 and PCIe1 instances of PCIe on J784S4-EVM
in Endpoint mode of operation.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20240529082259.1619695-4-s-vadapalli@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-06-12 21:39:40 +05:30