Commit Graph

26 Commits

Author SHA1 Message Date
Chintan Vankar
d6ad164e05 arm64: dts: ti: k3-am62p5-sk: Add bootph-all property to enable Ethernet boot
Ethernet boot requires CPSW nodes to be present starting from R5 SPL
stage. Add bootph-all property to required nodes to enable Ethernet boot
for AM62P5-SK.

Reviewed-by: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Chintan Vankar <c-vankar@ti.com>
Link: https://lore.kernel.org/r/20250709105326.232608-3-c-vankar@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-07-10 09:50:14 +05:30
Devarsh Thakkar
b05a6c1450 arm64: dts: ti: k3-am62p5-sk: Enable IPC with remote processors
For each remote proc, reserve memory for IPC and bind the mailbox
assignments. Two memory regions are reserved for each remote processor.
The first region of 1MB of memory is used for Vring shared buffers
and the second region is used as external memory to the remote processor
for the resource table and for tracebuffer allocations.

Signed-off-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Hari Nagalla <hnagalla@ti.com>
Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20250502220325.3230653-8-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2025-05-06 07:29:51 -05:00
Rishikesh Donadkar
90770c243c arm64: dts: ti: k3-am62p5-sk: Add regulator nodes for AM62P
Add regulator node for AM62P-SK

VCC_3V3_MAIN is the output of LM5141-Q1, and it serves as an input to
TPS22965DSGT which produces VCC_3V3_SYS [1]

VCC_3V3_SYS servers as vin-supply for peripherals like CSI [1].

Link: https://www.ti.com/lit/zip/sprr487 [1]
Reviewed-by: Devarsh Thakkar <devarsht@ti.com>
Signed-off-by: Rishikesh Donadkar <r-donadkar@ti.com>
Link: https://lore.kernel.org/r/20250502162539.322091-2-r-donadkar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2025-05-06 07:27:06 -05:00
Judith Mendez
ef839ba814 arm64: dts: ti: k3-am6*: Remove disable-wp for eMMC
Remove disable-wp flag for eMMC nodes since this flag is
only applicable to SD according to the binding doc
(mmc/mmc-controller-common.yaml).

For eMMC, this flag should be ignored but lets remove
anyways to cleanup sdhci nodes.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Moteen Shah <m-shah@ti.com>
Link: https://lore.kernel.org/r/20250429151454.4160506-4-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2025-05-02 08:14:05 -05:00
Judith Mendez
d16e7d3435 arm64: dts: ti: k3-am62*: Add non-removable flag for eMMC
EMMC device is non-removable so add 'non-removable' DT
property to avoid having to redetect the eMMC after
suspend/resume.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Link: https://lore.kernel.org/r/20250429151454.4160506-3-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2025-05-02 08:14:05 -05:00
Judith Mendez
b2fd55f906 arm64: dts: ti: k3-am62p5-sk: Enable PWM
PWM signals can be routed to the user expansion header on am62p5
SK. Enable eCAP0, eCAP1, eHRPWM0, eHRPWM1 and route the output PWM
signals to pins on J4 header.

Signed-off-by: Judith Mendez <jm@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20250422000851.4118545-2-jm@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2025-04-25 15:58:13 -05:00
Vibhore Vardhan
8b0f601f98 arm64: dts: ti: k3-am62p5-sk: Add serial alias
Add alias for mcu_uart0.

Signed-off-by: Vibhore Vardhan <vibhore@ti.com>
Signed-off-by: Markus Schneider-Pargmann <msp@baylibre.com>
Link: https://lore.kernel.org/r/20250203-topic-am62-serial-aliases-v6-14-v1-3-f26d4124a9f1@baylibre.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-03-02 18:43:33 +05:30
Siddharth Vadapalli
115290c112 arm64: dts: ti: k3-am62p5-sk: Support SoC wakeup using USB1 wakeup
After the SoC has entered the Deep Sleep mode, USB1 can be used to wakeup
the SoC based on USB events triggered by USB devices. This requires that
the pin corresponding to the Type-A connector remains pulled up even after
the SoC has entered the Deep Sleep mode. Hence, enable Deep Sleep pullup /
pulldown selection for the USB1_DRVBUS pin and set its Deep Sleep state to
PULL_UP.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20250130062550.1554651-1-s-vadapalli@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-03-02 18:43:33 +05:30
Siddharth Vadapalli
732c4cffe4 arm64: dts: ti: k3-am62p5-sk: Add boot phase tag for USB0
The USB0 instance of USB on AM62Px SoC can be used for USB DFU boot. This
requires USB0 to be enabled at all stages of the boot process. In order to
support USB DFU boot on AM62P5-SK, add the "bootph-all" property to USB0.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Link: https://lore.kernel.org/r/20250122124223.1118789-3-s-vadapalli@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2025-03-02 18:43:32 +05:30
Andrew Davis
61c1c774d3 arm64: dts: ti: k3-am62p: Enable Mailbox nodes at the board level
Mailbox nodes defined in the top-level J722s/AM62p SoC dtsi files are
incomplete and may not be functional unless they are extended with a
chosen interrupt and connection to a remote processor.

Disable the Mailbox nodes in the dtsi files and only enable the ones
that are actually used on a given board.

Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20241203174114.94751-1-afd@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2025-01-02 09:53:16 -06:00
Bryan Brattlof
50f5ad2cb5 arm64: dts: ti: k3-am62p5-sk: add 1.4ghz opp entry
The AM62Px reference board is capable of supplying 0v85 to the VDD_CORE
which allows the Cortex-A53s to operate at 1.4GHz according to chapter
6.6 of the SoC's data sheet[0] . Append the 1.4Ghz entry to the OPP
table to enable this frequency

[0] https://www.ti.com/lit/ds/symlink/am62p-q1.pdf

Signed-off-by: Bryan Brattlof <bb@ti.com>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Link: https://lore.kernel.org/r/20241008132052.407994-5-d-gole@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-11-03 11:29:57 +05:30
Vibhore Vardhan
0c95ffb74e arm64: dts: ti: k3-am62p5-sk: Remove CTS/RTS from wkup_uart0 pinctrl
wkup_uart0 is a reserved node that is used by Device Manager firmware.
Only TX and RX pins are required for the firmware and enabling pinctrl
for CTS and RTS breaks the wakeup functionality of wkup_uart0. Drop the
conflicting muxes.

Signed-off-by: Vibhore Vardhan <vibhore@ti.com>
Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20240826-am62p-v1-1-b713b48628d1@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2024-08-28 12:31:33 -05:00
Dhruva Gole
28a950c404 arm64: dts: ti: k3-am62p5-sk: fix graph_child_address warnings
Fix the following warnings that are thrown when building dtbs with W=1:

../arch/arm64/boot/dts/ti/k3-am62p5-sk.dts:367.10-376.6: Warning (graph_child_address): /bus@f0000/i2c@20000000/usb-power-controller@3f/connector/ports: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
../arch/arm64/boot/dts/ti/k3-am62p-j722s-common-main.dtsi:647.22-657.5: Warning (graph_child_address): /bus@f0000/usb@f900000/usb@31000000: graph node has single child node 'port@0', #address-cells/#size-cells are not necessary
  also defined at ../arch/arm64/boot/dts/ti/k3-am62p5-sk.dts:517.7-528.3

Cc: Roger Quadros <rogerq@kernel.org>
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Link: https://lore.kernel.org/r/20240626101520.1782320-2-d-gole@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-07-01 21:36:07 +05:30
Jai Luthra
e96e36ce1f arm64: dts: ti: k3-am62p5-sk: Fix pinmux for McASP1 TX
On SK-AM62P, McASP1 uses two pins for communicating with the codec over
I2S protocol. One of these pins (AXR0) is used for audio playback (TX)
so the direction of the pin should be OUTPUT.

Fixes: c00504ea42 ("arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM")
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20240606-mcasp_fifo_drop-v2-7-8c317dabdd0a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-06-12 21:31:28 +05:30
Jai Luthra
d3fe4b4e2e arm64: dts: ti: k3-am62p5: Drop McASP AFIFOs
McASP AFIFOs are not necessary with UDMA-P/BCDMA as there is buffering
on the DMA IP. Drop these for better audio latency.

Fixes: c00504ea42 ("arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM")
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20240606-mcasp_fifo_drop-v2-3-8c317dabdd0a@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-06-12 21:31:28 +05:30
Roger Quadros
c1453d3c3e arm64: dts: ti: k3-am62p: add the USB sub-system
There are two USB instances available on the am62p5 starter kit. Include
and enable them for use on the board.

USB LPM feature is kept disabled as it is not supported.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Roger Quadros <rogerq@kernel.org>
Reviewed-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240412-for-v6-10-am62-usb-typec-dt-v7-2-93b827adf97e@kernel.org
Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-29 14:35:28 -05:00
Michael Walle
ff369c9eb6 arm64: dts: ti: k3-{am62p,j722s}: Disable ethernet by default
Device tree best practice is to disable any external interface in the
dtsi and just enable them if needed in the device tree. Thus, disable
the ethernet switch and its ports by default and just enable the ones
used by the EVMs in their device trees.

There is no functional change.

Signed-off-by: Michael Walle <mwalle@kernel.org>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240403101545.3932437-1-mwalle@kernel.org
Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09 19:29:15 -05:00
Krzysztof Kozlowski
45ab8daed5 arm64: dts: ti: k3-am62p5-sk: minor whitespace cleanup
The DTS code coding style expects exactly one space before '{'
character.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240208105146.128645-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Nishanth Menon <nm@ti.com>
2024-04-09 11:18:56 -05:00
Judith Mendez
5f0e6ce354 arm64: dts: ti: k3-am6*: Add bootph-all property in MMC node
Add missing bootph-all property for AM62p MMC0 and AM64x
MMC0 nodes.

Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240213235701.2438513-10-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19 12:02:47 +05:30
Judith Mendez
eea929f0e0 arm64: dts: ti: k3-am6*: Remove DLL properties for soft PHYs
Remove DLL properties which are not applicable for soft PHYs
since these PHYs do not have a DLL to enable.

Acked-by: Francesco Dolcini <francesco.dolcini@toradex.com> # Verdin AM62
Signed-off-by: Judith Mendez <jm@ti.com>
Tested-by: Wadim Egorov <w.egorov@phytec.de>
Link: https://lore.kernel.org/r/20240213235701.2438513-7-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19 12:02:47 +05:30
Judith Mendez
37f2816551 arm64: dts: ti: k3-am62p: Add ITAP/OTAP values for MMC
Add OTAP/ITAP values to enable HS400 timing for MMC0 and
SDR104 timing for MMC1/MMC2. Remove no-1-8-v property to
enable the highest speed mode possible.

Update MMC OTAP/ITAP values according to the datasheet
[0], refer to Table 7-79 for MMC0 and Table 7-97 for MMC1/MMC2.

[0] https://www.ti.com/lit/ds/symlink/am62p.pdf

Signed-off-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20240213235701.2438513-6-jm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-19 12:02:47 +05:30
Nishanth Menon
20f8173afa arm64: dts: ti: k3-am62p: Add MIT license along with GPL-2.0
Modify license to include dual licensing as GPL-2.0-only OR MIT
license for SoC and TI evm device tree files. This allows for Linux
kernel device tree to be used in other Operating System ecosystems
such as Zephyr or FreeBSD.

While at this, update the GPL-2.0 to be GPL-2.0-only to be in sync
with latest SPDX conventions (GPL-2.0 is deprecated).

While at this, update the TI copyright year to sync with current year
to indicate license change (and add it at least for one file which was
missing TI copyright).

Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20240122145539.194512-5-nm@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-06 18:20:43 +05:30
Ravi Gunasekaran
8839a9af39 arm64: dts: ti: k3-am62p5-sk: Enable CPSW MDIO node
Enable the CPSW MDIO node, and link the pinctrl information to enable
ethernet on SK-AM62P.

Ethernet was unintentally broken on this board, even though these nodes
were already present, as enabling them was missed in the original
patch.

Fixes: c00504ea42 ("arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM")
Signed-off-by: Ravi Gunasekaran <r-gunasekaran@ti.com>
Signed-off-by: Jai Luthra <j-luthra@ti.com>
Link: https://lore.kernel.org/r/20240201-am62p_cpsw_mdio-v1-1-05f758300f6e@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2024-02-05 20:19:14 +05:30
Vignesh Raghavendra
1b3014a65a arm64: dts: ti: k3-am62p5-sk: Mark mcu gpio and mcu_gpio_intr as reserved
These are typically under MCU Firmware usage. Hence mark them reserved.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20231110132508.3137454-2-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-12-01 02:37:34 -06:00
Vignesh Raghavendra
c00504ea42 arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM
Update the am62p5-sk board file to enable the new IPs introduced
in the SoC dtb.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20231019223055.1574125-6-bb@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
2023-10-20 09:50:18 +05:30
Bryan Brattlof
935c4047d4 arm64: dts: ti: Add support for the AM62P5 Starter Kit
Add basic support for the AM62P5 SK with UART console and
ramdisk as rootfs.

Schematics is at https://www.ti.com/lit/zip/sprr487

Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Reviewed-by: Dhruva Gole <d-gole@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230811184432.732215-4-vigneshr@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
2023-08-11 16:04:24 -05:00