Commit Graph

9 Commits

Author SHA1 Message Date
Andy Yan
abfe411af8 arm64: dts: rockchip: Enable HDMI audio outputs for Cool Pi CM5 EVB
Enable audio outputs for two HDMI ports on Cool Pi CM5 EVB

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20250419121326.388298-3-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22 13:30:37 +02:00
Andy Yan
85e3fd3720 arm64: dts: rockchip: Enable HDMI1 on Cool Pi CM5 EVB
Enable the second HDMI output port on Cool Pi CM5 EVB

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20250419121326.388298-2-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22 13:30:37 +02:00
Andy Yan
9968516246 arm64: dts: rockchip: Rename hdmi-con to hdmi0-con for Cool Pi CM5 EVB
There are two hdmi connector on Cool Pi CM5 EVB, the current supported
is hdmi0, assign corresponding index to it. It will be convenient for
us to add support for another one.

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20250419121326.388298-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-04-22 13:30:37 +02:00
Damon Ding
2efdb04101 arm64: dts: rockchip: Fix label name of hdptxphy for RK3588
The hdptxphy is a combo transmit-PHY for HDMI2.1 TMDS Link, FRL Link, DP
and eDP Link. Therefore, it is better to name it hdptxphy0 other than
hdptxphy_hdmi0, which will be referenced by both hdmi0 and edp0 nodes.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Link: https://lore.kernel.org/r/20250206030330.680424-3-damon.ding@rock-chips.com
[added armsom-sige7, where hdmi-support was added recently and also
 the hdptxphy0-as-dclk source I just added]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-06 12:04:51 +01:00
Johan Jonker
5c96e63301 arm64: dts: rockchip: adapt regulator nodenames to preferred form
The preferred nodename for fixed-regulators has changed to
pattern: '^regulator(-[0-9]+v[0-9]+|-[0-9a-z-]+)?$'

Fix all Rockchip DT regulator nodenames.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/0ae40493-93e9-40cd-9ca9-990ae064f21a@gmail.com
[adapted rebased on top of a number of other changes and included
 neu6a-wifi + wolfvision-pf5-io-expander overlays]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-11-11 16:31:34 +01:00
Andy Yan
ec70819521 arm64: dts: rockchip: Enable HDMI0 for rk3588 Cool Pi CM5 EVB
As the hdmi-qp controller recently get merged, we can enable the
HDMI0 display on this board now.

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20241028123503.384866-2-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-11-11 16:31:34 +01:00
Andy Yan
5556a8c3af arm64: dts: rockchip: Fix the num-lanes of pcie3x4 on Cool Pi CM5 EVB
The 4 lane pcie30 phy is shared by pcie3x4 and pcie3x2, so
the num-lanes of pcie3x4 should be 2.

Fixes: 791c154c39 ("arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB")
Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20240201121106.1471301-4-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04 11:09:32 +01:00
Andy Yan
c7e8dbb3bc arm64: dts: rockchip: rename vcc5v0_usb30_host regulator for Cool Pi CM5 EVB
According to the schematic, USB20 HOST0 and HOST1 each have their own
independent power supply, but these two regulators controlled by a
same GPIO, so give it a more appropriate name.

Fixes: 791c154c39 ("arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB")
Signed-off-by: Andy Yan <andyshrk@163.com>
Reviewed-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/20240201121106.1471301-3-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-02-04 11:09:32 +01:00
Andy Yan
791c154c39 arm64: dts: rockchip: Add support for rk3588 based board Cool Pi CM5 EVB
Cool Pi CM5 EVB works as a mother board connect with CM5.

CM5 Specification:
- Rockchip RK3588
- LPDDR4 2/4/8/16 GB
- TF scard slot
- eMMC 8/32/64/128 GB module
- Gigabit ethernet x 1 with PHY YT8531
- Gigabit ethernet x 1 drived by PCIE with YT6801S

CM5 EVB Specification:
- HDMI Type A out x 2
- HDMI Type D in x 1
- USB 2.0 Host x 2
- USB 3.0 OTG x 1
- USB 3.0 Host x 1
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- 40 pin header

Signed-off-by: Andy Yan <andyshrk@163.com>
Link: https://lore.kernel.org/r/20231212124407.1897604-1-andyshrk@163.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:04:02 +01:00