Commit Graph

4 Commits

Author SHA1 Message Date
Tianling Shen
a6a7cba17c arm64: dts: rockchip: change eth phy mode to rgmii-id for orangepi r1 plus lts
In general the delay should be added by the PHY instead of the MAC,
and this improves network stability on some boards which seem to
need different delay.

Fixes: 387b3bbac5 ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS")
Cc: stable@vger.kernel.org # 6.6+
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20250119091154.1110762-1-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-02-03 09:14:34 +01:00
Dragan Simic
f3c6526d6f arm64: dts: rockchip: Convert dts files used as parents to dtsi files
Including a board dts file is not the right way to represent the hierarchical
nature of the board dts files and to create a dts file for another variant of
an ancestor board.  However, a few boards and their variants (ab)used this
approach, so let's clean that up by converting the common ancestors into dtsi
files, and by adding separate board-variant dts files.

No functional changes are introduced, which was validated by decompiling and
comparing all affected board dtb files before and after these changes.  In
more detail, the affected dtb files have some of their blocks shuffled around
a bit and some of their phandles have different values, as a result of the
changes to the order in which the building blocks from the parent dtsi files
are included, but they effectively remain the same as the originals.

The only perceivable introduced change is the turning of "roc-rk3328-cc" into
"ROC-RK3328-CC", which is the model name of one of the affected boards, which
was performed to match the styling of the official board name.

As a side note, due to the nature of introduced changes, this commit is best
viewed using "-B80%/80% -M20% -C5%" as the set of options for git-log(1).

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Link: https://lore.kernel.org/r/f3d789c14fe34a53327cac03cd3837e530e21f5c.1728937091.git.dsimic@manjaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2024-10-22 16:10:27 +02:00
Tianling Shen
fc5a80a432 arm64: dts: rockchip: configure eth pad driver strength for orangepi r1 plus lts
The default strength is not enough to provide stable connection
under 3.3v LDO voltage.

Fixes: 387b3bbac5 ("arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS")
Cc: stable@vger.kernel.org # 6.6+
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20231216040723.17864-1-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-12-24 20:24:01 +01:00
Tianling Shen
387b3bbac5 arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS
The OrangePi R1 Plus LTS is a minor variant of OrangePi R1 Plus with
the on-board NIC chip changed from rtl8211e to yt8531c, and otherwise
identical to OrangePi R1 Plus.

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Link: https://lore.kernel.org/r/20230325074022.9818-5-cnsztl@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2023-03-30 13:26:05 +02:00