Commit Graph

11 Commits

Author SHA1 Message Date
Biju Das
e578a36320 arm64: dts: renesas: rzg2ul-smarc: Add support for enabling MTU3
Add support for PMOD_MTU3 macro to enable MTU3 node on RZ/G2UL SMARC
EVK.

The MTU3a PWM pins on PMOD0 are muxed with SPI1. Disable SPI1, when
PMOD_MTU3 macro is enabled.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230727081848.100834-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-07-27 14:40:26 +02:00
Lad Prabhakar
49669da644 arm64: dts: renesas: r9a07g043: Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property
Introduce SOC_PERIPHERAL_IRQ() macro to specify interrupt property so
that we can share the common parts of the SoC DTSI with the RZ/Five
(RISC-V) SoC and the RZ/G2UL (ARM64) SoC.

This patch adds a new file r9a07g043u.dtsi to separate out RZ/G2UL
(ARM64) SoC specific parts.  No functional changes (same DTB).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20221025220629.79321-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-10-28 14:22:59 +02:00
Lad Prabhakar
53072ba67e arm64: dts: renesas: rzg2ul-smarc: Include SoM DTSI into board DTS
Move including the rzg2ul-smarc-som.dtsi from the carrier board
rzg2ul-smarc.dtsi to the actual RZ/G2UL SMARC EVK board dts
r9a07g043u11-smarc.dts. Also move the SW_SW0_DEV_SEL and
SW_ET0_EN_N macros to board dts as they are used by SoM and carrier
board DTS/I.

This is in preparation of re-using the SoM and carrier board DTSIs
for RZ/Five SMARC EVK.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220915165256.352843-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-19 13:53:47 +02:00
Biju Das
ea25b1836f arm64: dts: renesas: rzg2ul-smarc: Enable RSPI1 on carrier board
RSPI1 (SPI1) interface is available on PMOD0 connector (J1) on the
carrier board.  This patch adds pinmux and spi1 nodes to the carrier
board dtsi file and drops deleting pinctl* properties from board
DTS file.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220608173025.22792-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-06-17 09:46:19 +02:00
Biju Das
094ff3485a arm64: dts: renesas: rzg2ul-smarc: Enable USB2.0 support
Enable USB2.0 Host/Device support on RZ/G2UL SMARC EVK by
adding usb{0,1} pincontrol entries to the soc-pinctrl dtsi
and deleting the nodes which disabled it.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220429072400.23729-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06 11:09:33 +02:00
Biju Das
c62af12c70 arm64: dts: renesas: rzg2l-smarc: Move ssi0 and cpu sound_dai nodes from common dtsi
On RZ/G2{L,LC} SoM module, the wm8978 audio codec is connected to ssi0,
whereas on RZ/G2UL it is connected to ssi1. So move ssi0 and cpu
sound_dai nodes from common dtsi to board specific dtsi.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20220429072400.23729-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-05-06 11:09:32 +02:00
Biju Das
820e976909 arm64: dts: renesas: rzg2ul-smarc: Enable CANFD
Enable CANFD on RZ/G2UL SMARC platform.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-12-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-29 09:42:17 +02:00
Biju Das
b0fa698b83 arm64: dts: renesas: rzg2ul-smarc: Enable i2c{0,1} and wm8978
Enable i2c{0,1} on RZ/G2UL SMARC EVK by deleting respective
entries from board dts and adding pincontrol entries to the
soc-pinctrl dtsi. Also enable wm8978 audio codec.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220425170530.200921-8-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-29 09:41:59 +02:00
Biju Das
a74a0bf3f3 arm64: dts: renesas: rzg2ul-smarc: Enable microSD on SMARC platform
Enable the microSD card slot connected to SDHI1 on the RZ/G2UL SMARC
platform by removing the sdhi1 override which disabled it, and by adding
the necessary pinmux required for SDHI1.

This patch also adds gpios property to vccq_sdhi1 regulator.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-6-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
4e44055440 arm64: dts: renesas: rzg2ul-smarc: Add scif0 and audio clk pins
Add scif0 and audio clk pins to soc pinctrl dtsi and drop deleting
the pinctrl-0 and pinctrl-names properties for scif0 node so that
we now actually make use of these properties for scif0.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402081328.26292-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00
Biju Das
895199bc4e arm64: dts: renesas: Add initial device tree for RZ/G2UL Type-1 SMARC EVK
Add basic support for RZ/G2UL SMARC EVK (based on R9A07G043U11):
- memory
- External input clock
- CPG
- DMA
- SCIF

It shares the same carrier board with RZ/G2L, but the pin mapping is
different. Disable the device nodes which are not tested and delete the
corresponding pinctrl definitions.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220412161314.13800-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:56:09 +02:00