Commit Graph

57 Commits

Author SHA1 Message Date
Niklas Söderlund
02e95521f3 arm64: dts: renesas: r8a779a0: Add ISP core function block
All ISP instances on V3U have both a channel select and core function
block, describe the core region in addition to the existing cs region.

The interrupt number already described intended to reflect the cs
function but did incorrectly describe the core block. This was not
noticed until now as the driver do not make use of the interrupt for the
cs block.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250423163113.2961049-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-04-24 11:17:25 +02:00
Marek Vasut
399f14ff66 arm64: dts: renesas: rcar: Add boot phase tags
bootph-all as phase tag was added to dt-schema
(dtschema/schemas/bootph.yaml) to describe various node usage during
boot phases with DT.  Add bootph-all for all nodes that are used in the
bootloader on Renesas R-Car SoCs.

All SoC require CPG clock and its input clock, RST Reset, PFC pin
control and PRR ID register access during all stages of the boot
process, those are marked using bootph-all property, and so is the SoC
bus node which contains these IP.

Each board console UART is also marked as bootph-all to make it
available in all stages of the boot process.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250209180616.160253-2-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-02-21 16:23:01 +01:00
Niklas Söderlund
70403ebcff arm64: dts: renesas: r8a779a0: Add VSPX instances
Add device nodes for the VSPX instances on R-Car V3U.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250109125433.2402045-3-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-02-21 16:22:59 +01:00
Niklas Söderlund
b18ac9a805 arm64: dts: renesas: r8a779a0: Add FCPVX instances
Add device nodes for the FCPVX instances on R-Car V3U.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250109125433.2402045-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2025-02-21 16:22:59 +01:00
Niklas Söderlund
9560545831 arm64: dts: renesas: r8a779a0: Remove address- and size-cells from AVB[1-5]
When describing the PHYs on the Falcon Ethernet breakout board mdio
nodes will be needed to describe the connections, and each mdio node
will need to contain these two properties instead. This will make the
address-cells and size-cells described in the base SoC include file
redundant and they will produce warnings, remove them.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241023154643.4025941-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-12-13 11:15:42 +01:00
Geert Uytterhoeven
e05f6e48e4 arm64: dts: renesas: r8a779a0: Add E-FUSE node
Add a device node for the System Group Fuse Control and Monitor block of
the Pin Function Controller (PFC) on the R-Car V3U (R8A779A0) SoC, which
provides E-FUSE services.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/3b1d9939d2bcff9c5112d419b98b70377cf31db4.1727963347.git.geert+renesas@glider.be
2024-10-09 13:53:44 +02:00
Niklas Söderlund
af9e91cb97 arm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP
To make it easier to support new R-Car Gen4 SoCs add a family fallback
compatible similar to what was done for VIN on R-Car Gen4.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V3U for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20240826144352.3026980-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-03 10:23:02 +02:00
Niklas Söderlund
e9f351d67d arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
To make it easier to support new R-Car Gen4 SoCs a family fallback
compatible similar to what is used for R-Car Gen2 has been added to the
VIN bindings.  Add this fallback to the R-Car V3U DTSI.

There is no functional change, but the addition of the family fallback
in the bindings produces warnings for R-Car V3U for DTS checks if they
are not added.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Link: https://lore.kernel.org/20240704161620.1425409-4-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2024-09-03 10:22:56 +02:00
Geert Uytterhoeven
2c44893ba3 arm64: dts: renesas: r8a779a0: Add missing iommus properties
Add missing iommus properties to all EthernetAVB, DMAC, and Frame
Compression Processor device nodes.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/39da0dddf7e7f1fde2b2d83444af7bb5ae73b922.1720430758.git.geert+renesas@glider.be
2024-07-29 11:51:36 +02:00
Geert Uytterhoeven
6fca24a07e arm64: dts: renesas: r8a779a0: Add missing hypervisor virtual timer IRQ
Add the missing fifth interrupt to the device node that represents the
ARM architected timer.  While at it, add an interrupt-names property for
clarity,

Fixes: 834c310f54 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/671416fb31e3992101c32fe7e46147fe4cd623ae.1718890849.git.geert+renesas@glider.be
2024-07-01 11:35:07 +02:00
Geert Uytterhoeven
0c51912331 arm64: dts: renesas: r8a779a0: Correct avb[01] reg sizes
All Ethernet AVB instances on R-Car V3U have registers related to UDP/IP
support, but the declared register blocks for the first two instances
are too small to cover them.

Fix this by extending the register block sizes.

Fixes: 5a633320f0 ("arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/ce6ce3c4b1495e02e7c1803fca810a7178a84500.1707660323.git.geert+renesas@glider.be
2024-02-22 11:06:32 +01:00
Geert Uytterhoeven
c53866cb27 arm64: dts: renesas: Improve TMU interrupt descriptions
Add the input capture interrupt on Timer Unit instances that have it.
Add "interrupt-names" properties for clarity.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/5c70ad8c2ea14333616c5add31a4a958f4a47081.1705325654.git.geert+renesas@glider.be
2024-02-06 10:45:48 +01:00
Phong Hoang
18cbbdd846 arm64: dts: renesas: r8a779a0: Add PWM nodes
This patch adds PWM nodes for R-Car V3U (r8a779a0) SoC.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
[wsa: rebased]
Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20230502170618.55967-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-05-08 09:21:51 +02:00
Geert Uytterhoeven
2f04079bf5 arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main
Since IMSSTR register was undocumented on the latest datasheet and
dt-bindings of renesas,ipmmu-vmsa was updated about the
renesas,ipmmu-main property, revise the property on each cache IPMMU
node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/ed4c21150e42dd23412a8f4af7976f81edc1c9c2.1680592069.git.geert+renesas@glider.be
2023-04-04 10:01:01 +02:00
Geert Uytterhoeven
4db0ce4038 arm64: dts: renesas: r8a779a0: Update CAN-FD to R-Car Gen4 compatible value
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family.  Hence update the compatible property in the CAN-FD device node
to include the family-specific compatible value for R-Car Gen4.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/9823058fa57156e88a084a4a99fc8525af1686ff.1678705389.git.geert+renesas@glider.be
2023-03-16 17:00:58 +01:00
Lad Prabhakar
8b6a006c91 arm64: dts: renesas: Drop specifying the GIC_CPU_MASK_SIMPLE() for GICv3 systems
The GICv3 interrupts binding does not have a cpumask. The CPU mask only
applies to pre-GICv3. So just drop using them from GICv3 systems.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230206002136.29401-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2023-03-06 10:50:29 +01:00
Geert Uytterhoeven
a1ca409cc0 arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family.  Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
  - EtherAVB,
  - MSIOF.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/387168aef20d399d4f4318f4ecab9c3b016fd6f2.1666605756.git.geert+renesas@glider.be
2022-10-28 14:18:33 +02:00
Geert Uytterhoeven
167720e4bc arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family.  Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
  - CMT,
  - SDHI.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/f14fde21270bf8269a61a75fc6e50af2765f2a42.1663164707.git.geert+renesas@glider.be
2022-09-19 13:53:46 +02:00
Lad Prabhakar
c77543ae7b arm64: dts: renesas: Drop clock-names property from RPC node
With 'unevaluatedProperties' support implemented, there are a number of
warnings when running dtbs_check:

arch/arm64/boot/dts/renesas/r8a774b1-hihope-rzg2n-rev2-ex-idk-1110wr.dtb: spi@ee200000: Unevaluated properties are not allowed ('clock-names' was unexpected)
	From schema: Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml

The main problem is that the DT bindings do not allow clock-names.
So just drop the clock-names properties from the SoC DTSI files.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220829215128.5983-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-09-02 10:44:49 +02:00
Wolfram Sang
1d35135672 arm64: dts: renesas: r8a779a0: Put I2C aliases to board files
I2C aliases are not a property of a SoC. They belong to board files
where they are named accordingly in the schematics.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220825071022.7864-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-08-29 09:17:08 +02:00
Geert Uytterhoeven
06279f82da arm64: dts: renesas: r8a779a0: Add CPU0 core clock
Describe the clock for the first Cortex-A76 CPU core.
For now no operating points are defined.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3ace4eea4ff1cdc0f7b8ea7d0433c1063d795785.1654701400.git.geert+renesas@glider.be
2022-06-17 09:46:19 +02:00
Geert Uytterhoeven
650fd1d058 arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family.  Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4:
  - GPIO.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/b477eea0fc33a055d1b1874847e26614f68f5da0.1654701299.git.geert+renesas@glider.be
2022-06-17 09:46:19 +02:00
Geert Uytterhoeven
a1721bbbdb arm64: dts: renesas: r8a779a0: Update to R-Car Gen4 compatible values
Despite the name, R-Car V3U is the first member of the R-Car Gen4
family.  Hence update the compatible properties in various device nodes
to include family-specific compatible values for R-Car Gen4 instead of
R-Car Gen3:
  - DMAC,
  - (H)SCIF,
  - I2C,
  - IPMMU,
  - WDT.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/73cea9d5e1a6639422c67e4df4285042e31c9fd5.1651497071.git.geert+renesas@glider.be
2022-05-06 11:09:34 +02:00
Wolfram Sang
ccc0dd722e arm64: dts: renesas: rcar-gen4: Add interrupt properties to watchdog nodes
Driver doesn't use it yet, but let's describe the HW properly.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220322095512.4707-6-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-13 13:43:04 +02:00
Ulrich Hecht
d63833b869 arm64: dts: renesas: r8a779a0: Add CANFD device node
This patch adds a CANFD device node for r8a779a0.

Based on patch by Kazuya Mizuguchi.

Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu>
Link: https://lore.kernel.org/r/20220309162609.3726306-3-uli+renesas@fpond.eu
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2022-04-04 11:06:56 +02:00
Geert Uytterhoeven
953b392aef arm64: dts: renesas: Miscellaneous whitespace fixes
Make whitespace and indentation more consistent.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/3f2bcae1253c7a31d3eb6755185092a1f2b99b09.1642524439.git.geert+renesas@glider.be
2022-01-28 10:59:14 +01:00
Geert Uytterhoeven
9eca8bdf0a arm64: dts: renesas: r8a779a0: Add INTC-EX device node
Populate the device node for the Interrupt Controller for External
Devices (INTC-EX) on R-Car V3U, which serves external IRQ pins IRQ[0-5].

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Tested-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/4e2297e1066df483c0434df487df5b79e76b75b8.1624460378.git.geert+renesas@glider.be
2022-01-24 10:00:36 +01:00
Geert Uytterhoeven
c9b7011768 arm64: dts: renesas: Fix pin controller node names
Align all pin controller node names with the expectations of the DT
bindings in Documentation/devicetree/bindings/pinctrl/pinctrl.yaml.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/09a09c8ac9cb1a11b859c1ab9d9eae84cfefb1bb.1639666967.git.geert+renesas@glider.be
2021-12-17 10:34:18 +01:00
Kieran Bingham
b2db714bc9 arm64: dts: renesas: r8a779a0: Add DSI encoders
Provide the two MIPI DSI encoders on the V3U and connect them to the DU
accordingly.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211130164311.2909616-2-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-14 12:19:43 +01:00
Kieran Bingham
82ce79391d arm64: dts: renesas: Fix thermal bindings
The binding node names for the thermal zones are not successfully
validated by the dt-schemas.

Fix the validation by changing from sensor-thermalN or thermal-sensor-N
to sensorN-thermal.  Provide node labels of the form sensorN_thermal to
ensure consistency with the other platform implementations.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20211104224033.3997504-1-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-12-07 15:51:27 +01:00
Kieran Bingham
cdda01947b arm64: dts: renesas: r8a779a0: Add DU support
Provide the device nodes for the DU on the V3U platforms.

Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Link: https://lore.kernel.org/r/20211126095445.932930-2-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-26 14:08:20 +01:00
Wolfram Sang
eca6ab6e36 arm64: dts: reneas: rcar-gen3: Add SDnH clocks
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211110191610.5664-13-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-14-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-15-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-16-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-17-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-18-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-19-wsa+renesas@sang-engineering.com
Link: https://lore.kernel.org/r/20211110191610.5664-22-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-11-19 10:51:47 +01:00
Niklas Söderlund
5fea5b5571 arm64: dts: renesas: r8a779a0: Add and connect all CSI-2, ISP and VIN nodes
The V3U have 32 VIN, 4 CSI-2 and 4 ISP nodes that interact with each
other for video capture. Add all nodes and record how they are
interconnected.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20211012100038.375289-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-14 10:46:46 +02:00
Duc Nguyen
5de968a25a arm64: dts: renesas: r8a779a0: Add RPC node
Add device node for RPC on R8A779A0 SoC.

Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
[wsa: rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20211006085836.42155-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-10-08 15:16:02 +02:00
Yoshihiro Shimoda
52e3ebdc07 arm64: dts: renesas: r8a779a0: Add iommus into sdhi node
Add iommus into sdhi node.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210901111305.570206-3-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-09-20 12:07:06 +02:00
Yoshihiro Shimoda
eb6750431e arm64: dts: renesas: r8a779a0: Add IPMMU nodes
Add IPMMU nodes for r8a779a0. Note that this patch sets the power
domain of IPMMU-VC0 is Always-On tentatively because the SoC doesn't
have A3VC power domain.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210901111305.570206-2-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-09-20 12:07:06 +02:00
Duc Nguyen
bdd8b0053f arm64: dts: renesas: r8a779a0: Add TPU device node
This patch adds TPU node for R-Car V3U (r8a779a0) SoC.

Signed-off-by: Duc Nguyen <duc.nguyen.ub@renesas.com>
Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Link: https://lore.kernel.org/r/20210901091725.35610-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-09-20 12:07:06 +02:00
Geert Uytterhoeven
eab605c59a arm64: dts: renesas: r8a779a0: Restore sort order
The thermal node was inserted at the wrong place, breaking sort order
(sort by unit address, but group nodes of the same type).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/8d68a7ce449aaf90a88e69397dbe0e9c467d5726.1624460175.git.geert+renesas@glider.be
2021-07-19 10:51:35 +02:00
Geert Uytterhoeven
1771a33b34 arm64: dts: renesas: r8a779a0: Drop power-domains property from GIC node
"make dtbs_check":

    arm64/boot/dts/renesas/r8a779a0-falcon.dt.yaml: interrupt-controller@f1000000: 'power-domains' does not match any of the regexes: '^(msi-controller|gic-its|interrupt-controller)@[0-9a-f]+$', '^gic-its@', '^interrupt-controller@[0-9a-f]+$', 'pinctrl-[0-9]+'
	    From schema: Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml

Remove the "power-domains" property, as the GIC on R-Car V3U is
always-on, and not part of a clock domain.

Fixes: 834c310f54 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/a9ae5cbc7c586bf2c6b18ddc665ad7051bd1d206.1622560236.git.geert+renesas@glider.be
2021-06-07 11:30:09 +02:00
Adam Ford
56ed0b3b10 arm64: dts: renesas: Add fck to etheravb-rcar-gen3 clock-names list
The bindings have been updated to support two clocks.
Add a clock-names list in the device tree with fck in it.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20210224115146.9131-3-aford173@gmail.com
[geert: Update new r8a779a0.dtsi]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-05-25 09:55:52 +02:00
Yoshihiro Shimoda
bbbf6db5a0 arm64: dts: renesas: r8a779a0: Fix PMU interrupt
Should use PPI No.7 for the PMU. Otherwise, the perf command didn't
show any information.

Fixes: 834c310f54 ("arm64: dts: renesas: Add Renesas R8A779A0 SoC support")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20210325041949.925777-1-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-29 10:51:04 +02:00
Kieran Bingham
7c47212766 arm64: dts: renesas: r8a779a0: Add VSPD support
Provide VSPD support on the R-Car V3U SoC.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210322172919.1154686-3-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-29 10:51:04 +02:00
Kieran Bingham
e91bb1464d arm64: dts: renesas: r8a779a0: Add FCPVD support
Provide FCPVD support for the R-Car V3U SoC.

Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210322172919.1154686-2-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-29 10:51:04 +02:00
Phong Hoang
7e2a95d953 arm64: dts: renesas: r8a779a0: Add CMT support
This patch adds CMT{0|1|2|3} device nodes for R-Car V3U (r8a779a0) SoC.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
[wsa: rebased, double checked values, corrected sorting]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210311092939.3129-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-12 09:31:43 +01:00
Niklas Söderlund
a6d354b52d arm64: dts: renesas: r8a779a0: Add thermal support
Add support for thermal.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210310110951.3299524-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-12 09:31:43 +01:00
Phong Hoang
596e6e1c03 arm64: dts: renesas: r8a779a0: Add TMU support
This patch adds TMU{0|1|2|3|4} device nodes for R-Car V3U (r8a779a0) SoC.

Signed-off-by: Phong Hoang <phong.hoang.wz@renesas.com>
[wsa: rebased, double checked values]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210305143259.12622-3-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-10 10:59:12 +01:00
Takeshi Saito
6b159d547d arm64: dts: renesas: r8a779a0: Add MMC node
Add a device node for MMC.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[wsa: double checked & rebased]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210125075845.3864-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Linh Phung
088e6b2305 arm64: dts: renesas: r8a779a0: Add HSCIF support
Define the generic parts of the HSCIF[0-3] device nodes.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa@kernel.org>
Link: https://lore.kernel.org/r/20210121110008.15894-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Wolfram Sang
bff4e5dac9 arm64: dts: renesas: r8a779a0: Add & update SCIF nodes
This is the result of multiple patches taken from the BSP, combined,
rebased, and properly sorted. SCIF0 gets DMA properties, other SCIFs are
entirely new.

Signed-off-by: Linh Phung <linh.phung.jy@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121110008.15894-2-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00
Tho Vu
5a633320f0 arm64: dts: renesas: r8a779a0: Add Ethernet-AVB support
Define the generic parts of Ethernet-AVB device nodes. Only AVB0 was
tested because it was the only port with a PHY on current hardware.

Signed-off-by: Tho Vu <tho.vu.wh@renesas.com>
[wsa: double checked, rebased, added "internal-delay" properties]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20210121100619.5653-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-01-25 10:32:43 +01:00