Commit Graph

18 Commits

Author SHA1 Message Date
Nitin Rawat
d288abc3a7 arm64: dts: qcom: sm8750: Add UFS nodes for SM8750 SoC
Add UFS host controller and PHY nodes for SM8750 SoC.

Co-developed-by: Manish Pandey <quic_mapa@quicinc.com>
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Signed-off-by: Nitin Rawat <quic_nitirawa@quicinc.com>
Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250327-sm8750_ufs_master-v3-2-bad1f5398d0a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17 21:51:16 -05:00
Maulik Shah
49b1c8df67 arm64: dts: qcom: Add QMP handle for qcom_stats
Add QMP handle which is used to send QMP command to always on processor
to populate DDR stats. Add QMP handle for SM8450/SM8550/SM8650/SM8750.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250611-ddr_stats_-v5-3-24b16dd67c9c@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-17 09:12:19 -05:00
Krzysztof Kozlowski
5b87cad934 arm64: dts: qcom: sm8750: Add Soundwire nodes
Add Soundwire controllers on SM8750, fully compatible with earlier
SM8650 generation.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250526-sm8750-audio-part-2-v3-1-74429c686bb1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-11 13:31:51 -05:00
Eugen Hristev
5f9ec130f1 arm64: dts: qcom: sm8750: Trivial stray lines removal
Remove stray lines

Signed-off-by: Eugen Hristev <eugen.hristev@linaro.org>
Link: https://lore.kernel.org/r/20250605151040.56942-1-eugen.hristev@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-06-08 18:42:53 -05:00
Melody Olvera
cd81339e68 arm64: dts: qcom: sm8750: Add LLCC node
Add LLCC node for SM8750 SoC.

Signed-off-by: Melody Olvera <melody.olvera@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250512-sm8750_llcc_master-v5-4-d78dca6282a5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-13 16:01:05 +01:00
Krzysztof Kozlowski
104790b069 arm64: dts: qcom: sm8750: Add Modem / MPSS
Add nodes for the MPSS and its SMP2P.  These are compatible with earlier
SM8650 with difference in lack of fifth memory region for Qlink Logging.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250221-b4-sm8750-modem-v3-1-462dae7303c7@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-04-15 21:39:30 -05:00
Jyothi Kumar Seerapu
515551e656 arm64: dts: qcom: sm8750: Correct clocks property for uart14 node
Correct the clocks property for the uart14 node to fix UART functionality
on QUP2_SE6. The current failure is due to an incorrect clocks assignment.

Change the clocks property to GCC_QUPV3_WRAP2_S6_CLK to resolve the issue.

Signed-off-by: Jyothi Kumar Seerapu <quic_jseerapu@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Fixes: 068c3d3c83 ("arm64: dts: qcom: Add base SM8750 dtsi")
Link: https://lore.kernel.org/r/20250312104358.2558-1-quic_jseerapu@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-14 11:58:22 -05:00
Maulik Shah
778dc0f876 arm64: dts: qcom: sm8750: Fix cluster hierarchy for idle states
SM8750 have two different clusters. cluster0 have CPU 0-5 as child and
cluster1 have CPU 6-7 as child. Each cluster requires its own idle state
and power domain in order to achieve complete domain sleep state.

However only single cluster idle state is added mapping CPU 0-7 to the
same power domain. Fix this by correctly mapping each CPU to respective
cluster power domain and make cluster1 power domain use same domain idle
state as cluster0 since both use same idle state parameters.

Fixes: 068c3d3c83 ("arm64: dts: qcom: Add base SM8750 dtsi")
Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250226-sm8750_cluster_idle-v2-1-ef0ac81e242f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-13 17:05:21 -05:00
Krzysztof Kozlowski
58471055ae arm64: dts: qcom: sm8750: Add CDSP
Add nodes for the CDSP and its SMP2P.  These are compatible with earlier
SM8650 with difference in one more interrupt.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250312-b4-sm8750-cdsp-v4-1-4925d607cea6@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-12 16:54:34 -05:00
Krzysztof Kozlowski
0fe088574b arm64: dts: qcom: sm8750: Add LPASS macro codecs and pinctrl
Add LPASS macro codecs and LPASS TLMM pin controller on Qualcomm SM8750
for proper sound support.  These are fully compatible with earlier SM8550.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250312-sm8750-audio-v3-2-40fbb3e53f95@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-12 16:54:29 -05:00
Krzysztof Kozlowski
8744dd90cd arm64: dts: qcom: sm8750: Add IPCC, SMP2P, AOSS and ADSP
Add nodes for IPCC mailbox, SMP2P for ADSP, AOSS and the ADSP remoteproc
PAS loader (compatible with SM8550).

Reviewed-by: Melody Olvera <quic_molvera@quicinc.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250312-sm8750-audio-v3-1-40fbb3e53f95@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-12 16:54:29 -05:00
Gaurav Kashyap
b1dac789c6 arm64: dts: qcom: sm8750: Add ICE nodes
Add the SM8750 nodes for the UFS Inline Crypto Engine (ICE).

Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250113-sm8750_crypto_master-v1-6-d8e265729848@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-12 16:17:36 -05:00
Gaurav Kashyap
9f9dcac2f8 arm64: dts: qcom: sm8750: Add TRNG nodes
Add the SM8750 nodes for the True Random Number Generator (TRNG).

Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Link: https://lore.kernel.org/r/20250113-sm8750_crypto_master-v1-4-d8e265729848@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-12 16:17:36 -05:00
Gaurav Kashyap
eeb0f3e4ea arm64: dts: qcom: sm8750: Add QCrypto nodes
Add the QCE and Crypto BAM DMA nodes.

Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Link: https://lore.kernel.org/r/20250113-sm8750_crypto_master-v1-2-d8e265729848@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-12 16:17:36 -05:00
Maulik Shah
97bf440d95 arm64: dts: qcom: sm8750: Add RPMh sleep stats
Add RPMh stats to read low power statistics for various subsystem
and SoC sleep modes.

Signed-off-by: Maulik Shah <maulik.shah@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Tested-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> # 8750 QRD
Link: https://lore.kernel.org/r/20250218-sm8750_stats-v1-1-8902e213f82d@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-03 22:54:17 -06:00
Krzysztof Kozlowski
27fd3266e8 arm64: dts: qcom: Correct white-space style
There should be exactly one space before and after '=', and one space
before '{'.  No functional impact.  Verified with comparing decompiled
DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250219090751.124267-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-03 22:54:17 -06:00
Krzysztof Kozlowski
91e3ac1552 arm64: dts: qcom: sm8750: Change labels to lower-case
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250219090751.124267-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-03 22:54:17 -06:00
Melody Olvera
068c3d3c83 arm64: dts: qcom: Add base SM8750 dtsi
Add the base dtsi for the SM8750 SoC describing the CPUs, GCC and
RPMHCC clock controllers, geni UART, interrupt controller, TLMM,
reserved memory, interconnects, and SMMU.

Co-developed-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Co-developed-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
Co-developed-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241204-sm8750_master_dt-v3-4-4d5a8269950b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-06 10:42:54 -06:00