Commit Graph

26 Commits

Author SHA1 Message Date
Kaushal Kumar
c25dcb4d42 arm64: dts: qcom: sdx75: Add QPIC NAND support
Add devicetree node to enable support for QPIC NAND controller on Qualcomm
SDX75 platform.

Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250415072756.20046-5-quic_kaushalk@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19 15:33:50 -05:00
Kaushal Kumar
5cf0ebd480 arm64: dts: qcom: sdx75: Add QPIC BAM support
Add devicetree node to enable support for QPIC BAM DMA controller on
Qualcomm SDX75 platform.

Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Link: https://lore.kernel.org/r/20250415072756.20046-4-quic_kaushalk@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-19 15:33:50 -05:00
Konrad Dybcio
a3715ce865 arm64: dts: qcom: sdx75: Rename AOSS_QMP to power-management
The node is currently named power-controller, which requires the device
underneath is a power domain provider. Rename it to align with other
SoCs and resolve this sort of warnings:

power-controller@c310000: '#power-domain-cells' is a required property

Fixes: 91f767eb69 ("arm64: dts: qcom: sdx75: Add AOSS node")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20250306-topic-dt_bindings_fixups-v1-6-0c84aceb0ef9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-14 11:58:21 -05:00
Konrad Dybcio
6810ecd57e arm64: dts: qcom: sdx75: Fix up the USB interrupt description
Commit 53c6d854be ("dt-bindings: usb: dwc3: Clean up hs_phy_irq in binding")
reworked the dt-bindings to accurately represent the hardware.

Execute the second half of the cleanup by wiring up the missing
pwr_event IRQ and adjusting the entry order.

Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250306-topic-dt_bindings_fixups-v1-5-0c84aceb0ef9@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-03-14 11:58:21 -05:00
Krzysztof Kozlowski
9a27f0e186 arm64: dts: qcom: sdx75: Fix MPSS memory length
The address space in MPSS/Modem PAS (Peripheral Authentication Service)
remoteproc node should point to the QDSP PUB address space
(QDSP6...SS_PUB) which has a length of 0x10000.  Value of 0x4040 was
copied from older DTS, but it grew since then.

This should have no functional impact on Linux users, because PAS loader
does not use this address space at all.

Cc: stable@vger.kernel.org
Fixes: 41c72f36b2 ("arm64: dts: qcom: sdx75: Add remoteproc node")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241213-dts-qcom-cdsp-mpss-base-address-v3-20-2e0036fccd8d@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-06 18:23:40 -06:00
Prashanth K
cd2a674758 arm64: dts: qcom: sdx75: Disable USB U1/U2 entry
Disable U1 and U2 power-saving states to improve stability of USB.
These low-power link states, designed to reduce power consumption
during idle periods, can cause issues in latency-sensitive or high
throughput use cases. Over the years, some of the issues seen are
as follows:

1. In device mode of operation, when UVC is active, enabling U1/U2
is sometimes causing packets drops due to delay in entry/exit of
intermittent these low power states. These packet drops are often
reflected as missed isochronous transfers, as the controller wasn't
able to send packet in that microframe interval and hence glitches
are seen on the final transmitted video output.

2. On older targets like SM8150/SM8250/SM8350, there have been
throughput issues seen during tethering use cases.

3. On targets like SDX75, intermittent disconnects were observed
with certain cables due to impedence variations.

Disabling these intermittent power states enhances device stability
without affecting power usage.

Signed-off-by: Prashanth K <quic_prashk@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20241231081115.3149850-12-quic_prashk@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-01-06 17:04:16 -06:00
Dmitry Baryshkov
b8021da9dd arm64: dts: qcom: sdx75: correct sleep clock frequency
The SDX75 platform uses PMK8550 to provide sleep clock. According to the
documentation, that clock has 32.7645 kHz frequency. Correct the sleep
clock definition.

Fixes: 9181bb9399 ("arm64: dts: qcom: Add SDX75 platform and IDP board support")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20241224-fix-board-clocks-v3-9-e9b08fbeadd3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-12-26 21:51:10 -06:00
Krzysztof Kozlowski
6a3649903c arm64: dts: qcom: change labels to lower-case
DTS coding style expects labels to be lowercase.  No functional impact.
Verified with comparing decompiled DTB (dtx_diff and fdtdump+diff).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20241022-dts-qcom-label-v3-17-0505bc7d2c56@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-10-22 19:14:35 -05:00
Naina Mehta
41c72f36b2 arm64: dts: qcom: sdx75: Add remoteproc node
Add MPSS remoteproc node for SDX75 SoC.

Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20240709064924.325478-5-quic_nainmeht@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-14 21:30:08 -05:00
Naina Mehta
7a7d98fca6 arm64: dts: qcom: sdx75: update reserved memory regions for mpss
Rename qdss@88800000 memory region as qlink_logging memory region
and add qdss_mem memory region at address of 0x88500000,
qlink_logging is being added at the memory region at the address
of 0x88800000 as the region is being used by modem firmware.
Since different DSM region size is required for different modem
firmware, split mpss_dsmharq_mem region into 2 separate regions.
This would provide the flexibility to remove the region which is
not required for a particular platform. Based on the modem firmware
either both the regions have to be used or only mpss_dsm_mem has
to be used. Also, reduce the size of mpssadsp_mem region.

Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240709064924.325478-4-quic_nainmeht@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-08-14 21:30:08 -05:00
Rohit Agarwal
e07c4a702e arm64: dts: qcom: sdx75: Support for I2C and SPI
Add devicetree node for I2C and SPI busses in SDX75.

Signed-off-by: Rohit Agarwal <rohiagar@qti.qualcomm.com>
Link: https://lore.kernel.org/r/20240517100423.2006022-3-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 11:37:10 -05:00
Naina Mehta
37f5169f5c arm64: dts: qcom: sdx75: Add SDHCI node
Add sdhc node for SDX75 SoC to support SD card.
Also add pins required for SDHCI.

Signed-off-by: Naina Mehta <quic_nainmeht@quicinc.com>
Link: https://lore.kernel.org/r/20240523120337.9530-3-quic_nainmeht@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-27 11:28:03 -05:00
Krzysztof Kozlowski
bfb751d922 arm64: dts: qocm: sdx75: align smem node name with coding style
Node names should not have vendor prefixes.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240426123101.500676-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26 19:52:34 -05:00
Kaushal Kumar
355e5d72a4 arm64: dts: qcom: sdx75: Add modem SMP2P node
Add SMP2P node for the SDX75 platform to communicate with the modem.

Signed-off-by: Kaushal Kumar <quic_kaushalk@quicinc.com>
Link: https://lore.kernel.org/r/20240426112837.17478-1-quic_kaushalk@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26 19:52:34 -05:00
Rohit Agarwal
91f767eb69 arm64: dts: qcom: sdx75: Add AOSS node
Add AOSS channel devicetree node for Qcom's SDX75 SoC.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/20240426055326.3141727-7-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26 19:52:30 -05:00
Rohit Agarwal
85ab196986 arm64: dts: qcom: sdx75: Add TCSR register space
Add TCSR register space devicetree node for accessing different
status registers.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/20240426055326.3141727-6-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26 19:51:08 -05:00
Rohit Agarwal
220be0f04e arm64: dts: qcom: sdx75: Add IPCC node
Add IPCC devicetree node to Qcom's SDX75 platform.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/20240426055326.3141727-5-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-05-26 19:51:08 -05:00
Arnd Bergmann
1d3454fafb Qualcomm Arm64 DeviceTree updates for v6.10
Support for Sony Xperia 1V, on the SM8550 platform, is added.
 
 On IPQ8074, UART6 is described and unused gpios from QPIC are removed.
 
 Backlight and touchscreen are described on Samsung Grand Prime devices.
 
 RGB LED is added to Sony Xperia "Yoshino" devices, on which the
 volume-up key definition is corrected as well.
 
 Light Pulse Generator node is added to PM6150L PMIC, and blocks related
 to USB Type-C on PM6150 are added.
 
 On QCS6490 Rb3Gen2 UFS storage, USB Type-C management, a couple of
 remoteprocs and both USB Type-C and native DisplayPort are enabled.
 For the related IDP display is enabled, and the PMIC volume and power
 buttons are described.
 The inline crypto engine is added for SC7280, and an additional turbo
 frequency is added to the MDP.
 
 USB Type-C port management is introduce for the QRB2210 RB1. WiFi
 firmware-name qualifier is added to both RB1 and RB2 boards.
 The LMH node is added for the QCM2290, to configure the thresholds as
 well as provide thermal pressure input.
 
 The regulator range is adjusted for SD-card IO on SA8155P ADP, to allow
 UHS modes.
 
 The unused DCC is disabled on SC7180, and unused PMIC gpio block is
 disabled on Trogdor.
 
 For Lenovo Flex 5G, on SC8180X, the GPU firmware path is aligned with
 agreed upon firmware structure. The frequency of the I2C bus for
 touchpad is brought up to mitigate missing events. A number of
 additional cleanups are introduced.
 
 For SC8280XP GICv3 ITS is wired up for PCIe. EAS properties ad
 introduced. A PS_HOLD-based restart node is introduced and acts as a
 fallback if other mechanisms are unavailable to restart the board.
 QFPROM is described, missing LMH interrupts for thermal pressure are
 added. The TCSR download mode register is added, to allow configuring
 if download mode should be entered on a crash.
 
 USB Type-C handling is introduce for Fairphone FP3 as well.
 
 On SM6350 crypto engine and DisplayPort controllers are introduced.
 
 WiFi is enabled on the SM8150 Hardware Development Kit (HDK)
 
 USB PD properties are added on Xiaomi Mi Pad 5 Pro devices.
 
 Interconnect paths are added for UFS on SM8350, to ensure the bus is
 voted for when the controller is operating.
 
 On SM8550 the DMA coherency properties are corrected for SMMU and a few
 consumers. Missing DWC3 quirks are added and the SNPS PHY parameters are
 adjusted. Fastrpc banks are marked non-secure as needed.
 
 The GPU description is introduced on SM8650, and enabled on the QRD. A
 missing reserved-memory node is added, as is a few missing fastrpc
 compute banks, and the non-secure-domain flag for other banks.
 
 On X1 Elite SPMI support is added, together with PMIC definitons. The
 link properties for DP3 are corrected, and audio-related resets are
 introduced. SoundWire properties are corrected.
 
 Nodes describing the PCIe bridge under the host controller is added
 for a bunch of platforms.
 
 The GPIO carrying orientation information for USB Type-C is added across
 Fairphone 5, Lenovo Flex 5G, Lenovo Thinkpad X13s, SM8350 and SM845
 HDKs.
 
 A few dtbTool-specific compatibles for msm8916 is dropped from the
 bindings.
 
 A number of DeviceTree binding validation issues are corrected.
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Merge tag 'qcom-arm64-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm64 DeviceTree updates for v6.10

Support for Sony Xperia 1V, on the SM8550 platform, is added.

On IPQ8074, UART6 is described and unused gpios from QPIC are removed.

Backlight and touchscreen are described on Samsung Grand Prime devices.

RGB LED is added to Sony Xperia "Yoshino" devices, on which the
volume-up key definition is corrected as well.

Light Pulse Generator node is added to PM6150L PMIC, and blocks related
to USB Type-C on PM6150 are added.

On QCS6490 Rb3Gen2 UFS storage, USB Type-C management, a couple of
remoteprocs and both USB Type-C and native DisplayPort are enabled.
For the related IDP display is enabled, and the PMIC volume and power
buttons are described.
The inline crypto engine is added for SC7280, and an additional turbo
frequency is added to the MDP.

USB Type-C port management is introduce for the QRB2210 RB1. WiFi
firmware-name qualifier is added to both RB1 and RB2 boards.
The LMH node is added for the QCM2290, to configure the thresholds as
well as provide thermal pressure input.

The regulator range is adjusted for SD-card IO on SA8155P ADP, to allow
UHS modes.

The unused DCC is disabled on SC7180, and unused PMIC gpio block is
disabled on Trogdor.

For Lenovo Flex 5G, on SC8180X, the GPU firmware path is aligned with
agreed upon firmware structure. The frequency of the I2C bus for
touchpad is brought up to mitigate missing events. A number of
additional cleanups are introduced.

For SC8280XP GICv3 ITS is wired up for PCIe. EAS properties ad
introduced. A PS_HOLD-based restart node is introduced and acts as a
fallback if other mechanisms are unavailable to restart the board.
QFPROM is described, missing LMH interrupts for thermal pressure are
added. The TCSR download mode register is added, to allow configuring
if download mode should be entered on a crash.

USB Type-C handling is introduce for Fairphone FP3 as well.

On SM6350 crypto engine and DisplayPort controllers are introduced.

WiFi is enabled on the SM8150 Hardware Development Kit (HDK)

USB PD properties are added on Xiaomi Mi Pad 5 Pro devices.

Interconnect paths are added for UFS on SM8350, to ensure the bus is
voted for when the controller is operating.

On SM8550 the DMA coherency properties are corrected for SMMU and a few
consumers. Missing DWC3 quirks are added and the SNPS PHY parameters are
adjusted. Fastrpc banks are marked non-secure as needed.

The GPU description is introduced on SM8650, and enabled on the QRD. A
missing reserved-memory node is added, as is a few missing fastrpc
compute banks, and the non-secure-domain flag for other banks.

On X1 Elite SPMI support is added, together with PMIC definitons. The
link properties for DP3 are corrected, and audio-related resets are
introduced. SoundWire properties are corrected.

Nodes describing the PCIe bridge under the host controller is added
for a bunch of platforms.

The GPIO carrying orientation information for USB Type-C is added across
Fairphone 5, Lenovo Flex 5G, Lenovo Thinkpad X13s, SM8350 and SM845
HDKs.

A few dtbTool-specific compatibles for msm8916 is dropped from the
bindings.

A number of DeviceTree binding validation issues are corrected.

* tag 'qcom-arm64-for-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (110 commits)
  dt-bindings: arm: qcom: Add Samsung Galaxy S5 China (kltechn)
  arm64: dts: qcom: qrb4210-rb1: add firmware-name qualifier to WiFi node
  arm64: dts: qcom: qrb2210-rb1: add firmware-name qualifier to WiFi node
  arm64: dts: qcom: ipq6018: Add PCIe bridge node
  arm64: dts: qcom: ipq8074: Add PCIe bridge node
  arm64: dts: qcom: msm8996: Add PCIe bridge node
  arm64: dts: qcom: sc8180x: Add PCIe bridge node
  arm64: dts: qcom: qcs404: Add PCIe bridge node
  arm64: dts: qcom: sc7280: Add PCIe bridge node
  arm64: dts: qcom: msm8998: Add PCIe bridge node
  arm64: dts: qcom: sc8280xp: Add PCIe bridge node
  arm64: dts: qcom: sa8775p: Add PCIe bridge node
  arm64: dts: qcom: sm8650: Add PCIe bridge node
  arm64: dts: qcom: sm8550: Add PCIe bridge node
  arm64: dts: qcom: sm8450: Add PCIe bridge node
  arm64: dts: qcom: sm8350: Add PCIe bridge node
  arm64: dts: qcom: sm8150: Add PCIe bridge node
  arm64: dts: qcom: sdm845: Add PCIe bridge node
  arm64: dts: qcom: sm8250: Add PCIe bridge node
  arm64: dts: qcom: sdm845-db845c: make pcie0_3p3v_dual always-on
  ...

Link: https://lore.kernel.org/r/20240427175951.1439887-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29 16:43:52 +02:00
Rob Herring
8b40a46966
arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usage
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.

There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Acked-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29 10:27:52 +02:00
Krzysztof Kozlowski
6754fecd3b arm64: dts: qcom: sdx75: add unit address to soc node
Soc node has ranges, thus it must have an unit address. This fixes W=1
dtc warning:

  sdx75.dtsi:399.11-736.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240325102924.26820-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2024-04-21 12:03:58 -05:00
Rohit Agarwal
f47303a8d0 arm64: dts: qcom: Add USB3 and PHY support on SDX75
Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
HS PHY on SDX75.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231117080737.606687-3-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:32:10 -08:00
Rohit Agarwal
ea72a527bd arm64: dts: qcom: Add interconnect nodes for SDX75
Add interconnect nodes to support interconnects on SDX75.
Also parallely add the interconnect property for UART required
so that the bootup to shell does not break with interconnects
in place.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20231117080737.606687-2-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-12-07 08:32:10 -08:00
Rohit Agarwal
1862d0e3eb arm64: dts: qcom: sdx75: Add rpmhpd node
Add rpmhpd node and opps for this node to the SDX75 dts.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/1691415534-31820-9-git-send-email-quic_rohiagar@quicinc.com
[bjorn: include qcom-rpmpd.h as well]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13 20:11:16 -07:00
Rohit Agarwal
1020fca4f2 arm64: dts: qcom: sdx75: Add spmi node
Add SPMI node to SDX75 dtsi.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/1691415534-31820-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-08-13 20:05:06 -07:00
Krzysztof Kozlowski
934a3b4d5a arm64: dts: qcom: minor whitespace cleanup around '='
The DTS code coding style expects exactly one space before and after '='
sign.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230702185051.43867-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:39:52 -07:00
Rohit Agarwal
9181bb9399 arm64: dts: qcom: Add SDX75 platform and IDP board support
Add basic devicetree support for SDX75 platform and IDP board from
Qualcomm. The SDX75 platform features an ARM Cortex A55 CPU which forms
the Application Processor Sub System (APSS) along with standard Qualcomm
peripherals like GCC, TLMM, UART, QPIC, and BAM etc... Also, there
exists the networking parts such as IPA, MHI, PCIE-EP, EMAC, and Modem
etc..

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/1686311438-24177-6-git-send-email-quic_rohiagar@quicinc.com
2023-06-13 11:06:07 -07:00