As per the Orin Nano Dev Kit schematic, GPIO_G.02 is not available
on this device family. It should not be used at all on Orin NX/Nano.
Having this unused pin mapped as the suspend key can lead to
unpredictable behavior for low power modes.
Orin NX/Nano uses GPIO_EE.04 as both a "power" button and a "suspend"
button. However, we cannot have two gpio-keys mapped to the same
GPIO. Therefore remove the "suspend" key.
Cc: stable@vger.kernel.org
Fixes: e63472eda5 ("arm64: tegra: Support Jetson Orin NX reference platform")
Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
Signed-off-by: Ivy Huang <yijuh@nvidia.com>
Link: https://lore.kernel.org/r/20250206224034.3691397-1-yijuh@nvidia.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add implementation details for Orin NX/Nano PCIe EP on C4.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This patch ensures that Orin NX and Orin Nano enable an identical
set of serial ports. UARTA/UARTE will be enabled by adding
respective nodes to the board dtsi file.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The Orin NX and Orin Nano boards share a common carrier board and the
module boards for both platforms are very similar. Therefore,
restructure the Orin NX/Nano device-tree source files to adhere to a
simple hierarchical format. This will help make clear where changes
should go, and eliminates redundancy within the files.
Previously the carrier board file was independent. However, given
that it is so tightly coupled with the module design, it will be
more practical to combine files together for a simpler layout.
Following changes are made to restructure the device tree source files:
1) Change include hierarchy. Top-level dts includes board dtsi.
Board dtsi includes module dtsi. Module dtsi includes SoC dtsi.
2) Data from the top level dts file that is common to both Orin NX
and Orin Nano is in tegra234-p3768-0000+p3767.dtsi.
3) Only data that is unique to NX/Nano is present in the top-level dts.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
