Commit Graph

36 Commits

Author SHA1 Message Date
Aaron Kling
dfb25484bd arm64: tegra: Add uartd serial alias for Jetson TX1 module
If a serial-tegra interface does not have an alias, the driver fails to
probe with an error:
serial-tegra 70006300.serial: failed to get alias id, errno -19
This prevents the bluetooth device from being accessible.

Fixes: 6eba6471bb ("arm64: tegra: Wire up Bluetooth on Jetson TX1 module")
Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Reviewed-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Link: https://lore.kernel.org/r/20250420-tx1-bt-v1-1-153cba105a4e@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-05-08 23:11:00 +02:00
Aaron Kling
d1b7254761 arm64: tegra: p2180: Explicitly enable GPU
The gpu node originally was explicitly left disabled as it was expected
for the bootloader to enable it. However, this is only done in u-boot.
If u-boot is not in the boot chain, this will never be enabled. Other
Tegra210 devices already explicitly enable the gpu, so make p2180 match.

Signed-off-by: Aaron Kling <webgeek1234@gmail.com>
Link: https://lore.kernel.org/r/20250420-tx1-gpu-v1-1-d500de18e43e@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-05-08 23:08:05 +02:00
Diogo Ivo
65d691a440 arm64: tegra: p2180: Add TMP451 temperature sensor node
The Jetson TX1 module contains a TI TMP451 temperature sensor.
Add a DT node for it.

Signed-off-by: Diogo Ivo <diogo.ivo@tecnico.ulisboa.pt>
Link: https://lore.kernel.org/r/20250224-diogo-gpio_exp-v1-4-80fb84ac48c6@tecnico.ulisboa.pt
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-03-07 18:38:29 +01:00
Tomasz Maciej Nowak
2e57d3dc7b arm64: tegra: p2180: Add mandatory compatible for WiFi node
The dtschema requires to specify common ancestor which all SDIO chips are
derived from, so add accordingly.

Fixes: a50d5dcd28 ("arm64: tegra: Wire up WiFi on Jetson TX1 module")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202409030438.8tumAnp1-lkp@intel.com
Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-10-24 19:21:30 +02:00
Tomasz Maciej Nowak
a50d5dcd28 arm64: tegra: Wire up WiFi on Jetson TX1 module
P2180 modules have WiFi in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary calibration
file can be obtained from Jetson Linux Archive. nvram.txt file is
located in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive. The rest of necessary blobs can be obtained from official
Linux Firmware repository or (newer ones) from Infineon
ifx-linux-firmware repository (look in older releases).

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:35:11 +02:00
Tomasz Maciej Nowak
6eba6471bb arm64: tegra: Wire up Bluetooth on Jetson TX1 module
P2180 modules have Bluetooth in form of BCM4354 chip, and kernel driver
supports this one, so enable it for all users. The necessary firmware
can be obtained from Jetson Linux Archive. bcm4354.hcd file is located
in "Driver Package (BSP)" in
nv_tegra/l4t_deb_packages/nvidia-l4t-firmware_<version>_arm64.deb
archive.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:34:57 +02:00
Tomasz Maciej Nowak
3ed4e09860 arm64: tegra: Wire up power sensors on Jetson TX1 DevKit
One INA3221 sensor is located on P2180 module and the other two are on
P2597 base board.

Signed-off-by: Tomasz Maciej Nowak <tmn505@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2024-08-29 17:34:48 +02:00
Thierry Reding
6b53039e2b arm64: tegra: Remove dmas and dma-names for debug UART
The debug UART doesn't support DMA and the DT bindings prohibit the use
of the dmas and dma-names properties for it, so remove them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-07-26 18:24:32 +02:00
Thierry Reding
79ed18d9ec arm64: tegra: Sort nodes by unit-address, then alphabetically
Nodes in device tree should be sorted by unit-address, followed by nodes
without a unit-address, sorted alphabetically. Some exceptions are the
top-level aliases, chosen, firmware, memory and reserved-memory nodes,
which are expected to come first.

These rules apply recursively with some exceptions, such as pinmux nodes
or regulator nodes, which often follow more complicated ordering (often
by "importance").

While at it, change the name of some of the nodes to follow standard
naming conventions, which helps with the sorting order and reduces the
amount of warnings from the DT validation tools.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2023-01-17 13:55:20 +01:00
Arnd Bergmann
2f477ee3ed Revert "arm64: dts: tegra: Fix boolean properties with values"
This reverts commit 1a67653de0, which caused a boot regression.

The behavior of the "drive-push-pull" in the kernel does not
match what the binding document describes. Revert Rob's patch
to make the DT match the kernel again, rather than the binding.

Link: https://lore.kernel.org/lkml/YlVAy95eF%2F9b1nmu@orome/
Reported-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-25 13:49:01 +02:00
Rob Herring
1a67653de0
arm64: dts: tegra: Fix boolean properties with values
Boolean properties in DT are present or not present and don't take a value.
A property such as 'foo = <0>;' evaluated to true. IOW, the value doesn't
matter.

It may have been intended that 0 values are false, but there is no change
in behavior with this patch.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/Yk3nShkFzNJaI3/Z@robh.at.kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-04-07 14:03:02 +02:00
Thierry Reding
097e01c610 arm64: tegra: Rename top-level regulators
Regulators defined at the top level in device tree are no longer part of
a simple bus and therefore don't have a reg property. Nodes without a
reg property shouldn't have a unit-address either, so drop the unit
address from the node names. To ensure nodes aren't duplicated (in which
case they would end up merged in the final DTB), append the name of the
regulator to the node name.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 16:51:01 +01:00
Thierry Reding
4cc3e3e164 arm64: tegra: Rename top-level clocks
Clocks defined at the top level in device tree are no longer part of a
simple bus and therefore don't have a reg property. Nodes without a reg
property shouldn't have a unit-address either, so drop the unit address
from the node names. To ensure nodes aren't duplicated (in which case
they would end up merged in the final DTB), append the name of the clock
to the node name.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-16 16:51:01 +01:00
Jon Hunter
a4387f2973 arm64: tegra: Add label properties for EEPROMs
Populate the label property for the AT24 EEPROMs on the various Jetson
platforms. Note that the name 'module' is used to identify the EEPROM
on the processor module board and the name 'system' is used to identify
the EEPROM on the main base board (which is sometimes referred to as
the carrier board).

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-09-17 17:45:28 +02:00
Thierry Reding
562da8b494 arm64: tegra: Use valid PWM period for VDD_GPU on Tegra210
The PWM on Tegra210 can run at a maximum frequency of 48 MHz and cannot
reach the minimum period is 5334 ns. The currently configured period of
4880 ns is not within the valid range, so set it to 8000 ns. This value
was taken from the downstream DTS files and seems to work fine.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-08-27 17:36:46 +02:00
Thierry Reding
9efa0fca4c arm64: tegra: Use standard EEPROM properties
The address-bits and page-size properties that are currently used are
not valid properties according to the bindings. Use the address-width
and pagesize properties instead.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-15 11:05:46 +02:00
Thierry Reding
7517248ad2 arm64: tegra: Remove simple regulators bus
The standard way to do this is to list out the regulators at the top-
level. Adopt the standard way to fix validation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13 17:37:02 +02:00
Thierry Reding
393a403ed8 arm64: tegra: Remove simple clocks bus
The standard way to do this is to list out the clocks at the top-level.
Adopt the standard way to fix validation.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-07-13 17:33:00 +02:00
Thierry Reding
67bb17f610 arm64: tegra: Rename sdhci nodes to mmc
The new json-schema based validation tools require SD/MMC controller
nodes to be named mmc. Rename all references to them.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:27:04 +02:00
Thierry Reding
772a6a7b85 arm64: tegra: Add unit-address to memory node
The memory node requires a unit-address. For some boards the bootloader,
which is usually locked down, uses a hard-coded name for the memory node
without a unit-address, so we can't fix it on those boards.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-06-23 18:27:04 +02:00
Jon Hunter
358a6777f5 arm64: tegra: Make the RTC a wakeup source on Jetson Nano and TX1
The RTC found on the MAX77620 PMIC can be used as a wakeup source on
Jetson Nano and TX1, which is useful to wake the system from suspend
at a given time.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-05-22 14:56:54 +02:00
Jon Hunter
ec5fd197a9 arm64: tegra: Add EEPROM supplies
The following warning is observed on Jetson TX1, Jetson Nano and Jetson
TX2 platforms because the supply regulators are not specified for the
EEPROMs.

 WARNING KERN at24 0-0050: 0-0050 supply vcc not found, using dummy regulator
 WARNING KERN at24 0-0057: 0-0057 supply vcc not found, using dummy regulator

For both of these platforms the EEPROM is powered by the main 1.8V
supply rail and so populate the supply for these devices to fix these
warnings.

Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 12:14:30 +01:00
Jon Hunter
9995f924b5 arm64: tegra: Enable I2C controller for EEPROM
Commit a5b6b67364 ("arm64: tegra: Add ID EEPROM for Jetson TX1
module") populated the EEPROM on the Jetson TX1 module, but did not
enable the corresponding I2C controller. Enable the I2C controller so
that this EEPROM can be accessed.

Fixes: a5b6b67364 ("arm64: tegra: Add ID EEPROM for Jetson TX1 module")
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 12:14:30 +01:00
Sowjanya Komatineni
106f7a06fb arm64: tegra: Add Jetson TX1 SC7 timings
Add platform specific SC7 timing configuration to the Jetson TX1 device
tree.

Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29 20:30:09 +01:00
Jon Hunter
ece6031ece arm64: tegra: Update Jetson TX1 GPU regulator timings
The GPU regulator enable ramp delay for Jetson TX1 is set to 1ms which
not sufficient because the enable ramp delay has been measured to be
greater than 1ms. Furthermore, the downstream kernels released by NVIDIA
for Jetson TX1 are using a enable ramp delay 2ms and a settling delay of
160us. Update the GPU regulator enable ramp delay for Jetson TX1 to be
2ms and add a settling delay of 160us.

Cc: stable@vger.kernel.org
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Fixes: 5e6b9a89af ("arm64: tegra: Add VDD_GPU regulator to Jetson TX1")
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-20 11:17:03 +02:00
Thierry Reding
a5b6b67364 arm64: tegra: Add ID EEPROM for Jetson TX1 module
There is an ID EEPROM in the Jetson TX1 module that stores various bits
of information to indentify the module. Add the device tree node so that
operating systems can access this EEPROM.

Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-06-19 17:50:57 +02:00
Joseph Lo
d2c19dd714 arm64: tegra: Enable CPU idle support for Jetson TX1
Enable CPU idle support for Jetson TX1 platform.

Signed-off-by: Joseph Lo <josephl@nvidia.com>
Acked-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-04-12 17:21:48 +02:00
Aapo Vienamo
6ff7705da8 arm64: dts: tegra210-p2180: Correct sdmmc4 vqmmc-supply
On p2180 sdmmc4 is powered from a fixed 1.8 V regulator.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:27:26 +02:00
Aapo Vienamo
41cc3771c9 arm64: dts: tegra210-p2180: Allow ldo2 to go down to 1.8 V
Set regulator-min-microvolt property of ldo2 to 1.8 V in
tegra210-p2180.dtsi. ldo2 is used by the sdmmc1 SDHCI controller and its
voltage needs to be adjusted down to 1.8 V to support faster signaling
modes. It appears that the comment about the SDHCI driver requesting
invalid voltages no longer applies.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Reviewed-by: Mikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2018-08-27 12:27:25 +02:00
Jon Hunter
2fdb74fe4e arm64: tegra: Add CPU and PSCI nodes for NVIDIA Tegra210 platforms
Add the CPU and PSCI nodes for the NVIDIA Tegra210 platforms so that
all CPUs can be enabled on boot. This assumes that the PSCI firmware
has been loaded during the initial bootstrap on the device before the
kernel starts (which is typically the case for these platforms). The
PSCI firmware version is set to v0.2 which aligns with the current
shipping version for Tegra.

Reported-by: Martin Michlmayr <tbm@cyrius.com>
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Tested-By: Vagrant Cascadian <vagrant@debian.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2017-12-13 14:44:46 +01:00
Greg Kroah-Hartman
b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00
Alexandre Courbot
5e6b9a89af arm64: tegra: Add VDD_GPU regulator to Jetson TX1
Add the VDD_GPU regulator (a GPIO-enabled PWM regulator) to the Jetson
TX1 board. This addition allows the GPU to be used provided the
bootloader properly enabled the GPU node.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
[as pointed out by Thierry on IRC, nobody has reported a bug
 in the field, but using a new bootloader with a .dtb that
 has the incorrect data, it will crash on boot]
Fixes: 336f79c7b6 ("arm64: tegra: Add NVIDIA Jetson TX1 Developer Kit support")
Cc: stable@vger.kernel.org #v4.5+
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2016-12-08 00:23:33 +01:00
Thierry Reding
5593eb76b6 arm64: tegra: Enable debug serial on Jetson TX1
Add a chosen node to the device tree that contains a stdout-path
property which defines the debug serial port.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:22 +02:00
Thierry Reding
7793426943 arm64: tegra: Add PMIC support on Jetson TX1
Add a device tree node for the MAX77620 PMIC found on the p2180
processor module (Jetson TX1). Also add supporting power supplies,
such as the main 5 V system supply.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-07-14 16:20:19 +02:00
Thierry Reding
be70771d4c arm64: tegra: Remove 0, prefix from unit-addresses
When Tegra124 support was first merged the unit-addresses of all devices
were listed with a "0," prefix to encode the reg property's second cell.
It turns out that this notation is not correct, and the "," separator is
only used to separate fields in the unit address (such as the device and
function number in PCI devices), not individual cells for addresses with
more than one cell.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2016-04-11 15:38:10 +02:00
Thierry Reding
9e71045f1b arm64: tegra: Add NVIDIA Jetson TX1 support
The NVIDIA Jetson TX1 is a processor module that features a Tegra210 SoC
with 4 GiB of LPDDR4 RAM attached, a 32 GiB eMMC and other essentials.

It is typically connected to some I/O board (such as the P2597) that has
the connectors needed to hook it up to the outside world.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2015-11-24 16:52:24 +01:00