Commit Graph

2 Commits

Author SHA1 Message Date
Krzysztof Kozlowski
a8cf500c42 arm64: dts: nuvoton: add missing cache properties
As all level 2 and level 3 caches are unified, add required
cache-unified and cache-level properties to fix warnings like:

  nuvoton-npcm845-evb.dtb: l2-cache: 'cache-level' is a required property
  nuvoton-npcm845-evb.dtb: l2-cache: 'cache-unified' is a required property

Reviewed-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20230421223154.115312-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-07-13 08:43:54 +02:00
Tomer Maimon
6cc82f07fc arm64: dts: nuvoton: Add initial NPCM8XX device tree
This adds initial device tree support for the Nuvoton NPCM845 Board
Management controller (BMC) SoC family.

The NPCM845 based quad-core Cortex-A35 ARMv8 architecture and have
various peripheral IPs.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 15:41:04 +02:00