Rob Herring (Arm)
8e7e63fc47
arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node
...
The Arm GIC "ppi-partitions" node is only relevant to GICv3 and makes no
sense for GICv2 implementations which the GIC-400 is. PPIs in GICv2 have
no CPU affinity.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250609203721.2852879-1-robh@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250710-nuvoton-arm64-dt-v1-1-ec7db96ea507@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 17:02:57 +02:00
William A. Kennington III
7e1a0dfb3f
arm64: dts: nuvoton: Add pinctrl
...
This is critical to support multifunction pins shared between devices as
well as generic GPIOs.
Signed-off-by: William A. Kennington III <william@wkennington.com>
Link: https://patch.msgid.link/20250416015902.2091251-1-william@wkennington.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250515-nuvoton-arm64-dt-v1-1-25769b8c1509@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:10:24 +02:00
Iwona Winiarska
d7c99890fe
arm64: dts: nuvoton: Add PECI controller node
...
Add PECI controller node with all required information.
Reviewed-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
Link: https://lore.kernel.org/r/20230727202126.1477515-5-iwona.winiarska@intel.com
2023-08-07 18:27:55 +02:00
Tomer Maimon
6cc82f07fc
arm64: dts: nuvoton: Add initial NPCM8XX device tree
...
This adds initial device tree support for the Nuvoton NPCM845 Board
Management controller (BMC) SoC family.
The NPCM845 based quad-core Cortex-A35 ARMv8 architecture and have
various peripheral IPs.
Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 15:41:04 +02:00
