Commit Graph

12 Commits

Author SHA1 Message Date
Rob Herring (Arm)
8e7e63fc47
arm64: dts: nuvoton: npcm8xx: Drop the GIC "ppi-partitions" node
The Arm GIC "ppi-partitions" node is only relevant to GICv3 and makes no
sense for GICv2 implementations which the GIC-400 is. PPIs in GICv2 have
no CPU affinity.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20250609203721.2852879-1-robh@kernel.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250710-nuvoton-arm64-dt-v1-1-ec7db96ea507@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 17:02:57 +02:00
William A. Kennington III
7e1a0dfb3f
arm64: dts: nuvoton: Add pinctrl
This is critical to support multifunction pins shared between devices as
well as generic GPIOs.

Signed-off-by: William A. Kennington III <william@wkennington.com>
Link: https://patch.msgid.link/20250416015902.2091251-1-william@wkennington.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20250515-nuvoton-arm64-dt-v1-1-25769b8c1509@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-05-21 23:10:24 +02:00
Jacky Huang
82d7cf5655
arm64: dts: nuvoton: ma35d1: Add uart pinctrl settings
Enable all UART nodes presented on som and iot boards, and add pinctrl
function settings to these nodes.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Link: https://lore.kernel.org/r/20240819035647.306-4-ychuang570808@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-05 15:27:21 +00:00
Jacky Huang
0dfa542df9
arm64: dts: nuvoton: ma35d1: Add pinctrl and gpio nodes
Added the pinctrl node and its subnodes, the gpioa through gpion
nodes, to the MA35D1 device tree.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Link: https://lore.kernel.org/r/20240819035647.306-3-ychuang570808@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-05 15:27:21 +00:00
Jacky Huang
a957af0896
arm64: dts: nuvoton: Add syscon to the system-management node
According to the binding document, add the "syscon" compatible to the
system-management node.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Link: https://lore.kernel.org/r/20240819035647.306-2-ychuang570808@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-09-05 15:26:59 +00:00
Rob Herring
5c04a5b065 arm64: dts: Add/fix /memory node unit-addresses
'/memory' nodes always have a 'reg' property, and therefore should have
a unit-address with just plain hex (i.e. no commas). Fix all the arm64
'/memory' nodes.

It's possible that some bootloader depends on /memory (arm32 ATAG to DT
code does for example). If so, the memory node should be commented with
that requirement.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Chanho Min <chanho.min@lge.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240430191856.874600-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-05-02 14:56:02 +02:00
Linus Torvalds
1c9f8dff62 Char/Misc driver changes for 6.6-rc1
Here is the big set of char/misc and other small driver subsystem
 changes for 6.6-rc1.
 
 Stuff all over the place here, lots of driver updates and changes and
 new additions.  Short summary is:
   - new IIO drivers and updates
   - Interconnect driver updates
   - fpga driver updates and additions
   - fsi driver updates
   - mei driver updates
   - coresight driver updates
   - nvmem driver updates
   - counter driver updates
   - lots of smaller misc and char driver updates and additions
 
 All of these have been in linux-next for a long time with no reported
 problems.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big set of char/misc and other small driver subsystem
  changes for 6.6-rc1.

  Stuff all over the place here, lots of driver updates and changes and
  new additions. Short summary is:

   - new IIO drivers and updates

   - Interconnect driver updates

   - fpga driver updates and additions

   - fsi driver updates

   - mei driver updates

   - coresight driver updates

   - nvmem driver updates

   - counter driver updates

   - lots of smaller misc and char driver updates and additions

  All of these have been in linux-next for a long time with no reported
  problems"

* tag 'char-misc-6.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (267 commits)
  nvmem: core: Notify when a new layout is registered
  nvmem: core: Do not open-code existing functions
  nvmem: core: Return NULL when no nvmem layout is found
  nvmem: core: Create all cells before adding the nvmem device
  nvmem: u-boot-env:: Replace zero-length array with DECLARE_FLEX_ARRAY() helper
  nvmem: sec-qfprom: Add Qualcomm secure QFPROM support
  dt-bindings: nvmem: sec-qfprom: Add bindings for secure qfprom
  dt-bindings: nvmem: Add compatible for QCM2290
  nvmem: Kconfig: Fix typo "drive" -> "driver"
  nvmem: Explicitly include correct DT includes
  nvmem: add new NXP QorIQ eFuse driver
  dt-bindings: nvmem: Add t1023-sfp efuse support
  dt-bindings: nvmem: qfprom: Add compatible for MSM8226
  nvmem: uniphier: Use devm_platform_get_and_ioremap_resource()
  nvmem: qfprom: do some cleanup
  nvmem: stm32-romem: Use devm_platform_get_and_ioremap_resource()
  nvmem: rockchip-efuse: Use devm_platform_get_and_ioremap_resource()
  nvmem: meson-mx-efuse: Convert to devm_platform_ioremap_resource()
  nvmem: lpc18xx_otp: Convert to devm_platform_ioremap_resource()
  nvmem: brcm_nvram: Use devm_platform_get_and_ioremap_resource()
  ...
2023-09-01 09:53:54 -07:00
Iwona Winiarska
d7c99890fe arm64: dts: nuvoton: Add PECI controller node
Add PECI controller node with all required information.

Reviewed-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: Iwona Winiarska <iwona.winiarska@intel.com>
Link: https://lore.kernel.org/r/20230727202126.1477515-5-iwona.winiarska@intel.com
2023-08-07 18:27:55 +02:00
Krzysztof Kozlowski
a8cf500c42 arm64: dts: nuvoton: add missing cache properties
As all level 2 and level 3 caches are unified, add required
cache-unified and cache-level properties to fix warnings like:

  nuvoton-npcm845-evb.dtb: l2-cache: 'cache-level' is a required property
  nuvoton-npcm845-evb.dtb: l2-cache: 'cache-unified' is a required property

Reviewed-by: Tomer Maimon <tmaimon77@gmail.com>
Link: https://lore.kernel.org/r/20230421223154.115312-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-07-13 08:43:54 +02:00
Jacky Huang
b69af09847 arm64: dts: nuvoton: Add initial ma35d1 device tree
Add initial device tree support for Nuvoton ma35d1 SoC, including
cpu, clock, reset, and serial controllers.
Add reference boards som-256m and iot-512m.

Signed-off-by: Jacky Huang <ychuang3@nuvoton.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-06-05 13:18:08 +02:00
Tomer Maimon
f21d8e7165 arm64: dts: nuvoton: Add initial NPCM845 EVB device tree
Add initial Nuvoton NPCM845 evaluation board device tree.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 15:41:04 +02:00
Tomer Maimon
6cc82f07fc arm64: dts: nuvoton: Add initial NPCM8XX device tree
This adds initial device tree support for the Nuvoton NPCM845 Board
Management controller (BMC) SoC family.

The NPCM845 based quad-core Cortex-A35 ARMv8 architecture and have
various peripheral IPs.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-07-19 15:41:04 +02:00