The "simple-bus" binding has preferred node names such as "bus",
".*-bus", or "soc". Rename the Marvell platforms to use these names.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The ahci-platform binding requires phys/target-supply property.
After converting the binding to yaml the following files
reporting "'anyOf' conditional failed" on
sata@540000: sata-port@0
armada-7040-db.dts
armada-8040-clearfog-gt-8k.dts
armada-8040-mcbin.dts
armada-8040-mcbin-singleshot.dts
cn9130-db.dts
cn9130-db-B.dts
cn9131-db.dts
cn9131-db-B.dts
cn9132-db.dts
cn9132-db-B.dts
the following files reporting 'anyOf' conditional failed on
sata@540000: sata-port@1
cn9132-db.dts
cn9132-db-B.dts
cn9130-crb-B.dts
'phys' is a required property
'target-supply' is a required property
>From schema: Documentation/devicetree/bindings/ata/ahci-platform.yaml
This is caused by defining sata-ports incomplete in armada-cp11x.dtsi
and overriding only a subset of ports with the needed
phys/target-supply property.
Fix this by disabling the node-templates and enabling the needed nodes.
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Marvell NAND controller has now YAML to validate it's DT bindings, so
change the node name of cp11x DTSI as it is required by
nand-controller.yaml
Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Bindings expect thermal node names to end with '-thermal':
armada-8040-db.dtb: thermal-zones: 'ap-thermal-cpu0', ... do not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Update the PP2 ethernet ports subnodes' names to match
schema enforced by the marvell,pp2.yaml contents.
Add new required properties ('reg') which contains information
about the port ID, keeping 'port-id' ones for backward
compatibility.
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Update the node names of the sdhci@ interfaces to be mmc@ to match the
node name enforced by the mmc-controller.yaml schema.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
There are six new SoCs added this time. Apple M1 and Nuvoton WPCM450
have separate branches because they are new SoC families that require
changes outside of device tree files. The other four are variations of
already supported chips and get merged through this branch:
- STMicroelectronics STM32H750 is one of many variants of STM32
microcontrollers based on the Cortex-M7 core. This is particularly
notable since we rarely add support for new MMU-less chips
these days. In this case, the board that gets added along with
the platform is not a SoC reference platform but the "Art Pi"
(https://art-pi.gitee.io/website/) machine that was originally design
for the RT-Thread RTOS.
- NXP i.MX8QuadMax is a variant of the growing i.MX8 embedded/industrial
SoC family, using two Cortex-A72 and four Cortex-A53 cores. It
gets added along with its reference board, the "NXP i.MX8QuadMax
Multisensory Enablement Kit".
- Qualcomm SC7280 is a Laptop SoC following the SC7180 (Snapdragon 7c)
that is used in some Chromebooks and Windows laptops. Only a reference
board is added for the moment.
- TI AM64x Sita4ra is a new version of the K3 SoC family for industrial
control, motor control, remote IO, IoT gateway etc., similar to the
older AM65x family. Two reference machines are added alongside.
Among the newly added machines, there is a very clear skew towards 64-bit
machines now, with 12 32-bit machines compared to 23 64-bit machines. The
full list sorted by SoC is:
- ASpeed AST2500 BMC: ASRock E3C246D4I Xeon server board
- Allwinner A10: Topwise A721 Tablet
- Amlogic GXL: MeCool KII TV box
- Amlogic GXM: Mecool KIII, Minix Neo U9-H TV boxes
- Broadcom BCM4908: TP-Link Archer C2300 V1 router
- MStar SSD202D: M5Stack UnitV2 camera
- Marvell Armada 38x: ATL-x530 ethernet switch
- Mediatek MT8183 Chromebooks: Lenovo 10e, Acer Spin 311,
Asus Flip CM3, Asus Detachable CM3
- Mediatek MT8516/MT8183: OLogic Pumpkin Board
- NXP i.MX7: reMarkable Tablet
- NXP i.MX8M: Kontron pitx-imx8m, Engicam i.Core MX8M Mini
- Nuvoton NPCM730: Quanta GBS BMC
- Qualcomm X55: Telit FN980 TLB SoM, Thundercomm TurboX T55 SoM
- Qualcomm MSM8998: OnePlus 5/5T phones
- Qualcomm SM8350: Snapdragon 888 Mobile Hardware Development Kit
- Rockchip RK3399: NanoPi R4S board
- STM32MP1: Engicam MicroGEA STM32MP1 MicroDev 2.0 and SOM,
EDIMM2.2 Starter Kit, Carrier, SOM
- TI AM65: Siemens SIMATIC IOT2050 gateway
There is notable work going into extending already supported machines
and SoCs:
- ASpeed AST2500
- Allwinner A23, A83t, A31, A64, H6
- Amlogic G12B
- Broadcom BCM4908
- Marvell Armada 7K/8K/CN91xx
- Mediatek MT6589, MT7622, MT8173, MT8183, MT8195
- NXP i.MX8Q, i.MX8MM, i.MX8MP
- Qualcomm MSM8916, SC7180, SDM845, SDX55, SM8350
- Renesas R-Car M3, V3U
- Rockchip RK3328, RK3399
- STEricsson U8500
- STMicroelectronics STM32MP141
- Samsung Exynos 4412
- TI K3-AM65, K3-J7200
- TI OMAP3
Among the treewide cleanups and bug fixes, two parts stand out:
- There are a number of cleanups for issues pointed out by 'make
dtbs_check' this time, and I expect more to come in the future as we
increasingly check for regressions.
- After a change to the MMC subsystem that can lead to unpredictable
device numbers, several platforms add 'aliases' properties for these
to give each MMC controller a fixed number.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'arm-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"There are six new SoCs added this time.
Apple M1 and Nuvoton WPCM450 have separate branches because they are
new SoC families that require changes outside of device tree files.
The other four are variations of already supported chips and get
merged through this branch:
- STMicroelectronics STM32H750 is one of many variants of STM32
microcontrollers based on the Cortex-M7 core.
This is particularly notable since we rarely add support for new
MMU-less chips these days. In this case, the board that gets added
along with the platform is not a SoC reference platform but the
"Art Pi" (https://art-pi.gitee.io/website/) machine that was
originally design for the RT-Thread RTOS.
- NXP i.MX8QuadMax is a variant of the growing i.MX8
embedded/industrial SoC family, using two Cortex-A72 and four
Cortex-A53 cores.
It gets added along with its reference board, the "NXP i.MX8QuadMax
Multisensory Enablement Kit".
- Qualcomm SC7280 is a Laptop SoC following the SC7180 (Snapdragon
7c) that is used in some Chromebooks and Windows laptops.
Only a reference board is added for the moment.
- TI AM64x Sita4ra is a new version of the K3 SoC family for
industrial control, motor control, remote IO, IoT gateway etc.,
similar to the older AM65x family.
Two reference machines are added alongside.
Among the newly added machines, there is a very clear skew towards
64-bit machines now, with 12 32-bit machines compared to 23 64-bit
machines. The full list sorted by SoC is:
- ASpeed AST2500 BMC: ASRock E3C246D4I Xeon server board
- Allwinner A10: Topwise A721 Tablet
- Amlogic GXL: MeCool KII TV box
- Amlogic GXM: Mecool KIII, Minix Neo U9-H TV boxes
- Broadcom BCM4908: TP-Link Archer C2300 V1 router
- MStar SSD202D: M5Stack UnitV2 camera
- Marvell Armada 38x: ATL-x530 ethernet switch
- Mediatek MT8183 Chromebooks: Lenovo 10e, Acer Spin 311, Asus Flip
CM3, Asus Detachable CM3
- Mediatek MT8516/MT8183: OLogic Pumpkin Board
- NXP i.MX7: reMarkable Tablet
- NXP i.MX8M: Kontron pitx-imx8m, Engicam i.Core MX8M Mini
- Nuvoton NPCM730: Quanta GBS BMC
- Qualcomm X55: Telit FN980 TLB SoM, Thundercomm TurboX T55 SoM
- Qualcomm MSM8998: OnePlus 5/5T phones
- Qualcomm SM8350: Snapdragon 888 Mobile Hardware Development Kit
- Rockchip RK3399: NanoPi R4S board
- STM32MP1: Engicam MicroGEA STM32MP1 MicroDev 2.0 and SOM, EDIMM2.2
Starter Kit, Carrier, SOM
- TI AM65: Siemens SIMATIC IOT2050 gateway
There is notable work going into extending already supported machines
and SoCs:
- ASpeed AST2500
- Allwinner A23, A83t, A31, A64, H6
- Amlogic G12B
- Broadcom BCM4908
- Marvell Armada 7K/8K/CN91xx
- Mediatek MT6589, MT7622, MT8173, MT8183, MT8195
- NXP i.MX8Q, i.MX8MM, i.MX8MP
- Qualcomm MSM8916, SC7180, SDM845, SDX55, SM8350
- Renesas R-Car M3, V3U
- Rockchip RK3328, RK3399
- STEricsson U8500
- STMicroelectronics STM32MP141
- Samsung Exynos 4412
- TI K3-AM65, K3-J7200
- TI OMAP3
Among the treewide cleanups and bug fixes, two parts stand out:
- There are a number of cleanups for issues pointed out by 'make
dtbs_check' this time, and I expect more to come in the future as
we increasingly check for regressions.
- After a change to the MMC subsystem that can lead to unpredictable
device numbers, several platforms add 'aliases' properties for
these to give each MMC controller a fixed number"
* tag 'arm-dt-5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (516 commits)
dt-bindings: mali-bifrost: add dma-coherent
arm64: dts: amlogic: misc DT schema fixups
arm64: dts: qcom: sc7180: Update iommu property for simultaneous playback
arm64: dts: qcom: sc7180: pompom: Add "dmic_clk_en" + sound model
arm64: dts: qcom: sc7180: coachz: Add "dmic_clk_en"
ARM: dts: mstar: Add a dts for M5Stack UnitV2
dt-bindings: arm: mstar: Add compatible for M5Stack UnitV2
dt-bindings: vendor-prefixes: Add vendor prefix for M5Stack
arm64: dts: mt8183: fix dtbs_check warning
arm64: dts: mt8183-pumpkin: fix dtbs_check warning
ARM: dts: aspeed: tiogapass: add hotplug controller
ARM: dts: aspeed: amd-ethanolx: Enable all used I2C busses
ARM: dts: aspeed: Rainier: Update to pass 2 hardware
ARM: dts: aspeed: Rainier 1S4U: Fix fan nodes
ARM: dts: aspeed: Rainier: Fix humidity sensor bus address
ARM: dts: aspeed: Rainier: Fix PCA9552 on bus 8
ARM: dts: qcom: sdx55: add IPA information
ARM: dts: qcom: sdx55: Add basic devicetree support for Thundercomm T55
dt-bindings: arm: qcom: Add binding for Thundercomm T55 kit
ARM: dts: qcom: sdx55: Add basic devicetree support for Telit FN980 TLB
...
Add support for Marvell CP110 UTMI PHY in a CP11x DTSI
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The driver part of this support was not merged which leads to break
AHCI on all Marvell Armada 7k8k / CN913x platforms as it was reported
by Marcin Wojtas.
So for now let's remove it in order to fix the issue waiting for the
driver part really be merged.
This reverts commit 53e950d597.
Fixes: 53e950d597 ("arm64: dts: marvell: armada-cp110: Switch to per-port SATA interrupts")
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
CM3 SRAM address space will be used for Flow Control configuration.
Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Acked-by: Marcin Wojtas <mw@semihalf.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
The 'marvell,pwm-offset' property of both GPIO blocks (per CP component)
point to the same counter registers offset. The driver will decide how
to use counters A/B.
This is different from the convention of pwm on earlier Armada series
(370/38x). On those systems the assignment of A/B counters to GPIO
blocks is coded in both DT and the driver. The actual behaviour of the
current driver on Armada 8K/7K is the same as earlier systems.
Add also clock properties for base pwm frequency reference.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
In accordance with the Generic xHCI bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "generic-xhci"-compatible nodes are
correctly named.
Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
There are two SATA ports per CP110. Each of them has a dedicated
interrupt. Describe the real hardware by adding two SATA ports to the
CP110 SATA node.
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Sven Auhagen <sven.auhagen@voleatech.de>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
PCIe macros are specific to CP110 and will not fit CP115
constraints. To keep the same way the files are organized, just move
some macros out of the CP11x generic file and define them directly in
SoC DTSI, instead of defining single addresses in the SoC DTSI and
reusing them in macros.
In the end:
* CP11X_PCIE_MEM_BASE SoC define is dropped
* CP11X_PCIEx_MEM_BASE is moved out of the generic DT to be put in the
SoC files as it replaces the above definition.
* As the CP11X_PCIEx_MEM_SIZE macro is also subject to change with
newer SoCs, we put it in the SoC files as well.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
As an example, Armada 70x0 and 80x0 SoC 0xf9000000 region points to
RUNIT/SPICS0 while it is referenced in the DT as PCIe I/O memory
range. This shows that I/O memory has never been used/working on the
old SoCs despite the region being advertised. As PCIe I/O ranges will
not be supported in newer SoCs using CP11x co-processors, let's
simply drop them. It is not harmful in any case as PCIe device drivers
can do it all with the regular mapped memory anyway.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
CP110 and CP115 are almost the same in terms of features and have a
very limited set of differences. Let's create an armada-cp11x.dtsi
file which will be used to instantiate both CP110 and CP115
nodes.
The only changes between the two armada-cp11{0,x}.dtsi files are the
following naming in macros: s/CP110/CP11X/.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
