Commit Graph

12 Commits

Author SHA1 Message Date
Rob Herring (Arm)
ed9c2b28eb arm64: dts: marvell: Use preferred node names for "simple-bus"
The "simple-bus" binding has preferred node names such as "bus",
".*-bus", or "soc". Rename the Marvell platforms to use these names.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2025-03-15 11:27:04 +01:00
Rob Herring (Arm)
7c5cf1be86 arm64: dts: marvell: Move arch timer and pmu nodes to top-level
The Arm arch timer and PMU are not memory-mapped peripherals, and
therefore should not be under a "simple-bus" node. Move them to the
top-level like other platforms.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2025-03-15 11:26:41 +01:00
Krzysztof Kozlowski
f86f5471f1 arm64: dts: marvell: ap80x: fix IOMMU unit address
Correct the IOMMU device node unit address to match "reg" and fix dtc
W=1 warnings:

  armada-ap80x.dtsi:64.24-80.6: Warning (simple_bus_reg): /ap807/config-space@f0000000/iommu@5000000: simple-bus unit address format error, expected "100000"

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2024-04-02 14:40:22 +02:00
Rob Herring
91adecf911
arm64: dts: Fix dtc interrupt_provider warnings
The dtc interrupt_provider warning is off by default. Fix all the warnings
so it can be enabled.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-By: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> #
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom
Acked-by: Chanho Min <chanho.min@lge.com>
Link: https://lore.kernel.org/r/20240213-arm-dt-cleanups-v1-3-f2dee1292525@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-02-20 21:47:41 +01:00
Krzysztof Kozlowski
4b6a412ee5 arm64: dts: marvell: align thermal node names with bindings
Bindings expect thermal node names to end with '-thermal':

  armada-8040-db.dtb: thermal-zones: 'ap-thermal-cpu0', ... do not match any of the regexes: '^[a-zA-Z][a-zA-Z0-9\\-]{1,12}-thermal$', 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2023-04-07 17:07:59 +02:00
Konstantin Porotchkin
99d2900f5f arm64: dts: marvell: add optee FW definitions
Add reserved memory and ARM firmware definitions for optee
memory region in Marvell Armada SoCs to avoid protected memory
access.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Cc: Andrew Lunn <andrew@lunn.ch>
Cc: Gregory Clement <gregory.clement@bootlin.com>
Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-11-28 01:23:11 +01:00
Chris Packham
239466bddf arm64: dts: marvell: Update sdhci node names to match schema
Update the node names of the sdhci@ interfaces to be mmc@ to match the
node name enforced by the mmc-controller.yaml schema.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2022-05-09 11:23:33 +02:00
Baruch Siach
35db5e32eb arm64: dts: armada: add pwm offsets for ap/cp gpios
The 'marvell,pwm-offset' property of both GPIO blocks (per CP component)
point to the same counter registers offset. The driver will decide how
to use counters A/B.

This is different from the convention of pwm on earlier Armada series
(370/38x). On those systems the assignment of A/B counters to GPIO
blocks is coded in both DT and the driver. The actual behaviour of the
current driver on Armada 8K/7K is the same as earlier systems.

Add also clock properties for base pwm frequency reference.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-01-29 16:54:48 +01:00
Marcin Wojtas
83a3545d9c arm64: dts: marvell: add SMMU support
Add IOMMU node for Marvell AP806 based SoCs together with platform
and PCI device Stream ID mapping.

Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Signed-off-by: Tomasz Nowicki <tn@semihalf.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-07-18 23:08:23 +02:00
Baruch Siach
1e6e612853 arm64: dts: marvell: drop i2c timeout-ms property
The timeout-ms property for i2c master nodes is undocumented, and as
never been supported. Drop it.

Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2020-05-17 18:00:11 +02:00
Miquel Raynal
4f267f2a80 arm64: dts: marvell: Move clocks to AP806 specific file
Regular clocks and CPU clocks are specific to AP806, move them out of
the generic AP80x file so that AP807 can use its own clocks.

Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-10-09 09:36:40 +02:00
Konstantin Porotchkin
7409b15556 arm64: dts: marvell: Prepare the introduction of AP807 based SoCs
Prepare the support for Marvell AP807 die. This die is very similar to
AP806 but uses different DDR PHY. AP807 is a major component of CN9130
SoC series.

Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2019-10-09 09:36:40 +02:00