Commit Graph

13 Commits

Author SHA1 Message Date
Krzysztof Kozlowski
32cdf4c75f arm64: dts: n5x: socdk: drop unneeded flash address/size-cells
Flash node uses single "partition" node to describe partitions, so
remove deprecated address/size-cells properties to also fix dtc W=1
warnings:

  socfpga_n5x_socdk.dts:85.10-114.4: Warning (avoid_unnecessary_addr_size): /soc@0/spi@ff8d2000/flash@0: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-05-30 11:20:13 -05:00
Krzysztof Kozlowski
e3c163c3a0 arm64: dts: socfpga: agilex: drop redundant status
New device nodes are enabled by default.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-01-03 18:10:40 -06:00
Krzysztof Kozlowski
68d550d00c arm64: dts: socfpga: agilex: add unit address to soc node
The "soc" node has ranges with addresses, so it is should have unit
address  to fix dtc W=1 warnings like:

  socfpga_agilex.dtsi:152.6-674.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-01-03 18:10:40 -06:00
Krzysztof Kozlowski
2241f81c91 arm64: dts: socfpga: drop unsupported cdns,page-size and cdns,block-size
cdns,page-size and cdns,block-size are neither documented nor used by
Linux, so remove them to fix dtbs_check warnings like:

  socfpga_n5x_socdk.dtb: flash@0: Unevaluated properties are not allowed ('cdns,block-size', 'cdns,page-size' were unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2024-01-03 18:10:39 -06:00
Dinh Nguyen
774acd59a2 arm64: dts: socfpga: n5x/stratix10: fix dtbs_check warning for partitions
flash@0: partitions: Unevaluated properties are not allowed
('partition@3FE0000' was unexpected)

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-07-10 09:56:14 -05:00
Dinh Nguyen
b2c62c3956 arm64: dts: stratix10/agilex/n5x: fix dtbs_check warning for memory node
Although, we expect the bootloader to full memory details but passing empty
values can give warning, so add a default value.

memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 0, 0, 0]]}

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2023-07-09 19:45:08 -05:00
Dinh Nguyen
31354121bf arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-11-18 11:13:49 -06:00
Krzysztof Kozlowski
bcea9aaa43
arm64: dts: n5x: drop invalid property and fix edac node name
The intel,sysmgr-syscon in EDAC/memory controller node is not a
recognized and documented property, so drop it to fix error:

  sdr_edac@f87f8000: 'intel,sysmgr-syscon' does not match any of the regexes: 'pinctrl-[0-9]+'

Align also the node name with Devicetree specification (generic, not
specific, and EDAC is purely Linux term).

Fixes: ef82c9be84 ("arm64: dts: n5x: add sdr edac support")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220318121044.108750-1-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-03-19 22:34:25 +01:00
Dinh Nguyen
ef82c9be84 arm64: dts: n5x: add sdr edac support
The N5X platform has the Synopsys DDR controller the includes an EDAC
controller. Add the entry for the controller in the DTS file instead of
the base Agilex DTSI because the base Agilex does not have the
controller.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-03-01 09:43:15 -06:00
Krzysztof Kozlowski
fae3aa6c82 arm64: dts: agilex: add board compatible for N5X DK
The Intel SoCFPGA N5X SoC Development Kit is a board with
Agilex, so it needs its own compatible.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2022-02-09 10:43:03 -06:00
Dinh Nguyen
f4c35356e0 arm64: dts: n5x: add qspi, usb, and ethernet support
Populate the N5X board dts file with support for QSPI, USB, and
ethernet.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-11-30 14:10:44 -06:00
Krzysztof Kozlowski
15e26f6914 arm64: dts: intel: socfpga: override clocks by label
Using full paths to extend or override a device tree node is error
prone.  If there was a typo error, a new node will be created instead of
extending the existing node.  This will lead to run-time errors that
could be hard to detect.

A mistyped label on the other hand, will cause a dtc compile error
(during build time).

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-30 05:51:29 -05:00
Dinh Nguyen
a427485a00 arm64: dts: n5x: Add support for Intel's eASIC N5X platform
The Intel eASIC N5X platform shares the same register map as the Agilex
platform, thus, we can re-use the socfpga_agilex.dtsi as the base
DTSI.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-01-04 15:40:31 -06:00