5 Commits

Author	SHA1	Message	Date
Niravkumar L Rabara	a6c9896e65	arm64: dts: socfpga: agilex5: fix gpio0 address ... Use the correct gpio0 address for Agilex5. Fixes: 3f7c869e14 ("arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id") Cc: stable@vger.kernel.org Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>	2025-03-26 06:47:04 -05:00
Niravkumar L Rabara	3f7c869e14	arm64: dts: socfpga: agilex5: Add gpio0 node and spi dma handshake id ... Add gpio0 controller node and correct DMA handshake ID for SPI tx and rx channels. Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>	2024-12-16 18:54:31 -06:00
Krzysztof Kozlowski	2c373e7515	arm64: dts: intel: agilex5: drop "master" I3C node name suffix ... Following change in the I3C bindings, the "master" suffix in I3C controller node name is discouraged (it is "controller" now) and not accurate (if device supports also target mode). Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>	2024-02-01 07:25:55 -06:00
Krzysztof Kozlowski	16615a2aa5	arm64: dts: intel: minor whitespace cleanup around '=' ... The DTS code coding style expects exactly one space before and after '=' sign. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>	2024-01-03 18:10:40 -06:00
Niravkumar L Rabara	2d599bc438	arm64: dts: agilex5: add initial support for Intel Agilex5 SoCFPGA ... Add the initial device tree files for Intel Agilex5 SoCFPGA platform. Reviewed-by: Dinh Nguyen <dinguyen@kernel.org> Signed-off-by: Niravkumar L Rabara <niravkumar.l.rabara@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>	2023-08-14 05:33:41 -05:00