Commit Graph

9 Commits

Author SHA1 Message Date
Rob Herring (Arm)
0d495db1b9
arm64: dts: cavium: thunder2: Add missing PL011 "uartclk"
The PL011 IP has 2 clock inputs for UART core/baud and APB bus. The
Thunder2 SoC is missing the core "uartclk". In this case, the Linux
driver uses single clock for both clock inputs. Let's assume that's how
the h/w is wired and make the DT reflect that.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250609215706.3009692-2-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-03 16:29:45 +02:00
Arnd Bergmann
631ec37483 Minor improvements in ARM64 DTS for v6.10
Fixes, which might have practical impact, however things were broken for
 long enough to justify pushing it regular path:
 1. ARM Juno: shorten node names for thermal zones, because Linux drivers
    have strict limit of 20 characters.
 2. HiSilicon: correct size of GIC GICC address space and add missing
    GICH and GICV spaces, add cache info to properly describe cache
    topology and solve kernel boot warning.
 
 Several cleanups:
 1. Use capital "OR" for multiple licenses in SPDX.
 2. Correct white-spaces for code readability.
 3. Fix W=1 dtc compiler warnings, which should not have practical
    impact for Amazon, APM, Cavium, Realtek, Socionext Uniphier and
    Spreadtrum like:
     - missing unit addresses,
     - nodes not belonging to soc node,
     - not using generic node names,
     - few incorrect unit addresses.
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Merge tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

Minor improvements in ARM64 DTS for v6.10

Fixes, which might have practical impact, however things were broken for
long enough to justify pushing it regular path:
1. ARM Juno: shorten node names for thermal zones, because Linux drivers
   have strict limit of 20 characters.
2. HiSilicon: correct size of GIC GICC address space and add missing
   GICH and GICV spaces, add cache info to properly describe cache
   topology and solve kernel boot warning.

Several cleanups:
1. Use capital "OR" for multiple licenses in SPDX.
2. Correct white-spaces for code readability.
3. Fix W=1 dtc compiler warnings, which should not have practical
   impact for Amazon, APM, Cavium, Realtek, Socionext Uniphier and
   Spreadtrum like:
    - missing unit addresses,
    - nodes not belonging to soc node,
    - not using generic node names,
    - few incorrect unit addresses.

* tag 'dt64-cleanup-6.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt: (28 commits)
  arm64: dts: cavium: thunder2-99xx: drop redundant reg-names
  arm64: dts: amazon: alpine-v3: correct gic unit addresses
  arm64: dts: amazon: alpine-v3: drop cache nodes unit addresses
  arm64: dts: amazon: alpine-v3: add missing io-fabric unit addresses
  arm64: dts: amazon: alpine-v2: move non-MMIO node out of soc
  arm64: dts: amazon: alpine-v2: add missing io-fabric unit addresses
  arm64: dts: apm: shadowcat: move non-MMIO node out of soc
  arm64: dts: apm: storm: move non-MMIO node out of soc
  arm64: dts: cavium: correct unit addresses
  arm64: dts: cavium: move non-MMIO node out of soc
  arm64: dts: realtek: rtc16xx: add missing unit address to soc node
  arm64: dts: realtek: rtd139x: add missing unit address to soc node
  arm64: dts: realtek: rtd129x: add missing unit address to soc node
  arm64: dts: uniphier: ld20-global: drop audio codec port unit address
  arm64: dts: uniphier: ld20-global: use generic node name for audio-codec
  arm64: dts: uniphier: ld11-global: drop audio codec port unit address
  arm64: dts: uniphier: ld11-global: use generic node name for audio-codec
  arm64: dts: sharkl3: add missing unit addresses
  arm64: dts: whale2: add missing ap-apb unit address
  arm64: dts: sc9860: move GIC to soc node
  ...

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29 18:12:53 +02:00
Rob Herring
8b40a46966
arm/arm64: dts: Drop "arm,armv8-pmuv3" compatible usage
The "arm,armv8-pmuv3" compatible is intended only for s/w models. Primarily,
it doesn't provide any detail on uarch specific events.

There's still remaining cases for CPUs without any corresponding PMU
definition and for big.LITTLE systems which only have a single PMU node
(there should be one per core type).

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Bjorn Andersson <andersson@kernel.org>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Acked-by: Alim Akhtar <alim.akhtar@samsung.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Link: https://lore.kernel.org/r/20240417203853.3212103-1-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-04-29 10:27:52 +02:00
Krzysztof Kozlowski
de2ba5bd36 arm64: dts: cavium: thunder2-99xx: drop redundant reg-names
There is no "reg-names" property in the PCI bindings and the value does
not conform to Devicetree coding style (upper-case letters, space), so
assume this was copied from downstream.

This fixes dtbs_check warning:

  thunder2-99xx.dtb: pcie@30000000: Unevaluated properties are not allowed ('reg-names' was unexpected)

Link: https://lore.kernel.org/r/20240407102841.38617-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-04-24 09:23:56 +02:00
Rob Herring
d2e5c16f6c arm64: dts: cavium: Fix GICv3 ITS nodes
The GICv3 ITS is an MSI controller, therefore its node name should be
'msi-controller'. The ITS node is also expected to have '#msi-cells'.
Add it on Thunder as there are no users. Thunder2 uses 'msi-parent', but
Robin says that should be 'msi-map' instead and I'm not sure what's
correct for it.

The unit-addresses of both the ITS and main GIC node on thunder2 are also
wrong, so fix them while we're here.

Cc: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230208185506.2305349-1-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-03-17 13:39:00 +01:00
Thomas Gleixner
2874c5fd28 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-05-30 11:26:32 -07:00
Rob Herring
31af04cd60 arm64: dts: Remove inconsistent use of 'arm,armv8' compatible string
The 'arm,armv8' compatible string is only for software models. It adds
little value otherwise and is inconsistently used as a fallback on some
platforms. Remove it from those platforms.

This fixes warnings generated by the DT schema.

Reported-by: Michal Simek <michal.simek@xilinx.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Acked-by: Antoine Tenart <antoine.tenart@bootlin.com>
Acked-by: Nishanth Menon <nm@ti.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Chanho Min <chanho.min@lge.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Thierry Reding <treding@nvidia.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Wei Xu <xuwei5@hisilicon.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Acked-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Scott Branden <scott.branden@broadcom.com>
Acked-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Chunyan Zhang <zhang.lyra@gmail.com>
Acked-by: Robert Richter <rrichter@cavium.com>
Acked-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com>
Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2019-01-30 17:34:36 +01:00
Rob Herring
e2c8d283c4 arm64: dts: cavium: fix PCI bus dtc warnings
dtc recently added PCI bus checks. Fix these warnings:

arch/arm64/boot/dts/cavium/thunder2-99xx.dtb: Warning (pci_bridge): Node /pci missing bus-range for PCI bridge
arch/arm64/boot/dts/cavium/thunder2-99xx.dtb: Warning (unit_address_vs_reg): Node /pci has a reg or ranges property, but no unit name

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Jayachandran C <jnair@caviumnetworks.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2018-02-22 17:36:07 +01:00
Jayachandran C
517b311eae arm64: dts: move from ARCH_VULCAN to ARCH_THUNDER2
Move and update device tree files as part of transition from Broadcom
Vulcan to Cavium ThunderX2.

The changes are to:
 * rename dts/broadcom/vulcan.dtsi to cavium/thunder2-99xx.dtsi,
   update cpu cores to be "cavium,thunder2", and update SoC to be
   "cavium,thunderx2-cn9900"
 * move SoC dts/broadcom/vulcan-eval.dtsi to cavium/thunder2-99xx.dtsi
   and update board name string
 * Update dts/broadcom/Makefile not to build vulcan dtbs
 * Update dts/cavium/Makefile to build thunder2 dtbs

No changes to the dts contents except the updated "compatible" and
"model" properties.

Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2017-03-31 11:42:30 +02:00