Commit Graph

4 Commits

Author SHA1 Message Date
Manivannan Sadhasivam
dee0be5c21 arm64: dts: bitmain: Source common clock for UART controllers
Remove fixed clock and source common clock for UART controllers.

Link: https://lore.kernel.org/r/20200114040311.6599-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-01-16 15:48:11 -08:00
Manivannan Sadhasivam
470fa42933
arm64: dts: bitmain: Add UART pinctrl support for Sophon Edge
Add pinctrl support for UARTs exposed on the Sophon Edge board.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-29 10:47:41 +05:30
Manivannan Sadhasivam
9fe408413f
arm64: dts: bitmain: Add GPIO Line names for Sophon Edge board
Add GPIO line names for Sophon Edge board based on BM1880 SoC from
Bitmain. Line names are based on the board schematics as well as the
96Boards Consumer Edition specification v1.0.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
2019-04-29 10:38:40 +05:30
Manivannan Sadhasivam
3bba4e2fdc
arm64: dts: bitmain: Add Sophon Egde board support
Add devicetree support for Sophon Edge board from Bitmain based on
BM1880 SoC. This board is one of the 96Boards Consumer and AI platform.
More information about this board can be found in 96Boards product page:

https://www.96boards.org/documentation/consumer/sophon-edge/

Only UART peripheral support is enabled for now.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Arnd Bergmann <arnd@arndb.de>
2019-02-09 16:10:13 +05:30