Commit Graph

7 Commits

Author SHA1 Message Date
Sudeep Holla
d7030edf32 arm64: dts: fvp: Align virtio device node names with dtschema
Align the virtio mmio device tree node names with the schema to avoid any
schema warnings.

Link: https://lore.kernel.org/r/20220425135524.1077986-1-sudeep.holla@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-04-25 15:12:45 +01:00
Diego Sueiro
5393158f00 arm64: dts: fvp: Add virtio-rng support
The virtio-rng is available from FVP_Base_RevC-2xAEMvA version 11.17,
so add the devicetree node to support it. It is disabled by default to
avoid any issues with models that doesn't support it.

Link: https://lore.kernel.org/r/ac3be672c636091ee1e079cadce776b1fb7e0b2e.1650543392.git.diego.sueiro@arm.com
Signed-off-by: Diego Sueiro <diego.sueiro@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2022-04-25 14:21:03 +01:00
Rob Herring
078fb7aa6a arm: dts: vexpress: Fix addressing issues with 'motherboard-bus' nodes
The 'motherboard-bus' node in Arm Ltd boards fails schema checks as
'simple-bus' child nodes must have a unit-address. The 'ranges' handling is
also wrong (or at least strange) as the mapping of SMC chip selects should
be in the 'arm,vexpress,v2m-p1' node rather than a generic 'simple-bus'
node. Either there's 1 too many levels of 'simple-bus' nodes or 'ranges'
should be moved down a level. The latter change is more simple, so let's do
that. As the 'ranges' value doesn't vary for a given motherboard instance,
we can move 'ranges' into the motherboard dtsi files.

Link: https://lore.kernel.org/r/20210819184239.1192395-6-robh@kernel.org
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Sudeep Holla <sudeep.holla@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2021-09-17 10:23:41 +01:00
Andre Przywara
9d0a36ddcc arm64: dts: fvp/juno: Fix bus node names
Most Arm Ltd. boards are employing a layered bus structure, to map
the hardware design (SoC, motherboard, IOFPGA) and structure the DTs.

The "simple-bus" nodes only allow a limited set of node names. Switch
to use *-bus to be binding compliant.

This relies on a pending dt-schema.git fix for now:
https://github.com/devicetree-org/dt-schema/pull/38

Link: https://lore.kernel.org/r/20200513103016.130417-16-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-18 17:08:54 +01:00
Andre Przywara
bb5cce12ac arm64: dts: fvp/juno: Fix node address fields
The Arm Ltd. boards were using an outdated address convention in the DT
node names, by separating the high from the low 32-bits of an address by
a comma.

Remove the comma from the node name suffix to be DT spec compliant.

Link: https://lore.kernel.org/r/20200513103016.130417-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2020-05-17 17:55:58 +01:00
Linus Walleij
bee7ff37ec ARM/arm64: dts: Rename SMB bus to just bus
Discussing the YAML validation schema with the DT maintainers
it came out that a bus named "smb@80000000" is not really
accepted, and the schema was written to name the static memory
bus just "bus@80000000".

This change is necessary for the schema to kick in and validate
these device trees, else the schema gets ignored.

Cc: Rob Herring <robh+dt@kernel.org>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-04 15:31:30 +01:00
Jean-Philippe Brucker
fa083b99eb arm64: dts: fast models: Add DTS fo Base RevC FVP
Fixed Virtual Platforms(FVP) Base RevC model is an emulated Arm platform
with GICv3, PCIe, SMMUv3 and various other features. These are available
free of charge on the Arm Community website at Arm Development
Platforms[1].

It resembles the Foundation Platform, which is a simple FVP that
includes an Armv8‑A AEM processor model but this has two cluster of four
cores, a CCI-550 interconnect, an SMMU and two PCI devices.

In order to enable development of software, let's add a description of
the Revison C version of Base platform.

The documentation for this FVP model is available @[2] for reference.

[1] https://community.arm.com/dev-platforms/
[2] https://static.docs.arm.com/100966/1104/fast_models_fvp_rg_100966_1104_00_en.pdf

Cc: Vincent Stehlé <vincent.stehle@arm.com>
Acked-by: Liviu Dudau <liviu.dudau@arm.com>
Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@arm.com>
[sudeep.holla: aligned interrupt-map with other DTS, added SPE, changed
 PMU to use GIC PPI, moved to PSCI v0.2, commit log rewording]
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
2019-01-29 14:40:27 +00:00