Adding disable-wp property for micro SD nodes of Allwinner arm64 devices.
Boards were verified from online pictures/tables
that they have micro SD slots.
Signed-off-by: Kryštof Černý <cleverline1mc@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://patch.msgid.link/20240919-b4-nanopineoplus2-fix-mmc0-wp-v2-1-c708a9abc9eb@gmail.com
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Pin controllers pio and r_pio will have proper regulators assigned.
Signed-off-by: Kryštof Černý <cleverline1mc@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20240905-nanopi-neo-plus2-regfix-v3-2-1895dff59598@gmail.com
[wens@csie.org: Make "h5" lowercase to match most commits]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Added the main board 5 V supply regulator,
a 2.5 V supply regulator for GMAC PHY IO and correct vin-supply elements.
Signed-off-by: Kryštof Černý <cleverline1mc@gmail.com>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Link: https://lore.kernel.org/r/20240905-nanopi-neo-plus2-regfix-v3-1-1895dff59598@gmail.com
[wens@csie.org: Make "h5" lowercase to match most commits]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Underscores should not be used in node names (dtc with W=2 warns about
them), so replace them with hyphens. Use also generic name for pwrseq
node, because generic naming is favored by Devicetree spec. All the
clocks affected by this change use clock-output-names, so resulting
clock name should not change. Functional impact checked with comparing
before/after DTBs with dtx_diff and fdtdump.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20240317184130.157695-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
According to the LED bindings, the LED node names are supposed to be led
plus an optional suffix. Let's fix our users to use that new scheme.
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Acked-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20210114113538.1233933-6-maxime@cerno.tech
Since commit bbc4d71d63 ("net: phy: realtek: fix rtl8211e rx/tx
delay config") network is broken on the NanoPi Neo Plus2.
This patch changes the phy-mode to use internal delays both for RX and TX
as has been done for other boards affected by the same commit.
Fixes: bbc4d71d63 ("net: phy: realtek: fix rtl8211e rx/tx delay config")
Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20201129194512.1475586-1-xypron.glpk@gmx.de
Allwinner device tree files used different comment style for
copyright notice.
Update this to keep a coherency.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Use a shorter SPDX identifier instead of pasting the
whole license.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Some headers specify that files are under dual-licensed GPL2.0+
and X11. But in fact, it turns out that the full licenses texts
associated are GPL2.0+ and MIT.
Fix license headers to reflect real licenses associated.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Even though it translates to the same thing down to the binary level, we
should have an array of 2 number cells to describe each voltage state,
which in turns create a validation warning.
Let's fix this.
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
The H3 and H5 have never been converted to the new convention we want to
have for the pinctrl nodes.
Convert them.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Some nodes still have pinctrl-names entry, yet they don't have any pinctrl
group anymore. Drop them.
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Most of the boards use the mmc1 pins and their attributes defined in
mmc1_pins_a. Let's default to that by moving the pinctrl attributes to
the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.
Signed-off-by: Joonas Kylmälä <joonas.kylmala@iki.fi>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Most of the boards use the mmc0 pins and their attributes defined in
mmc0_pins_a. Let's default to those by moving the pinctrl attributes
to the dtsi file. This makes it easier to modify device trees in the
future as there is only one place to change the pinctrl attributes.
Signed-off-by: Joonas Kylmälä <joonas.kylmala@iki.fi>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
add arm64 H5 dwmac-sun8i support for this board
Signed-off-by: Antony Antony <antony@phenome.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
PF6 is mostly used as the CD pin for the microSD slot on H5 based
boards. So far we were referencing this pin twice: once using the
mmc0_cd_pin phandle, and then again directly as a GPIO via the pinctrl
phandle.
This will cause problems if the pinctrl driver enables strict mode, as
the second request will fail now, leading to a driver init failure.
Remove the redundant pin reference via the mmc0_cd_pin phandle.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reported-by: Chris Obbard <obbardc@gmail.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
