Commit Graph

211 Commits

Author SHA1 Message Date
Andrew Jeffery
342329720a ARM: dts: aspeed-g6: Use generic 'ethernet' for ftgmac100 nodes
Squash warnings such as:

 arch/arm/boot/dts/aspeed/aspeed-ast2600-evb.dtb: ftgmac@1e670000:
 $nodename:0: 'ftgmac@1e670000' does not match '^ethernet(@.*)?$'

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-6-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
27df8e2803 ARM: dts: aspeed: Clean up AST2500 pinctrl properties
Many platforms were specifying the `aspeed,external-nodes` property
required by the AST2500 pinctrl. However, its been specified in the
pinctrl node directly in aspeed-g5.dtsi for quite a long time now.

Remove the unnecessary override from all relevant platform dts files.

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-5-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
1c8b6faf88 ARM: dts: aspeed: Remove undocumented XDMA nodes
There's no binding defined for the device, so remove it from the
devicetrees until someone has the motivation to write one.

Squash warnings such as:

 arch/arm/boot/dts/aspeed/aspeed-ast2500-evb.dtb:
 /ahb/apb@1e6e0000/xdma@1e6e7000: failed to match any schema with
 compatible: ['aspeed,ast2500-xdma']

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-4-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
df27436954 ARM: dts: aspeed: Specify required properties for sram node
Squash warnings such as:

```
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: '#address-cells' is a required property
        from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: '#size-cells' is a required property
        from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb: sram@1e720000: 'ranges' is a required property
        from schema $id: http://devicetree.org/schemas/sram/sram.yaml#
```

Fixes: d44a1138cd ("arm/dts: Add Aspeed ast2400 device tree")
Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-3-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
e5d7d18789 ARM: dts: aspeed: Specify correct generic compatible for CVIC
The ASPEED CVIC binding documents `aspeed,cvic` as the required generic
compatible, but the devicetrees contained `aspeed-cvic`. Update the
devictrees to use `aspeed,cvic` as documented and as required by
the driver implementation. Presumably the bug was the result of some
incoherent thoughts while removing the SoC name at the time of
writing.

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-2-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Andrew Jeffery
ae8fd56184 ARM: dts: aspeed: Fix coprocessor interrupt controller node name
Squash schema warnings such as:

 arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-galaxy100.dtb:
 copro-interrupt-controller@1e6c2000: $nodename:0:
 'copro-interrupt-controller@1e6c2000' does not match
 '^interrupt-controller(@[0-9a-f,]+)*$'

Link: https://lore.kernel.org/r/20240802-dt-warnings-bmc-dts-cleanups-v1-1-1cb1378e5fcd@codeconstruct.com.au
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Chanh Nguyen
6177ea49c6 ARM: dts: aspeed: mtmitchell: Add LEDs
Add LED nodes as the gpio-leds devices. They are led-bmc-ready,
led-sw-heartbeat, led-identify, led-fault, led-fan-fault, led-psu-fault

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-6-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Chanh Nguyen
f689462fcd ARM: dts: aspeed: mtmitchell: Enable i2c10 and i2c15
Enable the BMC I2C10.
Enable the BMC I2C15 and add the GPIO Expander as a child node.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-5-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:15 +09:30
Chanh Nguyen
0aa7ca5e8f ARM: dts: aspeed: mtmitchell: Add Riser cards
Define the I2C alias ports for the riser cards.

Add the i2c muxes to switch to the i2c alias ports and
the eeprom nodes to read the FRU contents on riser cards.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-4-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Chanh Nguyen
f90607680b ARM: dts: aspeed: mtmitchell: Add I2C temperature sensor alias ports
Add the I2C alias ports to read temperature sensors via channels
of the I2C muxes.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-3-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Chanh Nguyen
326bed426c ARM: dts: aspeed: mtjade, mtmitchell: Add OCP temperature sensors
Define I2C alias ports from I2C Switch 0x70 at BMC I2C5.

Add the tmp421 sensors via the I2C alias ports as OCP device
temperature sensors.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20240806071806.1666550-2-chanh@os.amperecomputing.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Potin Lai
ac552a63bb ARM: dts: aspeed: catalina: add Meta Catalina BMC
Add linux device tree entry for Meta(Facebook) Catalina compute-tray
BMC using AT2600 SoC.

Signed-off-by: Potin Lai <potin.lai.pt@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240805-potin-catalina-dts-v7-2-286bfd2ab93b@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Yang Chen
e087adb102 ARM: dts: aspeed: minerva: add host0-ready pin
Add host0-ready pin for phosphor-state-manager.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240711130501.2900301-2-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Yang Chen
bd14a21d08 ARM: dts: aspeed: minerva: Add spi-gpio
Add spi-gpio for TPM device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-18-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Yang Chen
9ac7385c0e ARM: dts: aspeed: minerva: add ltc4287 device
Enable LTC4287 device on i2c-0.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240626130332.929534-17-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:14 +09:30
Yang Chen
527cb309bf ARM: dts: aspeed: minerva: remove unused power device
Remove unused power device.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240626130332.929534-16-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
99d1feddda ARM: dts: aspeed: minerva: Switch the i2c bus number
Switch the i2c bus number to map the i2c tag according to the hardware
design.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-15-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
d0d21a66c8 ARM: dts: aspeed: minerva: revise sgpio line name
Revise the SGPIO naming to mapping the SGPIO from the CPLD.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-14-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
b9de5a3f82 ARM: dts: aspeed: minerva: add power monitor xdp710
Add HSC xdp710 on i2c bus0.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-13-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
629e75e5dc ARM: dts: aspeed: minerva: add tmp75 sensor
Add tmp75 sensor on the i2c bus connect to each fan board.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-12-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
469e35cc2f ARM: dts: aspeed: minerva: enable ehci0 for USB
Enable ehci0 for USB.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-11-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
6fcb6ad68c ARM: dts: aspeed: minerva: add linename of two pins
Add linename of two pins for power good/control.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-10-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:13 +09:30
Yang Chen
c0bb01e26f ARM: dts: aspeed: minerva: Add adc sensors for fan board
Add ina238 support to read the sensors in front of fans.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-9-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
90098bb352 ARM: dts: aspeed: minerva: Define the LEDs node name
Define the LEDs node name.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-8-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
6b843a98e7 ARM: dts: aspeed: minerva: remove unused bus and device
Remove unused bus and device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-7-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
183d8a5973 ARM: dts: aspeed: minerva: enable mdio3
Change usage of I2C bus 11 to mdio3.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-6-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
fff89fba6f ARM: dts: aspeed: minerva: change RTC reference
Change the RTC reference from on-chip to externel on i2c bus 9 and address
is 0x51.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-5-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
adb385a333 ARM: dts: aspeed: minerva: add eeprom on i2c bus
Add eeprom on the i2c-9 address 0x50 and i2c-15 address 0x56.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-4-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
606fe7e549 ARM: dts: aspeed: minerva: change aliases for uart
Change and add aliases name for uart interface.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-3-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:12 +09:30
Yang Chen
931f133325 ARM: dts: aspeed: minerva: change the address of tmp75
Revise the address of tmp75 on I2C bus 1 from 0x48 to 0x4f due to design
change.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-2-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-08-22 13:07:11 +09:30
Ninad Palsule
995d8fe034 ARM: dts: aspeed: System1: Updates to BMC board
- Changed temperature sensor monitor chip from tmp423 to tmp432

Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20240605160604.2135840-1-ninad@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Rafał Miłecki
76c5533925 ARM: dts: aspeed: convert ASRock SPC621D8HM3 NVMEM content to layout syntax
Use cleaner (and non-deprecated) bindings syntax. See commit
bd912c991d ("dt-bindings: nvmem: layouts: add fixed-layout") for
details.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://lore.kernel.org/r/20240520063044.4885-1-zajec5@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Eddie James
fdc26e0560 ARM: dts: aspeed: Add IBM P11 Fuji BMC system
Add the device tree for the new BMC system. The Fuji is a P11
system with eight processors.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240522192524.3286237-17-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Eddie James
787d4cbff0 ARM: dts: aspeed: Add IBM P11 Blueridge 4U BMC system
The 4U Blueridge is identical to the Blueridge system but has two extra
power supplies.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240522192524.3286237-16-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Eddie James
fe1d09efd2 ARM: dts: aspeed: Add IBM P11 Blueridge BMC system
Add the device tree for the new BMC system. The Blueridge is a
P11 system with four processors.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240522192524.3286237-15-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Eddie James
e09e75d5c6 ARM: dts: aspeed: Add IBM P11 FSI devices
Add the P11 FSI device tree for use in upcoming BMC systems.
Unlike P10, there is no system with only two processors, so
only the quad processor FSI layout is necessary.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240522192524.3286237-14-eajames@linux.ibm.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-08-20 08:46:48 +09:30
Rob Herring (Arm)
11afaf16a6 arm: dts: aspeed: Use standard 'i2c' bus node name
The standard node name for I2C buses is 'i2c'.

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20240531193115.3814887-1-robh@kernel.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-06-23 14:20:35 +02:00
Zev Weiss
c44211af1a ARM: dts: aspeed: Add ASRock E3C256D4I BMC
Like the E3C246D4I, this is a reasonably affordable off-the-shelf
mini-ITX AST2500/Xeon motherboard with good potential as an OpenBMC
development platform.  Booting the host requires a modicum of eSPI
support that's not yet in the mainline kernel, but most other basic
BMC functionality is available with this device-tree.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://lore.kernel.org/r/20240502002836.17862-8-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-05-02 17:57:16 +09:30
Kelly Hung
d8bdd1e8ac ARM: dts: aspeed: x4tf: Add dts for asus x4tf project
Base on aspeed-g6.dtsi and can boot into BMC console.

Signed-off-by: Kelly Hung <ppighouse@gmail.com>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20240430045853.3894633-3-Kelly_Hung@asus.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2024-05-01 11:51:32 +09:30
Tao Ren
1bd612936b ARM: dts: aspeed: Remove Facebook Cloudripper dts
Remove Facebook Cloudripper dts because the switch platform is not
actively maintained (all the units are deprecated).

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Link: https://lore.kernel.org/r/20240411045622.7915-1-rentao.bupt@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
262fa5540a ARM: dts: aspeed: drop unused ref_voltage ADC property
Aspeed ADC "ref_voltage" property is neither documented nor used.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
10182a1259 ARM: dts: aspeed: harma: correct Mellanox multi-host property
"mlx,multi-host" is using incorrect vendor prefix and is not documented.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
f956245e4b ARM: dts: aspeed: yosemitev2: correct Mellanox multi-host property
"mlx,multi-host" is using incorrect vendor prefix and is not documented.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
d043f805c6 ARM: dts: aspeed: yosemite4: correct Mellanox multi-host property
"mlx,multi-host" is using incorrect vendor prefix and is not documented.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Krzysztof Kozlowski
1a37b63562 ARM: dts: aspeed: greatlakes: correct Mellanox multi-host property
"mlx,multi-host" is using incorrect vendor prefix and is not documented.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240405064624.18997-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Renze Nicolai
c61838aa45 ARM: dts: aspeed: Modify I2C bus configuration
Enable I2C bus 8 which is exposed on the IPMB_1 connector on the X570D4U
mainboard.

Additionally adds a descriptive comment to I2C busses 1 and 5.

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Renze Nicolai
62429c485a ARM: dts: aspeed: Disable unused ADC channels for Asrock X570D4U BMC
Additionally adds labels describing the ADC channels.

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Renze Nicolai
3af11cbbb1 ARM: dts: aspeed: Modify GPIO table for Asrock X570D4U BMC
Restructure GPIO table to fit maximum line length.

Fix mistakes found while working on OpenBMC userland configuration and
based on probing the board.

Schematic for this board is not available. Because of this the choice
was made to use a descriptive method for naming the GPIOs.

 - Push-pull outputs start with output-*
 - Open-drain outputs start with control-*
 - LED outputs start with led-*
 - Inputs start with input-*
 - Button inputs start with button-*
 - Active low signals end with *-n

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Delphine CC Chiu
e0e5ed990b ARM: dts: aspeed: yosemite4: set bus13 frequency to 100k
Since the ocp debug card only supports 100k, the bus is also set to 100k.

Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
[AJ: Fixed fuzz due to prior IPMB patch]
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:20 +09:30
Eddie James
48286e1f07 ARM: dts: Aspeed: Bonnell: Fix NVMe LED labels
The PCA chip for the NVMe LEDs is wired up backwards, so correct
the device tree labels.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Delphine CC Chiu
1c52e1ca90 ARM: dts: aspeed: yosemite4: Enable ipmb device for OCP debug card
Add OCP debug card devicetree config

Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Zev Weiss
4ed43e8a1b ARM: dts: aspeed: ahe50dc: Update lm25066 regulator name
A recent change to the lm25066 driver changed the name of its
regulator from vout0 to vout; device-tree users of lm25066's regulator
functionality (of which ahe50dc is the only one) thus require a
corresponding update.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Cc: Conor Dooley <conor+dt@kernel.org>
Cc: Guenter Roeck <linux@roeck-us.net>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Zev Weiss
dc260f505b ARM: dts: aspeed: Add vendor prefixes to lm25066 compat strings
Due to the way i2c driver matching works (falling back to the driver's
id_table if of_match_table fails) this didn't actually cause any
misbehavior, but let's add the vendor prefixes so things actually work
the way they were intended to.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Zev Weiss
247997184b ARM: dts: aspeed: asrock: Use MAC address from FRU EEPROM
Like the more recently added ASRock BMC platforms, e3c246d4i and
romed8hm3 also have the BMC's MAC address available in the baseboard
FRU EEPROM, so let's add support for using it.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Andrew Geissler
e83c420ade ARM: dts: aspeed: system1: IBM System1 BMC board
Added a device tree for IBM system1 BMC board, which uses AST2600 SoC.

Signed-off-by: Andrew Geissler <geissonator@yahoo.com>
Signed-off-by: Ninad Palsule <ninad@linux.ibm.com>
Link: https://lore.kernel.org/r/20240125212154.4028640-3-ninad@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Eddie James
dba3e7743e ARM: dts: aspeed: FSI interrupt support
Enable FSI interrupt controllers for AST2600 and P10BMC hub master.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20240215220759.976998-27-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
4424cd4db6 ARM: dts: aspeed: Harma: Modify GPIO line name
Add:
"reset-cause-platrst", "cpu0-err-alert", "leakage-detect-alert",
"presence-post-card", "ac-power-button", "P0_I3C_APML_ALERT_L",
"irq-uv-detect-alert", "irq-hsc-alert", "cpu0-prochot-alert",
"cpu0-thermtrip-alert", "reset-cause-pcie", "pvdd11-ocp-alert"

Rename:
"power-cpu-good" to "host0-ready",
"host-ready-n" to "post-end-n

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-13-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
287ba28a69 ARM: dts: aspeed: Harma: Add retimer device
Add pt5161l device in i2c bus12 and bus21.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-12-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
4187ccb5a4 ARM: dts: aspeed: Harma: Revise node name
Revise max31790 and delta_brick node name.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-11-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
fc2891c745 ARM: dts: aspeed: Harma: Add ltc4286 device
Add ltc4286 device.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-10-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
0a6821e249 ARM: dts: aspeed: Harma: Add NIC Fru device
Add MB NIC Device

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-9-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
7b55cf239c ARM: dts: aspeed: Harma: Revise max31790 address
Revise max31790 address from 0x30 to 0x5e

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-8-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
645f9eb1bd ARM: dts: aspeed: Harma: Add PDB temperature
Add PDB temperature sensor.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-7-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
3042a7e557 ARM: dts: aspeed: Harma: Add spi-gpio
Add spi-gpio for tpm device.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-6-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
5a29fd7ad4 ARM: dts: aspeed: Harma: Add cpu power good line name
Add a line name for cpu power good.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-5-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
f8bbe984ef ARM: dts: aspeed: Harma: Remove Vuart
Remove vuart to avoid port conflict with uart2

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-4-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:19 +09:30
Peter Yin
d965bbe65b ARM: dts: aspeed: Harma: mapping ttyS2 to UART4.
Change routing to match SOL(Serial Over LAN) settings.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-3-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Peter Yin
a78bfc1096 ARM: dts: aspeed: Harma: Revise SGPIO line name.
The same name as reset-control-smb-e1s
change to reset-control-smb-e1s-0 and reset-control-smb-e1s-0.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240412091600.2534693-2-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
51493f0fd6 ARM: dts: aspeed: minerva: add sgpio line name
Add the SGPIO line name that the project's function can use by the
meaningful name.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-12-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
25a56a921c ARM: dts: aspeed: minerva: add gpio line name
Add the GPIO line name that the project's function can use by the
meaningful name.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-11-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
bb4d303824 ARM: dts: aspeed: minerva: Add led-fan-fault gpio
Add led-fan-fault gpio pin on the PCA9555 on the i2c bus 0.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-10-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
2dcb5ca763 ARM: dts: aspeed: minerva: add fan rpm controller
Add fan rpm controller max31790 on all bus of FCB.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-9-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
b2daa191f7 ARM: dts: aspeed: minerva: add bus labels and aliases
Add bus labels and aliases for the fan control board.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-8-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
37f295a28e ARM: dts: aspeed: minerva: correct the address of eeprom
Correct the address from 0x51 to 0x54 of eeprom on the i2c bus 1

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-7-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
feab10df42 ARM: dts: aspeed: minerva: Add temperature sensor
Add one temperature sensor on i2c bus 1

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-6-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
331dfa00f4 ARM: dts: aspeed: minerva: Enable power monitor device
Enable power monitor device ina230 and ltc2945 on the i2c bus 0

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-5-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
8061d80d7a ARM: dts: aspeed: minerva: Change sgpio use
Correct the sgpio use from sgpiom1 to sgpiom0

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-4-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
cb188e3f27 ARM: dts: aspeed: minerva: Modify mac3 setting
Remove the unuse setting and fix the link to 100 M

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-3-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Yang Chen
6ee9b93999 ARM: dts: aspeed: minerva: Revise the name of DTS
The project Minerva which is the platform used by Meta has two boards: the
Chassis Management Module (Minerva) and the Motherboard (Harma), so change
the DTS name to minerva here for CMM use.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231212075200.983536-2-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Peter Yin
bb3776e564 ARM: dts: aspeed: Harma: Add Meta Harma (AST2600) BMC
Add linux device tree entry related to
the Meta(Facebook) computer-node system use an AT2600 BMC.
This node is named "Harma".

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231211162656.2564267-3-peteryin.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Renze Nicolai
f373cffbdc ARM: dts: aspeed: asrock: Add ASRock X570D4U BMC
This is a relatively low-cost AST2500-based Amd Ryzen 5000 Series
micro-ATX board that we hope can provide a decent platform for OpenBMC
development.

This initial device-tree provides the necessary configuration for
basic BMC functionality such as serial console, KVM support
and POST code snooping.

Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231202003908.3635695-3-renze@rnplus.nl
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Zev Weiss
dc4a65fdfe ARM: dts: aspeed: Add ASRock SPC621D8HM3 BMC
This is a Xeon board broadly similar (aside from CPU vendor) to the
already-support romed8hm3 (half-width, single-socket, ast2500).  It
doesn't require anything terribly special for OpenBMC support, so this
device-tree should provide everything necessary for basic
functionality with it.

Signed-off-by: Zev Weiss <zev@bewilderbeest.net>
Link: https://lore.kernel.org/r/20231120121954.19926-6-zev@bewilderbeest.net
Signed-off-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2024-05-01 11:49:18 +09:30
Rob Herring
96fd598e9c
arm: dts: Fix dtc interrupt_provider warnings
The dtc interrupt_provider warning is off by default. Fix all the warnings
so it can be enabled.

Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Andrew Jeffery <andrew@codeconstruct.com.au>
Reviewed-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom
Acked-by: Thierry Reding <treding@nvidia.com>
Link: https://lore.kernel.org/r/20240213-arm-dt-cleanups-v1-2-f2dee1292525@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2024-02-20 21:47:41 +01:00
Lukas Wunner
8412c47d68
ARM: dts: Fix TPM schema violations
Since commit 26c9d152eb ("dt-bindings: tpm: Consolidate TCG TIS
bindings"), several issues are reported by "make dtbs_check" for ARM
devicetrees:

The nodename needs to be "tpm@0" rather than "tpmdev@0" and the
compatible property needs to contain the chip's name in addition to the
generic "tcg,tpm_tis-spi" or "tcg,tpm-tis-i2c":

  tpmdev@0: $nodename:0: 'tpmdev@0' does not match '^tpm(@[0-9a-f]+)?$'
        from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm_tis-spi.yaml#

  tpm@2e: compatible: 'oneOf' conditional failed, one must be fixed:
        ['tcg,tpm-tis-i2c'] is too short
        from schema $id: http://devicetree.org/schemas/tpm/tcg,tpm-tis-i2c.yaml#

Fix these schema violations.

Aspeed Facebook BMCs use an Infineon SLB9670:
https://lore.kernel.org/all/ZZSmMJ%2F%2Fl972Qbxu@fedora/
https://lore.kernel.org/all/ZZT4%2Fw2eVzMhtsPx@fedora/
https://lore.kernel.org/all/ZZTS0p1hdAchIbKp@heinlein.vulture-banana.ts.net/

Aspeed Tacoma uses a Nuvoton NPCT75X per commit 39d8a73c53 ("ARM: dts:
aspeed: tacoma: Add TPM").

phyGATE-Tauri uses an Infineon SLB9670:
https://lore.kernel.org/all/ab45c82485fa272f74adf560cbb58ee60cc42689.camel@phytec.de/

A single schema violation remains in am335x-moxa-uc-2100-common.dtsi
because it is unknown which chip is used on the board.  The devicetree's
author has been asked for clarification but has not responded so far:
https://lore.kernel.org/all/20231220090910.GA32182@wunner.de/

Signed-off-by: Lukas Wunner <lukas@wunner.de>
Reviewed-by: Patrick Williams <patrick@stwcx.xyz>
Reviewed-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
2024-01-25 18:09:51 +01:00
Chanh Nguyen
d024ca2792 ARM: dts: aspeed: mtmitchell: Add I2C NVMe alias port
Adds the I2C alias ports to each NVMe drive via the
backplane card.

Besides that, it also adds the eeprom and temperature sensor
on the backplane card.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-8-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-10-13 14:59:03 +10:30
Chanh Nguyen
8098d06af1 ARM: dts: aspeed: mtmitchell: Remove redundant ADC configurations
Mt.Mitchell DVT and later hardware do not use adc1. It only uses
adc0 with channels 0, 1 and 2. This commit removes redundant ADC
configurations.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-7-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-10-13 14:59:03 +10:30
Chanh Nguyen
e998856086 ARM: dts: aspeed: mtmitchell: Add inlet temperature sensor
Add the inlet temperature at address 0x48, which is connected
via BMC I2C8.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-6-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-10-13 14:59:03 +10:30
Chanh Nguyen
1edcc7251f ARM: dts: aspeed: mtjade: Add the gpio-hog
Add the GPIOR5 as a gpio-hog with output high so that can
power the OCP card once the BMC booting.

Add the GPIOAC5 as a gpio-hog with output high to notice
the BMC state.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-4-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-10-13 14:59:03 +10:30
Chanh Nguyen
e71d1a9255 ARM: dts: aspeed: mtjade, mtmitchell: Add new gpio-line-names
Add new gpio-line-names from the Mt.Jade and Mt.Mitchell
HW schematic.

Mt.Jade
  GPIOB5: presence-cpu0
  GPIOF0: ps0-pgood
  GPIOF1: ps1-pgood
  GPIOG2: host0-shd-ack-n
  GPIOH0: uart1-mode1
  GPIOH1: uart2-mode1
  GPIOH2: uart3-mode1
  GPIOH3: uart4-mode1
  GPIOH7: i2c6-reset-n
  GPIOH3: host0-reboot-ack-n
  GPIOM4: s0-i2c9-alert-n
  GPIOM5: s1-i2c9-alert-n
  GPIOQ6: led-identify
  GPIOS0: s0-vr-hot-n
  GPIOS1: s1-vr-hot-n
  GPIOS5: vr-pmbus-sel-n
  GPIOY3: bmc-vga-en-n
  GPIOZ3: s0-rtc-lock
  GPIOAC2: spi0-program-sel
  GPIOAC3: spi0-backup-sel

Mt.Mitchell:
  GPIOC3: bmc-debug-mode
  GPIOE1: eth-phy-int-n
  GPIOH0: jtag-program-sel
  GPIOH1: fpga-program-b
  GPIOW3: s1-pcp-pgood

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-3-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-10-13 14:59:03 +10:30
Chanh Nguyen
081404fe01 ARM: dts: aspeed: mtjade, mtmitchell: Update gpio-line-names
Update GPIO line-name to follow naming convention specified at
github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20231005035525.19036-2-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-10-13 14:59:03 +10:30
Yang Chen
fe93af8652 ARM: dts: aspeed: Minerva: Add Facebook Minerva CMC board
Add linux device tree entry related to the Minerva Chassis Management
Controller (CMC) specific devices connected to the Aspeed SoC (AST2600).

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20230914125648.3966519-3-yangchen.openbmc@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-10-13 14:59:03 +10:30
Eddie James
d2f6fc54fc ARM: dts: aspeed: bonnell: Add reserved memory for TPM event log
Trusted boot support requires the platform event log passed up
from the bootloader. In U-Boot, this can now be accomplished with
a reserved memory region, so add a region for this purpose to the
Bonnell BMC devicetree.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230616142610.356623-1-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-09-22 15:08:23 +09:30
Geert Uytterhoeven
4b46d86c97
ARM: dts: aspeed: Fix pca954x i2c-mux node names
"make dtbs_check":

    arch/arm/boot/dts/aspeed-bmc-bytedance-g220a.dtb: i2c-switch@70: $nodename:0: 'i2c-switch@70' does not match '^(i2c-?)?mux'
	    From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
    arm/boot/dts/aspeed-bmc-bytedance-g220a.dtb: i2c-switch@70: Unevaluated properties are not allowed ('#address-cells', '#size-cells', 'i2c@0', 'i2c@1', 'i2c@2', 'i2c@3' were unexpected)
	    From schema: Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.yaml
    ...

Fix this by renaming PCA954x nodes to "i2c-mux", to match the I2C bus
multiplexer/switch DT bindings and the Generic Names Recommendation in
the Devicetree Specification.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-08-12 14:11:04 +02:00
Dylan Hung
32b7343226 ARM: dts: aspeed: Add AST2600 I3C control pins
Add pinctrl support for the I3C1 and I3C2 pins.

Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Reviewed-by: Jeremy Kerr <jk@codeconstruct.com.au>
Link: https://lore.kernel.org/r/20230809134413.3614535-1-dylan_hung@aspeedtech.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:39:42 +09:30
Joel Stanley
7f2938d250 ARM: dts: aspeed: everest: Move common devices up
Other systems have the SoC devices listed before the FSI description.
Move them up in order to make them similar.

Link: https://lore.kernel.org/r/20230809074921.116987-6-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:54 +09:30
Eddie James
f0eb62ece2 ARM: dts: aspeed: everest: Reorganise FSI description
Use the P10 quad FSI CFAM description to reduce duplication and add the
I2C responders and associated engines.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230809074921.116987-5-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:54 +09:30
Joel Stanley
71354f7702 ARM: dts: aspeed: rainier: Reorganise FSI description
Use the P10 quad FSI CFAM description to reduce duplication.

Link: https://lore.kernel.org/r/20230809074921.116987-4-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Joel Stanley
f868aab874 ARM: dts: aspeed: bonnell: Reorganise FSI description
Use the P10 dual FSI CFAM description to reduce duplication.

Link: https://lore.kernel.org/r/20230809074921.116987-3-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Eddie James
fa9d3b8be2 ARM: dts: aspeed: Add P10 FSI descriptions
These will be used by BMCs attached to a IBM Power10 server CPU.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Link: https://lore.kernel.org/r/20230809074921.116987-2-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Delphine CC Chiu
2b8d94f4b4 ARM: dts: aspeed: yosemite4: add Facebook Yosemite 4 BMC
Add linux device tree entry for Yosemite 4 devices connected to BMC.
The Yosemite 4 is a Meta multi-node server platform, based on AST2600 SoC.

Signed-off-by: Delphine CC Chiu <Delphine_CC_Chiu@wiwynn.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230810070032.335161-3-Delphine_CC_Chiu@wiwynn.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Tao Ren
8dc783d9e2 ARM: dts: aspeed: wedge400: Set eMMC max frequency
Set eMMC max frequency to 25MHz to prevent intermittent eMMC access
failures.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230803230324.731268-4-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Tao Ren
2901b71c0c ARM: dts: aspeed: wedge400: Enable more ADC channels
Enable ASPEED-ADC channels 5-8 to support voltage monitoring of all the
Wedge400 hardware revisions.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230803230324.731268-3-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Tao Ren
285396979f ARM: dts: aspeed: Update spi alias in Facebook AST2500 Common dtsi
Set FMC controller to "spi0" in ast2500-facebook-netbmc-common.dtsi so
the spi bus is consistent with the flash labels defined in flash layout.

Signed-off-by: Tao Ren <rentao.bupt@gmail.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230803230324.731268-2-rentao.bupt@gmail.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Lakshmi Yadlapati
bca5bf0eca ARM: dts: aspeed: rainier: Remove TPM device
TPM is disabled in Rainier, remove TPM device.

Signed-off-by: Lakshmi Yadlapati <lakshmiy@us.ibm.com>
Link: https://lore.kernel.org/r/20230725141606.1641080-2-lakshmiy@us.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Joel Stanley
dda28c0952 ARM: dts: aspeed: Add AST2600 VUARTs
The AST2600 has two more vuarts, placed between the existing two in the
memory map.

Link: https://lore.kernel.org/r/20230620042257.73665-1-joel@jms.id.au
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Chanh Nguyen
962047a354 ARM: dts: aspeed: mtmitchell: Add MCTP
Enable MCTP driver on I2C3 bus for MCTP transaction

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-4-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Chanh Nguyen
acde9078d9 ARM: dts: aspeed: mtmitchell: Update ADC sensors for Mt.Mitchell DVT systems
Change to use I2C ADC controller (ltc2497) for Mt.Mitchell DVT and
later hardware.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-3-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:53 +09:30
Chanh Nguyen
d50b1baf4f ARM: dts: aspeed: mtmitchell: Enable the BMC UART8 and UART9
The BMC UART8 and UART9 were connected to the Secpro and Mpro console
of socket S1 on the Mt.Mitchell system.

Signed-off-by: Chanh Nguyen <chanh@os.amperecomputing.com>
Link: https://lore.kernel.org/r/20230620092537.20007-2-chanh@os.amperecomputing.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-08-10 21:33:52 +09:30
Chen PJ
3f2879e404 ARM: dts: aspeed: Adding Inventec Starscream BMC
Initial introduction of Inventec Starscream x86 family
equipped with AST2600 BMC SoC.

Signed-off-by: Chen PJ <Chen.pj@inventec.com>
Link: https://lore.kernel.org/r/20230703060222.24263-2-chen.pj@inventec.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-07-10 13:44:20 +09:30
Eddie James
267c95dc9f ARM: dts: aspeed: bonnell: Add DIMM SPD
Add the DIMM SPD to the processor I2C busses.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230322140348.569397-5-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-07-10 13:41:38 +09:30
Rob Herring
724ba67515 ARM: dts: Move .dts files to vendor sub-directories
The arm dts directory has grown to 1559 boards which makes it a bit
unwieldy to maintain and use. Past attempts stalled out due to plans to
move .dts files out of the kernel tree. Doing that is no longer planned
(any time soon at least), so let's go ahead and group .dts files by
vendors. This move aligns arm with arm64 .dts file structure.

There's no change to dtbs_install as the flat structure is maintained on
install.

The naming of vendor directories is roughly in this order of preference:
- Matching original and current SoC vendor prefix/name (e.g. ti, qcom)
- Current vendor prefix/name if still actively sold (SoCs which have
  been aquired) (e.g. nxp/imx)
- Existing platform name for older platforms not sold/maintained by any
  company (e.g. gemini, nspire)

The whole move was scripted with the exception of MAINTAINERS and a few
makefile fixups.

Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Michal Simek <michal.simek@amd.com> #Xilinx
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Paul Barker <paul.barker@sancloud.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Wei Xu <xuwei5@hisilicon.com> #hisilicon
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Nick Hawkins <nick.hawkins@hpe.com>
Acked-by: Baruch Siach <baruch@tkos.co.il>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Acked-by: Peter Rosin <peda@axentia.se>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com> #broadcom
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Jisheng Zhang <jszhang@kernel.org>
Acked-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Romain Perier <romain.perier@gmail.com>
Acked-by: Alexandre TORGUE <alexandre.torgue@st.com>
Acked-by: Shawn Guo <shawnguo@kernel.org>
Acked-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Enric Balletbo i Serra <eballetbo@gmail.com>
Signed-off-by: Rob Herring <robh@kernel.org>
2023-06-21 11:39:50 -06:00