Commit Graph

27611 Commits

Author SHA1 Message Date
Linus Torvalds
61d417921c soc: fixes for 6.17, part 1
These are a few patches to fix up bits that went missing during the
 merge window: The tegra and s3c patches address trivial regressions
 from conflicts, the bcm7445 makes the dt conform to the binding that
 was made stricter.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmiWY0UACgkQmmx57+YA
 GNnEKA/+KZne51B+zEBFM/Fp4cOdMbC1+Bp5qfSqlR3P0btV7D9kvJWqCLb67Rj0
 gNcZP6zrxK/jgdlkS7uUKx55nPiuDiZKnY/PZyMJqrKcw34Xz/c0PAFPb5Q0EOeE
 frBHfGgpC4ERyAinpJJm8qX1LSCDk7cdV+7oaOM8UCDByLWdoj+4UZEI0dXR7HI8
 aTkTnHtcX62/stvujMDZkfF8Pdvx0E1pTNYM1dsUmyHJ/h8enjmBPljQr6Guyt/n
 uflMGMK6Fqdd5BjiLYyZRep0IzHNu5x9+MmS+f+FUgRQYwU+pyuWA75z/cj78lOA
 VMmmwwddh8MD7pOCmY/YliAzGbX6LOdxr3SaGKl5OhMWZqt64NXzfyRHDuTLINK4
 OoUCSwW+1LEi+nlt3ibVKQrPkQlsckCcdQ9n4BbZOhDczHZIOMYQBKsCfFx88eNf
 s834O18hz9UNkyd1297nC2chSc9JYThoqqFAPwciq/LnPTXDPuSiHuc1vxHV4hQo
 1w/q5rvK3kTocCsGf2fsM0oSK5KGSIHuo2ke/7/EBZVajLpkStoADBdiEWdvxRTr
 Y62qF7u0Z1LP5zgvF3Xxhmr9hH80GFrq4k1HHzSKV2eYp4MDwNkxqQLPUhxGzfYm
 fFNQxlvjsRNtq8VS0/fFbvM7RhUWff3RW7dJUUUdZfb4YADqLWM=
 =fzZb
 -----END PGP SIGNATURE-----

Merge tag 'soc-fixes-6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC fixes from Arnd Bergmann:
 "These are a few patches to fix up bits that went missing during the
  merge window: The tegra and s3c patches address trivial regressions
  from conflicts, the bcm7445 makes the dt conform to the binding that
  was made stricter"

* tag 'soc-fixes-6.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  arm64: tegra: Remove numa-node-id properties
  ARM: s3c/gpio: complete the conversion to new GPIO value setters
  ARM: dts: broadcom: Fix bcm7445 memory controller compatible
2025-08-09 07:58:55 +03:00
Arnd Bergmann
0018c39d0a This pull request contains Device Tree fixes for Broadcom ARM-based SoC
platforms, please pull the following:
 
 - Florian fixes the bcm7445.dtsi file to conform to the
   brcm,brcm,brcmstb-memc-ddr.yaml binding after 501be7cece
   ("dt-bindings: memory-controller: Define fallback compatible")
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmiJNWwACgkQh9CWnEQH
 BwSrTA/7BSPwbRTpxXqcMReAuGJq9CQVk/pb/h3sBPRBy4zkgRCQ0k41x1k45T0P
 4RsJMn8v6XeP486bj0vYJs/mC6+TcMR8SoX8SnYlYy8vW7ddjsLa6DhMjuFKf3uR
 Osy0mY4AfbHmm8MS3z+s8TQnPH440PqUIeCzxMdYntroP6QSxEiZfZVVNJiWda+e
 25dDFQrqH0ww5JXzcTQGK1E2coyr05NdRrcMH5lCQ8XrNap0n68Oy30mWNMc9jFy
 GOa7BF/weNruYFy2hipzVMtGtZ29Bf4kphyocnJzgBi0RI6jaBakRfbklVjA9E4v
 keCDGcraGxunfoVFd5yIbRfPay7xeNwAc/05MJ2ittvA3D1eU8DjX9CUYxdza4v7
 nzjm8eb1DxwKjqOzLDJ5ADT1yeqI2la4ku1iq3JYaUHaIFPUwGcsOQFhXPcugKOJ
 K2XIgQUuOXHaUTx3e8WBjk8eSNZDUtgwV4xSNOR44eENlj7dOsg8tH7vjy9Z/w6L
 MuRwCsZnDVURRA8OWGYeoIwGOoLVvZdpNmAP5wPDQ9SevlPYQiyjzFRDSQgdATfe
 /ItwF9nesMLXJie3wt+ryi0+ho5OxyoMa9uv/98wAA/Wm9W8CBW5LNuXHVAp7pin
 h3p6q2Pwp2qH2t5xtclBBf7ilJUJhlBIb2+LGUGbdHmBHmqwq24=
 =AUGZ
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmiKRpUACgkQmmx57+YA
 GNlLRw/+P7Az2cZIxxHNEVmf+USJ/ak5Uz9tvsiSyWcqAum2McS7/7PdEsbJn3NZ
 XrW7W8iR0Urr11LXdO6udhMJ3ZAgfTKf0U3Tvv+rsYk+RGxEWO7RAyUtpQcMygKj
 2kjKvNnGtzY4tZcB0v0ueEsxlKzj0iyse8QVmjBQ+pFwwuH9tI24TojeZ0BMyKNo
 GvDFRdSZ6q54EAWJlkrJ9i+LrBLraKqesN42yjnHB2k72kb1J3tEbaeeJ5H/83xg
 t0fMHFWcubj92cJsRCl9GlImiHAvOnK1gqhXW4+vmH/z6z5Grhdg6D8L40jUo/tR
 R4wvaKOkTaQpVpfNbC4RpyuBPfCqc2MD+daeUcY58Wm/CZYmqzzytCvB7i3qLxJv
 2biWu0MS20Jwl88k97p0ioWwo+SXziMOm9rNk721FBJHLXLReDpOKpkF7z782AFo
 8vj93Ws7sS6oxS5lpRXvUkStJfxnBYkHipCGdW6Gg9byuv/6jm666OXleriFEgPS
 oasCJF/OqHIZTwZDCOjEICiYWrtVy0mGLH7gbL250UItunoeXGpL8V7MUcafqCzd
 FpbydM6RoCeRVr8F7uKxBZXqFWMN3XGEVKFC01yPor6QDvsmt7AKA+eWJ9Y4MAIG
 hwTe7DhGyyT7Co/0ypZ+AxHnkw/WfOzJLNR1SQl+wVyMujr9JDc=
 =AKll
 -----END PGP SIGNATURE-----

Merge tag 'arm-soc/for-6.16/devicetree-fixes' of https://github.com/Broadcom/stblinux into for-next

This pull request contains Device Tree fixes for Broadcom ARM-based SoC
platforms, please pull the following:

- Florian fixes the bcm7445.dtsi file to conform to the
  brcm,brcm,brcmstb-memc-ddr.yaml binding after 501be7cece
  ("dt-bindings: memory-controller: Define fallback compatible")

* tag 'arm-soc/for-6.16/devicetree-fixes' of https://github.com/Broadcom/stblinux:
  ARM: dts: broadcom: Fix bcm7445 memory controller compatible

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-30 18:21:40 +02:00
Linus Torvalds
8be4d31cb8 Networking changes for 6.17.
Core & protocols
 ----------------
 
  - Wrap datapath globals into net_aligned_data, to avoid false sharing.
 
  - Preserve MSG_ZEROCOPY in forwarding (e.g. out of a container).
 
  - Add SO_INQ and SCM_INQ support to AF_UNIX.
 
  - Add SIOCINQ support to AF_VSOCK.
 
  - Add TCP_MAXSEG sockopt to MPTCP.
 
  - Add IPv6 force_forwarding sysctl to enable forwarding per interface.
 
  - Make TCP validation of whether packet fully fits in the receive
    window and the rcv_buf more strict. With increased use of HW
    aggregation a single "packet" can be multiple 100s of kB.
 
  - Add MSG_MORE flag to optimize large TCP transmissions via sockmap,
    improves latency up to 33% for sockmap users.
 
  - Convert TCP send queue handling from tasklet to BH workque.
 
  - Improve BPF iteration over TCP sockets to see each socket exactly once.
 
  - Remove obsolete and unused TCP RFC3517/RFC6675 loss recovery code.
 
  - Support enabling kernel threads for NAPI processing on per-NAPI
    instance basis rather than a whole device. Fully stop the kernel NAPI
    thread when threaded NAPI gets disabled. Previously thread would stick
    around until ifdown due to tricky synchronization.
 
  - Allow multicast routing to take effect on locally-generated packets.
 
  - Add output interface argument for End.X in segment routing.
 
  - MCTP: add support for gateway routing, improve bind() handling.
 
  - Don't require rtnl_lock when fetching an IPv6 neighbor over Netlink.
 
  - Add a new neighbor flag ("extern_valid"), which cedes refresh
    responsibilities to userspace. This is needed for EVPN multi-homing
    where a neighbor entry for a multi-homed host needs to be synced
    across all the VTEPs among which the host is multi-homed.
 
  - Support NUD_PERMANENT for proxy neighbor entries.
 
  - Add a new queuing discipline for IETF RFC9332 DualQ Coupled AQM.
 
  - Add sequence numbers to netconsole messages. Unregister netconsole's
    console when all net targets are removed. Code refactoring.
    Add a number of selftests.
 
  - Align IPSec inbound SA lookup to RFC 4301. Only SPI and protocol
    should be used for an inbound SA lookup.
 
  - Support inspecting ref_tracker state via DebugFS.
 
  - Don't force bonding advertisement frames tx to ~333 ms boundaries.
    Add broadcast_neighbor option to send ARP/ND on all bonded links.
 
  - Allow providing upcall pid for the 'execute' command in openvswitch.
 
  - Remove DCCP support from Netfilter's conntrack.
 
  - Disallow multiple packet duplications in the queuing layer.
 
  - Prevent use of deprecated iptables code on PREEMPT_RT.
 
 Driver API
 ----------
 
  - Support RSS and hashing configuration over ethtool Netlink.
 
  - Add dedicated ethtool callbacks for getting and setting hashing fields.
 
  - Add support for power budget evaluation strategy in PSE /
    Power-over-Ethernet. Generate Netlink events for overcurrent etc.
 
  - Support DPLL phase offset monitoring across all device inputs.
    Support providing clock reference and SYNC over separate DPLL
    inputs.
 
  - Support traffic classes in devlink rate API for bandwidth management.
 
  - Remove rtnl_lock dependency from UDP tunnel port configuration.
 
 Device drivers
 --------------
 
  - Add a new Broadcom driver for 800G Ethernet (bnge).
 
  - Add a standalone driver for Microchip ZL3073x DPLL.
 
  - Remove IBM's NETIUCV device driver.
 
  - Ethernet high-speed NICs:
    - Broadcom (bnxt):
     - support zero-copy Tx of DMABUF memory
     - take page size into account for page pool recycling rings
    - Intel (100G, ice, idpf):
      - idpf: XDP and AF_XDP support preparations
      - idpf: add flow steering
      - add link_down_events statistic
      - clean up the TSPLL code
      - preparations for live VM migration
    - nVidia/Mellanox:
     - support zero-copy Rx/Tx interfaces (DMABUF and io_uring)
     - optimize context memory usage for matchers
     - expose serial numbers in devlink info
     - support PCIe congestion metrics
    - Meta (fbnic):
      - add 25G, 50G, and 100G link modes to phylink
      - support dumping FW logs
    - Marvell/Cavium:
      - support for CN20K generation of the Octeon chips
    - Amazon:
      - add HW clock (without timestamping, just hypervisor time access)
 
  - Ethernet virtual:
    - VirtIO net:
      - support segmentation of UDP-tunnel-encapsulated packets
    - Google (gve):
      - support packet timestamping and clock synchronization
    - Microsoft vNIC:
      - add handler for device-originated servicing events
      - allow dynamic MSI-X vector allocation
      - support Tx bandwidth clamping
 
  - Ethernet NICs consumer, and embedded:
    - AMD:
      - amd-xgbe: hardware timestamping and PTP clock support
    - Broadcom integrated MACs (bcmgenet, bcmasp):
      - use napi_complete_done() return value to support NAPI polling
      - add support for re-starting auto-negotiation
    - Broadcom switches (b53):
      - support BCM5325 switches
      - add bcm63xx EPHY power control
    - Synopsys (stmmac):
      - lots of code refactoring and cleanups
    - TI:
      - icssg-prueth: read firmware-names from device tree
      - icssg: PRP offload support
    - Microchip:
      - lan78xx: convert to PHYLINK for improved PHY and MAC management
      - ksz: add KSZ8463 switch support
    - Intel:
      - support similar queue priority scheme in multi-queue and
        time-sensitive networking (taprio)
      - support packet pre-emption in both
    - RealTek (r8169):
      - enable EEE at 5Gbps on RTL8126
    - Airoha:
      - add PPPoE offload support
      - MDIO bus controller for Airoha AN7583
 
  - Ethernet PHYs:
    - support for the IPQ5018 internal GE PHY
    - micrel KSZ9477 switch-integrated PHYs:
      - add MDI/MDI-X control support
      - add RX error counters
      - add cable test support
      - add Signal Quality Indicator (SQI) reporting
    - dp83tg720: improve reset handling and reduce link recovery time
    - support bcm54811 (and its MII-Lite interface type)
    - air_en8811h: support resume/suspend
    - support PHY counters for QCA807x and QCA808x
    - support WoL for QCA807x
 
  - CAN drivers:
    - rcar_canfd: support for Transceiver Delay Compensation
    - kvaser: report FW versions via devlink dev info
 
  - WiFi:
    - extended regulatory info support (6 GHz)
    - add statistics and beacon monitor for Multi-Link Operation (MLO)
    - support S1G aggregation, improve S1G support
    - add Radio Measurement action fields
    - support per-radio RTS threshold
    - some work around how FIPS affects wifi, which was wrong (RC4 is used
      by TKIP, not only WEP)
    - improvements for unsolicited probe response handling
 
  - WiFi drivers:
    - RealTek (rtw88):
      - IBSS mode for SDIO devices
    - RealTek (rtw89):
      - BT coexistence for MLO/WiFi7
      - concurrent station + P2P support
      - support for USB devices RTL8851BU/RTL8852BU
    - Intel (iwlwifi):
      - use embedded PNVM in (to be released) FW images to fix
        compatibility issues
      - many cleanups (unused FW APIs, PCIe code, WoWLAN)
      - some FIPS interoperability
    - MediaTek (mt76):
      - firmware recovery improvements
      - more MLO work
    - Qualcomm/Atheros (ath12k):
      - fix scan on multi-radio devices
      - more EHT/Wi-Fi 7 features
      - encapsulation/decapsulation offload
    - Broadcom (brcm80211):
      - support SDIO 43751 device
 
  - Bluetooth:
    - hci_event: add support for handling LE BIG Sync Lost event
    - ISO: add socket option to report packet seqnum via CMSG
    - ISO: support SCM_TIMESTAMPING for ISO TS
 
  - Bluetooth drivers:
    - intel_pcie: support Function Level Reset
    - nxpuart: add support for 4M baudrate
    - nxpuart: implement powerup sequence, reset, FW dump, and FW loading
 
 Signed-off-by: Jakub Kicinski <kuba@kernel.org>
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEE6jPA+I1ugmIBA4hXMUZtbf5SIrsFAmiFgLgACgkQMUZtbf5S
 IrvafxAAnQRwYBoIG+piCILx6z5pRvBGHkmEQ4AQgSCFuq2eO3ubwMFIqEybfma1
 5+QFjUZAV3OgGgKRBS2KGWxtSzdiF+/JGV1VOIN67sX3Mm0a2QgjA4n5CgKL0FPr
 o6BEzjX5XwG1zvGcBNQ5BZ19xUUKjoZQgTtnea8sZ57Fsp5RtRgmYRqoewNvNk/n
 uImh0NFsDVb0UeOpSzC34VD9l1dJvLGdui4zJAjno/vpvmT1DkXjoK419J/r52SS
 X+5WgsfJ6DkjHqVN1tIhhK34yWqBOcwGFZJgEnWHMkFIl2FqRfFKMHyqtfLlVnLA
 mnIpSyz8Sq2AHtx0TlgZ3At/Ri8p5+yYJgHOXcDKyABa8y8Zf4wrycmr6cV9JLuL
 z54nLEVnJuvfDVDVJjsLYdJXyhMpZFq6+uAItdxKaw8Ugp/QqG4QtoRj+XIHz4ZW
 z6OohkCiCzTwEISFK+pSTxPS30eOxq43kCspcvuLiwCCStJBRkRb5GdZA4dm7LA+
 1Od4ADAkHjyrFtBqTyyC2scX8UJ33DlAIpAYyIeS6w9Cj9EXxtp1z33IAAAZ03MW
 jJwIaJuc8bK2fWKMmiG7ucIXjPo4t//KiWlpkwwqLhPbjZgfDAcxq1AC2TLoqHBL
 y4EOgKpHDCMAghSyiFIAn2JprGcEt8dp+11B0JRXIn4Pm/eYDH8=
 =lqbe
 -----END PGP SIGNATURE-----

Merge tag 'net-next-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next

Pull networking updates from Jakub Kicinski:
 "Core & protocols:

   - Wrap datapath globals into net_aligned_data, to avoid false sharing

   - Preserve MSG_ZEROCOPY in forwarding (e.g. out of a container)

   - Add SO_INQ and SCM_INQ support to AF_UNIX

   - Add SIOCINQ support to AF_VSOCK

   - Add TCP_MAXSEG sockopt to MPTCP

   - Add IPv6 force_forwarding sysctl to enable forwarding per interface

   - Make TCP validation of whether packet fully fits in the receive
     window and the rcv_buf more strict. With increased use of HW
     aggregation a single "packet" can be multiple 100s of kB

   - Add MSG_MORE flag to optimize large TCP transmissions via sockmap,
     improves latency up to 33% for sockmap users

   - Convert TCP send queue handling from tasklet to BH workque

   - Improve BPF iteration over TCP sockets to see each socket exactly
     once

   - Remove obsolete and unused TCP RFC3517/RFC6675 loss recovery code

   - Support enabling kernel threads for NAPI processing on per-NAPI
     instance basis rather than a whole device. Fully stop the kernel
     NAPI thread when threaded NAPI gets disabled. Previously thread
     would stick around until ifdown due to tricky synchronization

   - Allow multicast routing to take effect on locally-generated packets

   - Add output interface argument for End.X in segment routing

   - MCTP: add support for gateway routing, improve bind() handling

   - Don't require rtnl_lock when fetching an IPv6 neighbor over Netlink

   - Add a new neighbor flag ("extern_valid"), which cedes refresh
     responsibilities to userspace. This is needed for EVPN multi-homing
     where a neighbor entry for a multi-homed host needs to be synced
     across all the VTEPs among which the host is multi-homed

   - Support NUD_PERMANENT for proxy neighbor entries

   - Add a new queuing discipline for IETF RFC9332 DualQ Coupled AQM

   - Add sequence numbers to netconsole messages. Unregister
     netconsole's console when all net targets are removed. Code
     refactoring. Add a number of selftests

   - Align IPSec inbound SA lookup to RFC 4301. Only SPI and protocol
     should be used for an inbound SA lookup

   - Support inspecting ref_tracker state via DebugFS

   - Don't force bonding advertisement frames tx to ~333 ms boundaries.
     Add broadcast_neighbor option to send ARP/ND on all bonded links

   - Allow providing upcall pid for the 'execute' command in openvswitch

   - Remove DCCP support from Netfilter's conntrack

   - Disallow multiple packet duplications in the queuing layer

   - Prevent use of deprecated iptables code on PREEMPT_RT

  Driver API:

   - Support RSS and hashing configuration over ethtool Netlink

   - Add dedicated ethtool callbacks for getting and setting hashing
     fields

   - Add support for power budget evaluation strategy in PSE /
     Power-over-Ethernet. Generate Netlink events for overcurrent etc

   - Support DPLL phase offset monitoring across all device inputs.
     Support providing clock reference and SYNC over separate DPLL
     inputs

   - Support traffic classes in devlink rate API for bandwidth
     management

   - Remove rtnl_lock dependency from UDP tunnel port configuration

  Device drivers:

   - Add a new Broadcom driver for 800G Ethernet (bnge)

   - Add a standalone driver for Microchip ZL3073x DPLL

   - Remove IBM's NETIUCV device driver

   - Ethernet high-speed NICs:
      - Broadcom (bnxt):
         - support zero-copy Tx of DMABUF memory
         - take page size into account for page pool recycling rings
      - Intel (100G, ice, idpf):
         - idpf: XDP and AF_XDP support preparations
         - idpf: add flow steering
         - add link_down_events statistic
         - clean up the TSPLL code
         - preparations for live VM migration
      - nVidia/Mellanox:
         - support zero-copy Rx/Tx interfaces (DMABUF and io_uring)
         - optimize context memory usage for matchers
         - expose serial numbers in devlink info
         - support PCIe congestion metrics
      - Meta (fbnic):
         - add 25G, 50G, and 100G link modes to phylink
         - support dumping FW logs
      - Marvell/Cavium:
         - support for CN20K generation of the Octeon chips
      - Amazon:
         - add HW clock (without timestamping, just hypervisor time access)

   - Ethernet virtual:
      - VirtIO net:
         - support segmentation of UDP-tunnel-encapsulated packets
      - Google (gve):
         - support packet timestamping and clock synchronization
      - Microsoft vNIC:
         - add handler for device-originated servicing events
         - allow dynamic MSI-X vector allocation
         - support Tx bandwidth clamping

   - Ethernet NICs consumer, and embedded:
      - AMD:
         - amd-xgbe: hardware timestamping and PTP clock support
      - Broadcom integrated MACs (bcmgenet, bcmasp):
         - use napi_complete_done() return value to support NAPI polling
         - add support for re-starting auto-negotiation
      - Broadcom switches (b53):
         - support BCM5325 switches
         - add bcm63xx EPHY power control
      - Synopsys (stmmac):
         - lots of code refactoring and cleanups
      - TI:
         - icssg-prueth: read firmware-names from device tree
         - icssg: PRP offload support
      - Microchip:
         - lan78xx: convert to PHYLINK for improved PHY and MAC management
         - ksz: add KSZ8463 switch support
      - Intel:
         - support similar queue priority scheme in multi-queue and
           time-sensitive networking (taprio)
         - support packet pre-emption in both
      - RealTek (r8169):
         - enable EEE at 5Gbps on RTL8126
      - Airoha:
         - add PPPoE offload support
         - MDIO bus controller for Airoha AN7583

   - Ethernet PHYs:
      - support for the IPQ5018 internal GE PHY
      - micrel KSZ9477 switch-integrated PHYs:
         - add MDI/MDI-X control support
         - add RX error counters
         - add cable test support
         - add Signal Quality Indicator (SQI) reporting
      - dp83tg720: improve reset handling and reduce link recovery time
      - support bcm54811 (and its MII-Lite interface type)
      - air_en8811h: support resume/suspend
      - support PHY counters for QCA807x and QCA808x
      - support WoL for QCA807x

   - CAN drivers:
      - rcar_canfd: support for Transceiver Delay Compensation
      - kvaser: report FW versions via devlink dev info

   - WiFi:
      - extended regulatory info support (6 GHz)
      - add statistics and beacon monitor for Multi-Link Operation (MLO)
      - support S1G aggregation, improve S1G support
      - add Radio Measurement action fields
      - support per-radio RTS threshold
      - some work around how FIPS affects wifi, which was wrong (RC4 is
        used by TKIP, not only WEP)
      - improvements for unsolicited probe response handling

   - WiFi drivers:
      - RealTek (rtw88):
         - IBSS mode for SDIO devices
      - RealTek (rtw89):
         - BT coexistence for MLO/WiFi7
         - concurrent station + P2P support
         - support for USB devices RTL8851BU/RTL8852BU
      - Intel (iwlwifi):
         - use embedded PNVM in (to be released) FW images to fix
           compatibility issues
         - many cleanups (unused FW APIs, PCIe code, WoWLAN)
         - some FIPS interoperability
      - MediaTek (mt76):
         - firmware recovery improvements
         - more MLO work
      - Qualcomm/Atheros (ath12k):
         - fix scan on multi-radio devices
         - more EHT/Wi-Fi 7 features
         - encapsulation/decapsulation offload
      - Broadcom (brcm80211):
         - support SDIO 43751 device

   - Bluetooth:
      - hci_event: add support for handling LE BIG Sync Lost event
      - ISO: add socket option to report packet seqnum via CMSG
      - ISO: support SCM_TIMESTAMPING for ISO TS

   - Bluetooth drivers:
      - intel_pcie: support Function Level Reset
      - nxpuart: add support for 4M baudrate
      - nxpuart: implement powerup sequence, reset, FW dump, and FW loading"

* tag 'net-next-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1742 commits)
  dpll: zl3073x: Fix build failure
  selftests: bpf: fix legacy netfilter options
  ipv6: annotate data-races around rt->fib6_nsiblings
  ipv6: fix possible infinite loop in fib6_info_uses_dev()
  ipv6: prevent infinite loop in rt6_nlmsg_size()
  ipv6: add a retry logic in net6_rt_notify()
  vrf: Drop existing dst reference in vrf_ip6_input_dst
  net/sched: taprio: align entry index attr validation with mqprio
  net: fsl_pq_mdio: use dev_err_probe
  selftests: rtnetlink.sh: remove esp4_offload after test
  vsock: remove unnecessary null check in vsock_getname()
  igb: xsk: solve negative overflow of nb_pkts in zerocopy mode
  stmmac: xsk: fix negative overflow of budget in zerocopy mode
  dt-bindings: ieee802154: Convert at86rf230.txt yaml format
  net: dsa: microchip: Disable PTP function of KSZ8463
  net: dsa: microchip: Setup fiber ports for KSZ8463
  net: dsa: microchip: Write switch MAC address differently for KSZ8463
  net: dsa: microchip: Use different registers for KSZ8463
  net: dsa: microchip: Add KSZ8463 switch support to KSZ DSA driver
  dt-bindings: net: dsa: microchip: Add KSZ8463 switch support
  ...
2025-07-30 08:58:55 -07:00
Linus Torvalds
115e74a29b soc: dt changes for 6.17
There are a few new variants of existing chips:
 
  - mt6572 is an older mobile phone chip from mediatek that was
    extremely popular a decade ago but never got upstreamed until now.
 
  - exynos2200 is a recent high-end mobile phone chip used in a
    few Samsung phones like the Galaxy S22
 
  - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
    (R8A779H0) and used in automotive applications
 
  - Tegra264 is a new chip from NVIDIA, but support is fairly minimal
    for now, and not much information is public about it.
 
 There are five more chips in a separate branch, as those are new
 chip families that I merged along with the necessary infrastructure.
 
 New board support is not that exciting, with a total of 33 newly
 added machines here:
 
  - Evaluation platforms for the chips above, plus TI am62d2 and
    Sophgo sg2042.
 
  - Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
    plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
    imx95.
 
  - Two newly added ASPEED BMC based motherboards, and one that got
    removed
 
  - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
    msm8976 SoCs
 
  - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1
 
  - A set-top box based on Amlogic meson-gxm.
 
 Updates for existing machines are spread over all the above families.
 One notable change here is support for the RP1 I/O chip used in
 Raspberry Pi 5.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmiEp54ACgkQmmx57+YA
 GNmE+BAAvGeMkjz05rl3kSeNWCxm3WlQtrVAS3CGxXlmuB3GH4svAYO7ZFqnA1Lq
 oLKfvH9TXQgNTRlRV2bKSVCcgsvMdRukqvaNIp+9jOHKkdapgGUHr7XALZCITODp
 Ey2YPOKVi3aY2tEqUiuV09oLBFYBB5ldSuPG7SnFHNS0+IWlqqFDdQhrFXfBNf02
 Upzca6J96A6TRG7Rq+VD4127QLapNDLm1S2R+3PbEapz/v/XNxQEtigWl+E88N5L
 ju1pXu9f93w1EeQla6rN6S8RKI6Ed0kVt0I7mtwJ5KrPs9jzQwZZc5t7z+0HVyaK
 o5ldagj7nEVlth2Fc2+E67DnxB6Xe8BkTcNspnS6oWscqvyYo2WCjYOBQcTocU5m
 ej4urbS80z2bGbew9zp/ZCBJjmqOdXW/B8z9mokg1u/aktHmAiOWXnFZtws5+rBM
 It/GjP4b8MzS3JYq1oNSCUV2KpYF9hzfSg1Td7DEvyhhvSgeJyXNsc4OozZzTCv6
 bO3h1PBW6JBWVupRIAz7IrqseAsCabCMfIHduvtYWJieRzv24z1Dfv8p73v3iknN
 qpOOyGOvWdPH0u04LAbovYdJfGrR/IN04wOYGcH0uB/bufW5qCKBb9AEAvxvTaJR
 Jg1Q7ac/+TVJSFwBQJresw4WdFPHVKVwd2s382Q5hKtx3B5Cn4Y=
 =0VBL
 -----END PGP SIGNATURE-----

Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull SoC devicetree updates from Arnd Bergmann:
 "There are a few new variants of existing chips:

   - mt6572 is an older mobile phone chip from mediatek that was
     extremely popular a decade ago but never got upstreamed until now

   - exynos2200 is a recent high-end mobile phone chip used in a few
     Samsung phones like the Galaxy S22

   - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
     (R8A779H0) and used in automotive applications

   - Tegra264 is a new chip from NVIDIA, but support is fairly minimal
     for now, and not much information is public about it

  There are five more chips in a separate branch, as those are new chip
  families that I merged along with the necessary infrastructure.

  New board support is not that exciting, with a total of 33 newly added
  machines here:

   - Evaluation platforms for the chips above, plus TI am62d2 and Sophgo
     sg2042

   - Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
     plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
     imx95

   - Two newly added ASPEED BMC based motherboards, and one that got
     removed

   - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
     msm8976 SoCs

   - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1

   - A set-top box based on Amlogic meson-gxm

  Updates for existing machines are spread over all the above families.
  One notable change here is support for the RP1 I/O chip used in
  Raspberry Pi 5"

* tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits)
  riscv: dts: sophgo: fix mdio node name for CV180X
  riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree
  dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings
  riscv: dts: sophgo: add ethernet GMAC device for sg2042
  riscv: dts: sophgo: Enable ethernet device for Huashan Pi
  riscv: dts: sophgo: Add mdio multiplexer device for cv18xx
  riscv: dts: sophgo: Add ethernet device for cv18xx
  riscv: dts: sophgo: sg2044: add pmu configuration
  riscv: dts: sophgo: sg2044: add ziccrse extension
  riscv: dts: sophgo: add zfh for sg2042
  riscv: dts: sophgo: add ziccrse for sg2042
  riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree
  riscv: dts: sophgo: sg2044: add PCIe device support for SG2044
  riscv: dts: sophgo: sg2044: add MSI device support for SG2044
  riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC
  riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC
  dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000
  riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property
  ...
2025-07-29 11:04:52 -07:00
Arnd Bergmann
dc56e105c5 Microchip AT91 device tree updates for v6.17
This update includes:
 - controllers enabled for SAMA7D65 SoC (crypto controllers, PWM, CAN)
 - controllers enabled for SAM9X7 SoC (LCD, LVDS)
 - cache configuration updates for SAMA5D2, SAMA5D3, SAMA5D4, SAMA7G5,
   SAMA7D65
 - cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYKAB0WIQTsZ8eserC1pmhwqDmejrg/N2X7/QUCaH4NLQAKCRCejrg/N2X7
 /a/gAQDmyVXMsD1AVAxu5mj2U/YZAd8fxS1Pcdm4ePpdgHR5IgD+JxQdobwAv7ma
 sHo54UclWZKsvRHtgf5e+qFgVI8lhAo=
 =xVEW
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh//GAACgkQmmx57+YA
 GNlf/BAArq95y8wEDh2WCDLw06CZ4RYgNmOSr6psMiFMBu8f314Oyb9V2VoRWt8Y
 5R7IbaBTGzTnXom9KjQdlV5m1zM49dP6tcu7ihE8gezxwjm7ejVhKk3JencOUvx3
 M3YUWK5pxtIp0RfPOi8LI+B510VT+hVkHd7Y+SGwgqRUleIFmCRw46KOobCEZb9J
 lxLFxHNp+t8W1i3XkWlXwBKkSQoCEtLJVRpxAAG1wghpb5R9G+XECFiqdZggkhe5
 FdI+J0pyB7/ifOGPPl/LI5er7IIbRJs9NVydOHJmhU2E48dhttdOsTSZOMMquhFD
 vPYLZR1m9aTzEFO8Sa8ZwTiK/cDQcg7NlEpKCeIqCggxXp4sW/YMLMRrFkZe9psO
 ldRuTvbZBLYq34MDt5uujBGluxT1GcnKKsx0Fpc+Ra+zVvSXVOraVR6ohrAFrYBu
 EAAFrpQF9ZtRBG7SBGVv0UpbjdV4ATw55yvOmZIZjgtty4ApJkH5oma0Rj4DAoon
 0g4wzxOTdn3xUMRkva30Cew8+/ClgftbdvB/xls09ZHuBSEe18xgFAoYjwAw48tc
 bh/RlfAavqUy88lB4h5MtBgjVgLb5GFL7TXI/VpsKxRWObxGkSrDYuZJH88WT4o3
 9BZHb2ztQuZj/cs3SJvjTffOBvKGcrcV5GOXmKZxA44dT0+2usc=
 =NJza
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

Microchip AT91 device tree updates for v6.17

This update includes:
- controllers enabled for SAMA7D65 SoC (crypto controllers, PWM, CAN)
- controllers enabled for SAM9X7 SoC (LCD, LVDS)
- cache configuration updates for SAMA5D2, SAMA5D3, SAMA5D4, SAMA7G5,
  SAMA7D65
- cleanups

* tag 'at91-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: (22 commits)
  ARM: dts: microchip: sama7g5: Add cache configuration for cpu node
  ARM: dts: microchip: sama7d65: Add cache configuration for cpu node
  ARM: dts: microchip: sama5d4: Update the cache configuration for CPU
  ARM: dts: microchip: sama5d3: Update the cache configuration for CPU
  ARM: dts: microchip: sama5d2: Update the cache configuration for CPU
  ARM: dts: microchip: sam9x7: Add LVDS controller
  ARM: dts: microchip: sama5d2_icp: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
  ARM: dts: microchip: sama5d27_wlsom1: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
  ARM: dts: microchip: sama5d27_som1: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
  ARM: dts: microchip: sam9x60ek: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
  ARM: dts: at91-sama5d27_wlsom1: Improve the Wifi compatible
  ARM: dts: microchip: gardena-smart-gateway: Fix power LED
  ARM: dts: microchip: sam9x7: Add clock name property
  ARM: dts: microchip: sama7d65: Add clock name property
  ARM: dts: microchip: sama7g5: Adjust clock xtal phandle
  ARM: dts: microchip: sam9x7: Add HLCD controller
  ARM: dts: microchip: sama7d65: Enable CAN bus
  ARM: dts: microchip: sama7d65: Clean up extra space
  ARM: dts: microchip: sama7d65: Add CAN bus support
  ARM: dts: microchip: sama7d65: Add PWM support
  ...

Link: https://lore.kernel.org/r/20250721100904.568575-2-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 23:02:24 +02:00
Krzysztof Kozlowski
dda1d84a0c
ARM: dts: st: spear: Use generic "ethernet" as node name
Common name for Ethernet controllers is "ethernet", not "eth", also
recommended by Devicetree specification in "Generic Names
Recommendation".  Verified lack of impact using dtx_diff.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20250717142245.92492-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 23:00:06 +02:00
Arnd Bergmann
a4bb91d128 mvebu dt for 6.17 (part 1)
Use recent scl/sda gpio bindings on kirkwood boards (Keymile ones)
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCaHdpIQAKCRALBhiOFHI7
 1QA8AJ46MGcVb6Ub4NhrGjADg11PMLRwrACfeqEQdUH+IGvn8OJjE6LJ0RQw/7U=
 =U/5H
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/8oAACgkQmmx57+YA
 GNlxRg/+MMdl3u1ocYAcf/e6Nb9SqU/4MplNidQmbPehjn4xiipyW2ueifEMrGGn
 pKTkMQ7sW75hfi6jwVba21mpie08bLfb24KNOFa8fO/j4UpOXfHlaco4DQX04Hx9
 wWkW+qorlaPjxes7UsmPRoWCyq3852AKDMq/C1ThP/+noMQCvSpOOHunXTTg1mFR
 bzid2eg65/5jDwAZQCVgTRuSM64ik+V7uQRumXIbjfqQtJR6AzWuKcErrrgdYfAP
 EwaDdzKC3yKAF/pqwC7j/S3UdW6gmf4BZx0OQiW/1i0b9JrWcgi2ktr4ksnHOU8/
 MQs1nscEMdgHgkdbX1fOxbOp+Sw9OEKrMOVuVjzjMWhZgOe5gViA10F2k9LjMs1Z
 NdCI+wuek/Fn/CNk/KecYMbvapDxwCn9+r9Bi7rdT6PndVBHdFt6hxIreTyAJdJ9
 3FrzC1bDmHOFMhEwjtHXi4xfOJf6Aiv3gIT1pi5DrAZk21hJ1G7B9Mu0GYJsJ714
 BVRr1y1X03xCiRwO3ezRck0+3sBZjbOX03Pt2xpqVhzr/Y6GQbPoJ3B2pUjo+0fM
 mj9N6ql5z/6/HxYEIEWOh78+Tz9gusqWKB48PFmXtcsdHSDj6i5f2heIJK8hP58h
 WHS0xIuPIfVjX4bNcOIEQrzfLIC3jlBH8nxPresptZAKM0IFtnA=
 =pE4D
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-dt-6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt

mvebu dt for 6.17 (part 1)

Use recent scl/sda gpio bindings on kirkwood boards (Keymile ones)

* tag 'mvebu-dt-6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: dts: marvell: kirkwood: use recent scl/sda gpio bindings

Link: https://lore.kernel.org/r/87ms94xzr8.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:20:16 +02:00
Arnd Bergmann
1037b300df Allwinner device tree changes for 6.17
This branch includes a change shared with the clk tree for adding
 the missing PPU0 reset on the A523.
 
 The PM domain DT binding immutable branch is also included, which
 brings in v6.16-rc2, as well as PM domain bindings for other platforms.
 
 Other changes include:
 - RGB666 LCD pin definitions for the V3s PE pins and V3 PD pins
 - node order fixes for the A523 dtsi
 - UART1 pin definitions for A523
 - Allwinner board DT binding cleanup
 - EMAC support on A100/A133
   - Enabled on the Liontron H-A133L board
 - SID efuse, power controllers and GPU added for A523
 - A523 GPU enabled on all existing boards
 
 New boards:
 - Xunlong OrangePi 4A with the Allwinner T527 SoC.
 -----BEGIN PGP SIGNATURE-----
 
 iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmh2jp0OHHdlbnNAY3Np
 ZS5vcmcACgkQOJpUIZwPJDBDIQ/8C/vnF+mjoNj/Gci0AUMbtVVvI4G28x8bsGVP
 jy3Z2dBuEQvU4eGvOKGyM9oJ5WfQBlpRS9nlRf/NHu/tASc7gXGHb7OJOlAocIUr
 ny3MpO2un0nx6HbtR6RtciSSLoasB6HtAKBscxmapJ3TiZBbjDtI7Z5l+Vxx75z8
 Fo6xxQ9n+Iyxo3X6wZi9vp/d15Xz4LVy2iarN/JY+jywGtKZOcpsqEKqIV7m6Lcf
 6pL2/ZaX38JzOdCY4lNsHUA827Ep/0waXirmUg0rvi8BpI4s1Cysh6XIbyrlQjaK
 xbqRvWWg0ZEaC3j2rcUTLaXREMsl5OFkX/5ywCysh0K76kKwxDvnPnDYUq3yOlwL
 qBO7PUEdCywqfSaaNFR+d8JqnALFT/h5P1KJhx7L2PpNpl3vH/TFy2EIVZgy+A2W
 p2+hkmqB211uJpzWdQ98ED0aIRErDM1vq0pi3KLqFGATmgp/ZQ53UbtrWDwI1NEN
 TUJK80ZztmyqGWlMTsSIHajgt7OAPI+Gc/gIv8fFLbciHoYV68HBAO3t6ljDKbOe
 grwLFhPLe3OELGkKsoOsrSsDJ39ijYpXMw4ssuDQY+TDdEtCrMC1F/NPdS05NQx1
 igjLrUHOD6dMo4azw4uOPNosXir9+Rjywuqeuj/CBJfJkCqWDCh9OJFhWkaFMi01
 ATqMzjY=
 =CwjI
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/7HUACgkQmmx57+YA
 GNkiWA//XXWjj5W1dEf8xWJFwL5YwJVkX0s+5XPWnAJ8YtLuuttt64bO/dCr74SL
 P6HeEsLLgW7+/LCCd0owkCz+GW+xGTQ5h/NfWgI6tAH73LV4DZ3XGztts06gUuZ1
 DXzWJpRiV3CBUgN52eXdxvjsM4wgDwShck5DH21SbhQf3NpCB7YAtXi3eelqgHrh
 zrsR4UzfF2b/efKMeJP6vORLT4KkumS+IJsMS6cMErIXFeu/kOY7q5f8jvF6FftL
 117kyEl55OiFV5E0S15zdnSGxiNPYWnwi00BUd2HDfxAer0/ow0lbW0bUwlAUd4V
 a7mTxi74Wv8QBgIw/tn+o5Fi24wz86c+Lks85rRC6YlkuQrExaNK2bC7Vzxc7imS
 PakQQnQMnIWA7kf/log2PdIX89gNYe7Lh5x7SKjvd0UmIvsgbwMX51e18P52it0a
 /81ntWhwhYoE7A+qVKZYleb2dG12/893hdW1lxKGnjiBsEkL15U9fsIKFAzgjKCb
 UHrr/dcPEcCedytSnTkOqiws1bscv9zHbc7qN0VEPtSbRwsVUHyDRcw3XFcWRSgK
 JlfiCuYvr+aOKegKihXauxLGDXwK1Q1GK61hMcwJGRocswENT2LA/vcIYDR0e8hR
 CYkc0IilHKyf/14HF+qBj5roPZkufJYS9T0xLs1tEsKRxMbeomI=
 =v3GV
 -----END PGP SIGNATURE-----

Merge tag 'sunxi-dt-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt

Allwinner device tree changes for 6.17

This branch includes a change shared with the clk tree for adding
the missing PPU0 reset on the A523.

The PM domain DT binding immutable branch is also included, which
brings in v6.16-rc2, as well as PM domain bindings for other platforms.

Other changes include:
- RGB666 LCD pin definitions for the V3s PE pins and V3 PD pins
- node order fixes for the A523 dtsi
- UART1 pin definitions for A523
- Allwinner board DT binding cleanup
- EMAC support on A100/A133
  - Enabled on the Liontron H-A133L board
- SID efuse, power controllers and GPU added for A523
- A523 GPU enabled on all existing boards

New boards:
- Xunlong OrangePi 4A with the Allwinner T527 SoC.

* tag 'sunxi-dt-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: (21 commits)
  arm64: dts: allwinner: a523: enable Mali GPU for all boards
  arm64: dts: allwinner: a523: add Mali GPU node
  arm64: dts: allwinner: a523: Add power controller device nodes
  dt-bindings: power: Add A523 PPU and PCK600 power controllers
  arm64: dts: allwinner: A523: Add SID controller node
  arm64: dts: allwinner: a133-liontron-h-a133l: Add Ethernet support
  arm64: dts: allwinner: a100: Add EMAC support
  arm64: dts: allwinner: a100: Add pin definitions for RGMII/RMII
  dt-bindings: arm: sunxi: Combine board variants into enums
  dt-bindings: power: qcom,rpmpd: document the Milos RPMh Power Domains
  arm64: dts: allwinner: t527: Add OrangePi 4A board
  arm64: dts: allwinner: a523: Add UART1 pins
  arm64: dts: allwinner: a523: Move rgmii0 pins to correct location
  arm64: dts: allwinner: a523: Move mmc nodes to correct position
  dt-bindings: arm: sunxi: Add Xunlong OrangePi 4A board
  ARM: dts: sun8i: v3: Add RGB666 LCD PD pins definition
  ARM: dts: sun8i: v3s: Add RGB666 LCD PE pins definition
  dt-bindings: reset: sun55i-a523-r-ccu: Add missing PPU0 reset
  dt-bindings: firmware: thead,th1520: Add resets for GPU clkgen
  dt-bindings: rockchip: pmu: Add compatible for RK3528
  ...

Link: https://lore.kernel.org/r/aHaQFe3Lr8Qzyb1M@wens.tw
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 21:54:29 +02:00
Arnd Bergmann
7824d9e7f9 Qualcomm Arm32 DeviceTree updates for v6.17
Add aliases for MMC controllers on MSM8974, enable USB charging on the
 Sony Xperia Rhine platform and add new DeviceTree for the Sony Xperia Z
 Ultra device.
 
 Tidy up interrupts specifiers on MSM8960, by using macro constants.
 -----BEGIN PGP SIGNATURE-----
 
 iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmh1umoVHGFuZGVyc3Nv
 bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FFzAP/1Wk+B7CYhg17QefF23i5nMJrhdw
 PC8KOnMKaHOfEkbuD3hTdvDL2u0HZpQG8x6GSslC4Cq1FY3e3fH3hcnJjdGP1jBI
 /W3FNs55zUiKvQBqtmWkb+iYn6o/LGt5wE1g5zLBcAUS0S7WaBptfQSwjXm7rCdA
 KcuLqdjSm/iUqJUKCjPXu3iXq5yXK0mix2hSWLiZRvlklvpT2GxVIg9YyhUFuiBd
 JZKjNXu9rZMixjkpRmiFIYJWQeuZ/RgOs5pabbgEGExPlwog9GDlMFcABBDWUIuG
 bwMd6dRX7PpA0VeAnqAGMQEF4TEgTAeFiaQa3DoOz+TM01hyauLc2zf4uprnnKvw
 OhCXh2hXcAG0FkWu6oGGN0QRVAdPqWt0Rkl08E/cl6u+wMAQoyljc+6JoXvlz00l
 iKIHdAsTzHQrIia/qcJzUzS8WSMptWxHh80zMCJlwqAh9Zwb1SlwgBweEgUAu4HA
 2ganAjHMJ4slSR1c3lXrwm9T/nceTtcTThC4zfdOtnuKN++EX9aq+qEGSIdNydFH
 5uvrtutvFfu624AWOKR7qRrTx///wuZ+QO8aoqQIk2yUWC/CG//lHT2SeL1HPsR+
 WaGrIr6lUlwWG9Mx+JnBFM2RzNO5uy5LmL9lgmEBV6LE67PWnKsWaoGfEAUYmnyO
 1i+yH7/JTtUXP8E6
 =sBCM
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/6pMACgkQmmx57+YA
 GNlgYg//cxY2AUCmcmoleHRTRbj7wvqwoqbourbl6NgaddqTDCGltH9IGnxxrLDM
 jS9+gjR8iMW6xrONiMyBlNekwrFI16WKiC1iEWqw9InGbjM5Ad1VJXHEdv6aOmbh
 DcQ1xzDXAwmXwPbhxbVJHL2j8BGE6zdXhQ3aG6OHdIN6qBWvol/iHBxEgAfc6zva
 vq/D5jKZ377hZa35Se92dUqVV1jW5a873ppMau3VNuykrRsZ48ltRvV4xWKOVgMG
 LZyiQ5KUqfbKw0ZEeXbBvKRwuFVacAUnqNnSPkTqGBoQRHzVTVg/UJx/hOeCKuSk
 pzLWYLc2bJ12txQQQjDr5/ww7z8FnM16CeGp2U7R2xtiDqk44+qU+0FFIEIBrGGe
 Rl3gJje9pWzXe4z7HS5Qa3j0IaGePzE5pgtkbn/scka0Z2h50noKbq0uVirXLcYz
 QPY+QLQnx1mb9nFTDu6g2w6+VxCb3myn0zOOeDQ9x8GyoG2olzwxyn3z5CogUWLC
 p8QfU9x8e4yTHsvfpiSb1eHWtxN8pPCcC/I+NY6n4GF98JT2/lI6/fnSOHuVxw2q
 n5OV0x6lJSp5rnY18we8IvUg5JW9RXWAomkyrR3OuN4ady9Awv4mXGwCGnXOruJ2
 rupqtHayQ/Sc8zhDhcN2FpLvhJkJ9vL3EUUnUTKZ8oWnWNwJoHk=
 =0u7U
 -----END PGP SIGNATURE-----

Merge tag 'qcom-arm32-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

Qualcomm Arm32 DeviceTree updates for v6.17

Add aliases for MMC controllers on MSM8974, enable USB charging on the
Sony Xperia Rhine platform and add new DeviceTree for the Sony Xperia Z
Ultra device.

Tidy up interrupts specifiers on MSM8960, by using macro constants.

* tag 'qcom-arm32-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: msm8974-sony-xperia-rhine: Add alias for mmc0 & mmc1
  ARM: dts: qcom: msm8974-hammerhead: Add alias for mmc0
  ARM: dts: qcom: msm8974-oneplus-bacon: Add alias for mmc0
  ARM: dts: qcom: Add initial support for Sony Xperia Z Ultra (togari)
  dt-bindings: arm: qcom: Add Sony Xperia Z Ultra (togari)
  ARM: dts: qcom: msm8974-sony-xperia-rhine: Move camera buttons to amami & honami
  ARM: dts: qcom: msm8974-sony-xperia-rhine: Enable USB charging
  ARM: dts: qcom: msm8960: use macros for interrupts
  ARM: dts: qcom: Align wifi node name with bindings

Link: https://lore.kernel.org/r/20250715021838.14751-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 21:46:27 +02:00
Arnd Bergmann
1d9026c38e i.MX ARM device tree changes for 6.17:
- New device trees for Engicam MicroGEA-MX6UL and i.MX28 Amarula board
 - A couple of changes from Bence Csókás to replace license text comment
   with SPDX identifier for Karo and Gateworks boards
 - A couple of imx7s-warp updates from Fabio Estevam to improve Bluetooth
   and Wifi description
 - A set of dt-schema fixes for VF610 based boards from Frank Li
 - A couple of imx6ul-kontron-sl-common changes to add SPI NOR partitions
   and correct QSPI NAND node name
 - A few other random improvements
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCgAdFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmhzQBYACgkQUFdYWoew
 fM5gjQf/Wrr8xeOGOAaXLLuLFXXLm2uta7pJJSib9IN1JnpIUOW9ryNb/sLo2TnB
 U3keLd5+5bD/2pF1FltJhcGsEsiaQd4vcD1tDDXWzUBeeCrL56TgcBbu/zhu+f+B
 N01L0oSjxPVWSLc1kaQUtbunat65tmW0k5VngHRcEOeO/52zNOpWNN8gx4gjhLIS
 zg9yKnLX38jpX4EuazqfYpTxDsKR41iouDmecKQHybZFgbo8/WA/7oC16XEHUfSf
 EZcz/fqPl5eYrAmKV/KVOdDjRACVVIVI/qScJaotcMnLvIYiPJxupqe8awRC7s1n
 PSVAX/bVVFpCz5bD0Y5tnwIK1d68EQ==
 =Wllo
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIyBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/6aAACgkQmmx57+YA
 GNkvbA/2PZ3yiKAyAJpUXa1pPrUjnVRaQta57A6//R85C1iFSXudqCjySJ1aI+8e
 2PCKJE+84HjeJ6MZKxeupyqr3F2P5WvtuDF1KwueJDTfqp+PU8HLIGsYpdEsTj7w
 cWrlqb+K+X01d/JK9HfDQQVWABvjh2T6gcVZBnR8O8ACUq6xy/VEnqWqoCBX9Xqs
 g0SlAN8CzQ6UZHZiZ1dzFyZU/ycXdRgXU3S8NgMzr0hA3f/s2e07Ah09lQXXfhzp
 A7bso2Ga8tQKkHxzuqsRSs3xjUeR43TwJEeEGYGprJAfyp48k0Vf0b2MNJzcr/MM
 XZ4vqfLZ4/33I0XHywk0L3m1v4k2iMoAdFFVJ8KWKO71XIT06tgutgtjeaUQYX9Y
 7k5+umbYppxvGtabvXohui/WF0W6mQOdqdJPqUVzLg8zN0xlNE3EraPFB+sVXgai
 L4yKgiPr3B7lAhi/q05OreqLIgS2tiy479sXjRPGVGnduhTwnEcW4e/kY43Hvo5P
 +Y8Ejl6fwvXeOTzt/unveQxEZ0rJA7PzIB9c6E5TfslVzPRFys3pXuMY9xxxfTHn
 1rpX//J0Ka10V1JaGaFasciovQXkxJ6CFI4asRpGKuM13ts0kx905YCqoaXFwULd
 VHrdzKG33Ch6dCCI0bFtJz+t1sLiFahfaRRMjfs+o0IK9d53pw==
 =cJT8
 -----END PGP SIGNATURE-----

Merge tag 'imx-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt

i.MX ARM device tree changes for 6.17:

- New device trees for Engicam MicroGEA-MX6UL and i.MX28 Amarula board
- A couple of changes from Bence Csókás to replace license text comment
  with SPDX identifier for Karo and Gateworks boards
- A couple of imx7s-warp updates from Fabio Estevam to improve Bluetooth
  and Wifi description
- A set of dt-schema fixes for VF610 based boards from Frank Li
- A couple of imx6ul-kontron-sl-common changes to add SPI NOR partitions
  and correct QSPI NAND node name
- A few other random improvements

* tag 'imx-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (21 commits)
  ARM: dts: imx6-gw: Replace license text comment with SPDX identifier
  ARM: dts: imx6ul-kontron-sl-common: Fix QSPI NAND node name
  ARM: dts: imx6ul-kontron-sl-common: Add SPI NOR partitions
  ARM: dts: imx6ul-kontron-bl-common: Fix RTS polarity for RS485 interface
  ARM: dts: imx6-karo: Replace license text comment with SPDX identifier
  ARM: dts: imx6ul: support Engicam MicroGEA GTW board
  ARM: dts: imx6ul: support Engicam MicroGEA RMM board
  ARM: dts: imx6ul: support Engicam MicroGEA BMM board
  ARM: dts: imx6ul: support Engicam MicroGEA-MX6UL SoM
  ARM: dts: mxs: support i.MX28 Amarula rmm board
  ARM: dts: imx28: add pwm7 muxing options
  ARM: dts: vf: vf610-zii-cfu1: rename node name *-gpio to *-gpios
  ARM: dts: vf: vf-colibri-eval-v3: add power-supply for edt,et057090dhu
  ARM: dts: vf: rename io-expander@20 to pinctrl@20
  ARM: dts: vf: remove redundant layer under iomux
  ARM: dts: vf: remove redundant pinctrl-names
  ARM: dts: vf: remove reg property for arm pmu
  ARM: dts: vfxxx: Correctly use two tuples for timer address
  ARM: dts: add ngpios for vf610 compatible gpio controllers
  ARM: dts: imx7s-warp: Improve the Wifi description
  ...

Link: https://lore.kernel.org/r/20250713055441.221235-3-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 21:42:24 +02:00
Arnd Bergmann
d8ce23423b ARM: tegra: Device tree changes for v6.17-rc1
Add support for two Tegra30 ASUS devices and enable the embedded
 controller on Pegatron Chagall.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmhxiiYACgkQ3SOs138+
 s6HDvg//bI+7YKMcboez2DbFYeFbnyBEaaqbw8Y5HlawZ0kEhVqK/QfAw3EyWQ5z
 r4UThGnQTofuJe1xsT5TwsZLS6txsigmMAxwV2iNqmKTXU7JkfWiU92Nr2DLOWfJ
 OiIzLD93mZRyLoFOEcBZPy9pAxgEjWMY7BBItxdM8KskGanGf4D3FUOwV9NM5cSg
 m7siDRumSJur+8UM0/71IifIP+NxQFfb5+56Y35ehuAGZCFHEblnQdwrq7VzHfMf
 2LzGS+Q5HC2MvAVoeaEmEu9tc3r2RDq75VbffGSaaNJllC7lgmYyRVTI96rYnZzG
 oqzK77pF0sR5DnPgJjqhqUtZB0oNbfyezfXCHG3MLwV/YdmHZbycmSuR8EutvUYy
 kJUkIG3xfPmPNSpkb6YhTwpJjBh23CV/LTq1GHm9jx3RN1urnA/7vmVe/8l5wsoV
 RaQPM4Mdn/jjmmVjsPLR0IBll003kN3WCTv8+WlBov+w3EXlyZ7R3gUHu7AKKXva
 97/y8F3Ppv7QBnxB6Ymlr0lhpYlWUW0oBrWby/4zcOvH9g1JFbYr1w7ShB8z/Xp1
 BN4yeZeygahKQcWFX1zRSSukC8rsvm0ttOrzXwVemMXKZKaCycLAUUKu9sE1yHqF
 M1INFD6qua4ctrjjfGQtKQTewq+Ubjav/lx6Fia4x4LW7nN10lU=
 =ejuk
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/6IQACgkQmmx57+YA
 GNkMhhAAr7T6TNw/WEta/yApwKor3iYZz3/UgHIAEx/pD2x20jzSPuJSVE6lvtgZ
 FBLLj1jHrVVACA8v2uG+fW3KItu5I1S0eZ5TZvQLXIRvK56uFUEMvyBMAqV9URat
 facQ+5N+pYYCC/ZaMEPHQTk4tSLY1VYWKBN8UU0S1feWETVvxRWU5Kfk1jmzAUhX
 JYMmSrWm8Pah6njK0W6TzV9odeA7uBeDbxkb5f+0fBr4Iq4NA6hCyv8E/zZgex/7
 rSWy6rZSDevZyiVoFwhnegOwIMeqFUgsMUVwQCqrYLtVIXAYgsTR1RSSEll4PZE1
 DL9u8MRnNoYTKpso71E43ibtxNH3uUP2A2BBHIiTE1zqay4ye3V85+gL43P/jwIX
 e+Izc0lmFlkhrZiPdn1waSgn+sJmHnHaTvEhXnlnNZlmsdCfUaC+Rb7YsrhyKiTw
 6/7+Ul5ETwxg3sYFQ8QhpHVS0sFn4/utIFBagbae5GA3uv5QiryEQ9SaUBg8cgMX
 5NM0CiNpRX/xX+dpI3gAFyUKBx19XzjwMHXHCl2GkjAXAhT6Ly5MTUTkrjgkzkDi
 Vt0N+GqLs0hH0I6vPIZ5FJXPqtS+Uyl26aERHATWvvVV9b9bRe35yW/Tku+eDCaE
 IBXK8eorpUfD+YMpAg6xw6UbMWOqOkrOA56Tqo4gPA3dK1JS5K4=
 =Ssyg
 -----END PGP SIGNATURE-----

Merge tag 'tegra-for-6.17-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/dt

ARM: tegra: Device tree changes for v6.17-rc1

Add support for two Tegra30 ASUS devices and enable the embedded
controller on Pegatron Chagall.

* tag 'tegra-for-6.17-arm-dt' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: chagall: Add embedded controller node
  ARM: tegra: Add device-tree for Asus Portable AiO P1801-T
  ARM: tegra: Add device-tree for ASUS VivoTab RT TF600T

Link: https://lore.kernel.org/r/20250711220943.2389322-6-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 21:37:40 +02:00
Arnd Bergmann
a6942926a3 MediaTek mach ARM32 updates
This adds support for the MediaTek MT6572 SoC, found in various
 old smartphones and tablets from various manufacturers.
 
 In particular, this adds a board_dt_compat entry for this SoC
 and its SMP bring up sequence to enable secondary cores.
 -----BEGIN PGP SIGNATURE-----
 
 iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCaHDMLCgcYW5nZWxvZ2lv
 YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4Tx0A/0ul
 iMSrLva3h+HjH0yN+O9CTPJHe01KFbdkG7zW174iAQDR0SdGpH352LcTM2Lmo17K
 4XS5JLI+mkY2XrUS3c2XDA==
 =bxBl
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+V3EACgkQmmx57+YA
 GNlnSA//YWBeTPgdk9Y+yGn0LLtYz9ug8sOnCIwUt6hK8CJYAedlSeGqmpAvdUDU
 gMEXYiI/KKDKh11Mm+SO9p684Ykjh0PST18FUWxrpbvbB3rI0zWJnAKSq1amRgD7
 lVwC6LO/M1XbPBQzwKhcBH2cvTbYAYfcGlLBESu5zFAXFslF0Pue9LMfL3UlgT3C
 wzX4Z4UeQO3Y77a8kYj/PKJawv78Z63TwTBX2W6fHyHAVCGSsMlJJUEGW4xSYLWM
 xxeZAdy3qoRCxS+iZZ6proaU0WJejrMABgvzQ3NECSFg8xZzdBmO40mF8K2ZA1PW
 NS+DLkAaBdS/3wnyogqQDIZXLweipdrz9eQWNmUKIOPBE9ga7YbefJr8i/rXOKzA
 pFxgfBceAgVO+JShFGOKM7uATd3O48mb/VIqsHkZNpGogh/V2TLEouJ6ts9QeEpf
 QXhIKJvaLo6ZDFz2Yl9R+RXAzyiUTIjqGHXqeYk8FI+jfioUCEVDV78Smqo/kQBW
 yaz+QrfARe3KOlgV4XqJOpZPKyxK8Iytf0FkJK0SGFsu7C1dQ8XbS4ajEdRHoyC4
 1KnsL2vG3G0LcJbHL1m8VaxYxmep9mgKGygMwgeaJ+aA9yWIO2cmjkab4SrNpG3m
 KCL5eMectDjtwW2es5gMnqLBeOMk4HRTqybAQksLPcebVdzZFJc=
 =Dq3g
 -----END PGP SIGNATURE-----

Merge tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt

MediaTek mach ARM32 updates

This adds support for the MediaTek MT6572 SoC, found in various
old smartphones and tablets from various manufacturers.

In particular, this adds a board_dt_compat entry for this SoC
and its SMP bring up sequence to enable secondary cores.

* tag 'mtk-dts32-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  ARM: dts: mediatek: add basic support for Lenovo A369i board
  ARM: dts: mediatek: add basic support for JTY D101 board
  ARM: dts: mediatek: add basic support for MT6572 SoC
  dt-bindings: arm: mediatek: add boards based on the MT6572 SoC
  dt-bindings: vendor-prefixes: add JTY
  dt-bindings: watchdog: mediatek,mtk-wdt: add MT6572
  dt-bindings: interrupt-controller: mediatek,mt6577-sysirq: add MT6572

Link: https://lore.kernel.org/r/20250711083656.33538-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 17:06:24 +02:00
Arnd Bergmann
5a793f891a arm: dts: OMAP updates for v6.17
- new board support: Seeed BeagleBone Green Eco
 - misc. fixups / cleanups
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEe4dGDhaSf6n1v/EMWTcYmtP7xmUFAmhv4GEACgkQWTcYmtP7
 xmXEFA//RflPc1mafc3vs0Guvuhk3/NuCVQoei71156oz2FbZRsXpR1ICMMil5+h
 pZrJbzjTLzVbBvPXhkMQ9e970Zgz0LBZFubgE+6LE8jZ97ob2WmrSQFqyPeO0zMX
 BBRVzKMNOsxtLgamHmnh4FANAwUGD4QRYnRFkutzTNC6ITBItxjeiFKbimFL2lFu
 HLxiDxVgFgce2meJnmMZZzgN+te5cIzzNmwg7QSL9VK85sZevMBfRYmc5L9kSMsR
 Z4FuFA7XFkrevWDMWpg8lkq6hHd9VI5C7K9XKV6Xux9lesRR8tHQ8X0FQ3Flb4zP
 f1jJTqUBDmRvwAqx4ZMhTnFqx3nBMUVOdQsqradv9UHiq9CpbyX7iKU9sSWdeJvN
 7Ku8/fokJj8UNSPg9nUzjRzNIm4BMeBiDGyP/ykndF8/N5pTuEsS4t2oqWiErMgu
 Cl0AiOKi8bmGtxd6w0UCtcVr/za84sTMQ5FZsOK+xI5xwQZ0RZlPesgbuPYbmFoD
 Qm2hRCTEMI53gZyhOcfW5JAlUaNAgqNlDKVEPBKXAKNhF/Mb5MSfnag5cDMyofuV
 hHTo59/F0GfTL+Ru0xagpySztfZ+7iL2G5I0amTEWHE4F3/ObbmenlW/GuuQv2Vw
 yFqiMSWe17VaN6Qkq6k58/SxSggGKfeII3fpbYPwT4GE3LusKbs=
 =zJ+Z
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+V0oACgkQmmx57+YA
 GNmgXw//VcFix8qXFC1wZ+SbKHXeUU8rHDWTQl6SXH57/ob4kDFzxUzpxENqHK4r
 0zy5uNLWRU4s9SCYq2Jm9fWhhD+qSBgQxUY8glBSttW0lmTizhz4dhTBAGJqWDVl
 4zWvV9/sosxo0Ecz//eFCLxbWifjVJa+voeOa6JfD3KNc1EVnLLokehtupFxKYZk
 xgcD7yOanJQFCJiN+mJ+fJd/D0Qn0ffl2F4/cEVJg8m7lyn09/Fjq8VoKjKgcmim
 WE/fZ8ZDJf6qeaBi8miAFSOsX3cWDDGE9UcTibHsV+ex3GAyeFB0/KfXxME813CG
 2Kxqa1CxANpip4zO1FkofxJX6aRmvyhf7biyl1kKsdGqRbOH9PA1c7ALlsJIrB/l
 B8PwS2MJBv91DR5yFBQPAcZqPHc07jc1tFCrmhKxlI2H1Yd+uZKuAIaJYM9faQqa
 K7B87NTj3TfWP95T/PhhInBxU7arGRMY74dTeRjKjibcjegYD83U8LTD2pebgO7A
 7DxTwjbQNiOJEX4VIbk3RT4+0Ymc3S404qLiWLK91SJY75UJWRssU5RU10oVpWDm
 SLskvH8hUvFJ0Iu6JCff4Q8gju2tG86ejVz29fnW3ziksO4OJANBWW75vSTR2BOA
 ujuGYoF/eJD3DwYWvBC8Vk7YDyX2ov3qD5l16ZXNl2dVy6bpqCY=
 =Qgls
 -----END PGP SIGNATURE-----

Merge tag 'omap-for-v6.17/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap into soc/dt

arm: dts: OMAP updates for v6.17
- new board support: Seeed BeagleBone Green Eco
- misc. fixups / cleanups

* tag 'omap-for-v6.17/dt-signed' of https://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-omap:
  arm: dts: ti: omap: Fixup pinheader typo
  ARM: dts: am335x-pdu001: Fix RS-485 transceiver switching
  arm: dts: omap: Add support for BeagleBone Green Eco board
  dt-bindings: omap: Add Seeed BeagleBone Green Eco
  arm: dts: omap: am335x-bone-common: Rename tps to generic pmic node
  Revert "ARM: dts: Update pcie ranges for dra7"
  ARM: dts: omap: am335x: Use non-deprecated rts-gpios

Link: https://lore.kernel.org/r/7h7c0gxczy.fsf@baylibre.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 17:05:46 +02:00
Arnd Bergmann
96a96de2cc STM32 DT for v6.17, round 1
Highlights:
 ----------
 
 - MPU:
   - STM32MP13:
     -Add Ethernet MAC adress efuse support.
 
   - STMP32MP15:
     - Add stm32mp157f-DK2 board support. This board embedds the same
       conectivity devices, DDR ... than stm32mp157c-dk2.
       However there are two differences: STM32MP157F SoC which allows
       overdrive OPP and the SCMI support for system features like
       clocks and regulators.
 
   - STM32MP25:
     - Fix tick timer for low power use cases.
     - Add timer support.
 -----BEGIN PGP SIGNATURE-----
 
 iQJRBAABCgA7FiEEctl9+nxzUSUqdELdf5rJavIecIUFAmhv3EodHGFsZXhhbmRy
 ZS50b3JndWVAZm9zcy5zdC5jb20ACgkQf5rJavIecIX9Cw//XWLtoi801lmFZd2Q
 mC+nWCAha2c0QJzkaHspvRkHxeuQ4E0NS5APd8tMdKas1gW8fUk+LZp5TmQs8bMp
 cgJLuP4E01DvcZ3hd3P3Ep+tYI7CqNoLnYqvbmQNGiCOXfZY7i+tIi/NfyZIvyXv
 KmEaFTPjp2J7JQ5L3YL74TseqxFROzrqqaFEYAHFYVwheVmA23CyyNwLRfyiInA5
 K8hIgNJVWhuCjCzYIBpDdcsyZ/olMGRLpYdEs7tCKoj2WeDauyfergI+3Juopc5Z
 G85rYu+30BXlvNJQuvFvk/gb9rwqPGGVY4W+ienLSKCqnAD4QupdPUZwkoyFcSqS
 /bx41/a9H5fxOt3SWzPD1vlb7Hj+ZVhu01pwbcBQXb3hJGtkbArVsNuwjhqykB+S
 2+MXAxHpwUdYSBRUJtKcIeqssJYU0ODEF+8ELUJnnIdM0uvo2U31mb9xlIa66wb3
 WDnH22ic1JoKIf+wFiJ4cuRp2f7pVyLS6+3Il+prHTvFj79bLOv5L97ptoZUD0KR
 24qgNknBlcf7kLBiSJHxfbyz2QejPuvWjIJvXTl8fixKWV3ZgcpGZWRrPjQ+wmQ1
 b7N7Z1Z5UH8+48S9151yhPax2/69JU6ARnT4YnC5qdQxmp5GdBblURZjwbHcghvK
 BwIizx2zERnTEPTwZ2HDyVqtUXE=
 =rp+j
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VwYACgkQmmx57+YA
 GNlSehAAtQv10iNUatadP4W6SmfhfE//JJklJ3I+7zZo061mSNyUKdu4lnCcXIQz
 oxavuxttwF90PxvtMn5x6tWHsAvb3CG5+5IMxJ5/ud+QkQH8XC6W6+PpmGe37JQb
 tn94igNVVov6IA6SUDMRg4Sy/rTXIr9HN+YKV1zpE7zjxMHwbCl9isHepCY391i9
 5E/1mM/8NnkNjHqc08KBjGYbmDqwWEgN+R2YDRb2wPBAxsD1gCSZkr8YWR6deO2D
 Mdj8kO4Kkd5z/seCtCFf9imm7L7p6IaKoG4CnERcWCmOM25tppmwPjfaKtVUkTJG
 c6nZJAUWXSUEfRTdSO22Z1CQFkKowOS0f6NbIhlwwtnaCLp0FEsP7sHJFBcXQ8mc
 BRLjoM7qfuBjOinv3A9EqwdD/WJ8hQ/0jc+Dha8N8KJI5KU6NqJ8SA5xMiyfbhBi
 KlQXZpnktDMZaohvlNN5c4q3QL0Jfj+eFJS0pL5rqtMmrDxHURgQQvDk8DCORfMM
 DvxHBUQtU7qU42hxYCt9+wGnvxAwm5nSdp2BG08q9bvpKDBeqtVBn3+Prr3FX0Mt
 KDkYBtnAT9UP11AQ7etqJCTj/eoTz7q++nfT/onlktVcbx1mvD2XIMSR6cauTfqk
 9SwR9EbqfQ9BaEZFWWzzkvpBDhgTRADvLEO3fg3Kqhm/HaGOJsE=
 =fq/y
 -----END PGP SIGNATURE-----

Merge tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/dt

STM32 DT for v6.17, round 1

Highlights:
----------

- MPU:
  - STM32MP13:
    -Add Ethernet MAC adress efuse support.

  - STMP32MP15:
    - Add stm32mp157f-DK2 board support. This board embedds the same
      conectivity devices, DDR ... than stm32mp157c-dk2.
      However there are two differences: STM32MP157F SoC which allows
      overdrive OPP and the SCMI support for system features like
      clocks and regulators.

  - STM32MP25:
    - Fix tick timer for low power use cases.
    - Add timer support.

* tag 'stm32-dt-for-v6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
  arm64: dts: st: remove empty line in stm32mp251.dtsi
  arm64: dts: st: fix timer used for ticks
  arm64: defconfig: Enable STM32 Octo Memory Manager and OcstoSPI driver
  ARM: dts: stm32: add stm32mp157f-dk2 board support
  dt-bindings: arm: stm32: add STM32MP157F-DK2 board compatible
  ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
  ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
  dt-bindings: regulator: Add STM32MP15 SCMI regulator identifiers
  ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
  ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
  ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
  arm64: defconfig: enable STM32 timers drivers
  arm64: dts: st: add timer nodes on stm32mp257f-ev1
  arm64: dts: st: add timer pins for stm32mp257f-ev1
  arm64: dts: st: add timer nodes on stm32mp251
  ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses

Link: https://lore.kernel.org/r/b3e3363b-1ea5-457c-b244-2cbe26f7d6e4@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 17:04:38 +02:00
Arnd Bergmann
9a5a531d1c ASPEED devicetree updates for 6.17
Removed platforms:
 
 - IBM's Swift BMC
 
 New platforms:
 
 - Meta's Santabarbara
 
   Santabarbara is a compute node with an accelerator module
 
 - NVIDIA's GB200NVL BMC
 
   NVIDIA GB200 NVL72 connects 36 Grace CPUs and 72 Blackwell GPUs in an NVIDIA
   NVLink-connected, liquid-cooled, rack-scale design.
 
 Updated BMC platforms:
 
 - Bletchley (Meta): GPIO hog names, remove ethernet-phy node, USB PD negotiation
 - Catalina (Meta): Various sensors added, MCTP support for NIC management
 - Harma (Meta): Various sensors added
 - System1 (IBM): IPMB and various GPIO-related updates
 - Yosemite4 (Meta): GPIO names for UART mux select lines
 
 The System1 series includes a devicetree binding patch for IPMI IPMB devices.
 -----BEGIN PGP SIGNATURE-----
 
 iJIEABYIADoWIQSoUT1x3bOSX/nAa8ajM9GZTrjhpgUCaGdkFhwcYW5kcmV3QGNv
 ZGVjb25zdHJ1Y3QuY29tLmF1AAoJEKMz0ZlOuOGmvsYA/igiCEelkgM1XwRceb9n
 8r06Zwd+/B4nH2Qtwk9wwM1PAQD5eYs0ukpyEZNxMphA5VCLvYjLZhs3Kprs5Ibr
 9Ry7Cg==
 =6CH9
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VlcACgkQmmx57+YA
 GNljJA//a6csTtM+gQ2pDFIjyUYs1781pEe2unwVgWPEIzTt++0Zc/I9Y6BIRJ7U
 Fbdak2f8+4KwDr0ytguu3NOlauy1tleCAxoSQvm0bWSdTrEu8zgHnzpMKVNOZrtk
 6x8pDOKyoAjSVhaog7k142dl1SdVSUNvh5tKbVXa5Ec++bX8CLyh+a+xp9p9/pKo
 nHOraY/Q6E3PdhAJ80MFFP/mxsQz1vtp0+45HWeyi+kpDCgXKvLEmJ7RUEZ0XaCG
 YX8nuSb6uIt+VyRV3Lt6KXB8LKfymPzD6SeIum8G6Nl1voxZaSadqn69/DJ4O3lq
 HS//sMXonX3wHNaHR+5I0xsflcgy+qYszp5+rcRk4XZ9u0qwWkDZj2Bfwpu/xn2S
 hWDbUbw40tB0UpUM0uKtgcngTakyqStmH6ecJqRMTkXH0Xk88mWm6C5TpVhZMkJ3
 IorSJr9OhjWej8Ie47qfKEdnR6q6PVLMevEm0l2Y7jVbscNcymP/SIOYbqyaC7Vz
 UZhggptowpPYqGhVbbRUtv5cotnnhrezplfUcPLjhaAgFqlRZLF+QyT07QWeW/HN
 Roo7WBjIdWvAiBbPM3TVJqehbDDTcayxEk8L7pWk47iBIqQMyZ9t6+Nn9UzPa+BE
 EaF8jA+bRQcUKqOOhu1cnfP0d46o/5mnL/TZANaM135g4yPZ13k=
 =Snu6
 -----END PGP SIGNATURE-----

Merge tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux into soc/dt

ASPEED devicetree updates for 6.17

Removed platforms:

- IBM's Swift BMC

New platforms:

- Meta's Santabarbara

  Santabarbara is a compute node with an accelerator module

- NVIDIA's GB200NVL BMC

  NVIDIA GB200 NVL72 connects 36 Grace CPUs and 72 Blackwell GPUs in an NVIDIA
  NVLink-connected, liquid-cooled, rack-scale design.

Updated BMC platforms:

- Bletchley (Meta): GPIO hog names, remove ethernet-phy node, USB PD negotiation
- Catalina (Meta): Various sensors added, MCTP support for NIC management
- Harma (Meta): Various sensors added
- System1 (IBM): IPMB and various GPIO-related updates
- Yosemite4 (Meta): GPIO names for UART mux select lines

The System1 series includes a devicetree binding patch for IPMI IPMB devices.

* tag 'aspeed-6.17-devicetree-1' of https://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux: (34 commits)
  ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel
  ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC
  dt-bindings: arm: aspeed: add Meta Santabarbara board
  ARM: dts: aspeed: bletchley: enable USB PD negotiation
  ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes
  ARM: dts: aspeed: harma: add mmc health
  ARM: dts: aspeed: Harma: revise gpio bride pin for battery
  ARM: dts: aspeed: harma: add ADC128D818 for voltage monitoring
  ARM: dts: aspeed: harma: add fan board I/O expander
  ARM: dts: aspeed: harma: add E1.S power monitor
  ARM: dts: aspeed: catalina: Enable MCTP for frontend NIC management
  ARM: dts: aspeed: Add device tree for Nvidia's GB200NVL BMC
  dt-bindings: arm: aspeed: add Nvidia's GB200NVL BMC
  ARM: dts: aspeed: catalina: Enable MCTP support for NIC management
  ARM: dts: aspeed: catalina: Update CBC FRU EEPROM I2C bus and address
  ARM: dts: aspeed: catalina: Enable multi-master on additional I2C buses
  ARM: dts: aspeed: catalina: Remove INA238 and INA230 nodes
  ARM: dts: aspeed: catalina: Add second source HSC node support
  ARM: dts: aspeed: catalina: Add second source fan controller support
  ARM: dts: aspeed: catalina: Add fan controller support
  ...

Link: https://lore.kernel.org/r/36d50489cac1fbae01ec699b742f6c6c459a01cb.camel@codeconstruct.com.au
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 17:01:43 +02:00
Arnd Bergmann
ad6d5af8bb Samsung DTS ARM changes for v6.17
Just few cleanups based on dtbs_check.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmhuvgsQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD1xqcD/9fJhockP5kA33vOeSXy+t6I1zijhA1hnj2
 xJjjXIpxTKEjxbAazFdrD6JEArep5TwkNoVBFNpxGODKWsR5qbX1i0/phbdfdFcR
 w84y4EnPxOKTmaOaXt8hCSFOi97N46T36d7P/62yBlDvUor+NuoYkV/XgObfJ+Mz
 voE+km28HGztMgYo7aVz1/+vpMv9zkPwY1RqsePDVir+H8xpbtYhhiehMWIOSGg7
 XF1comxWnX9MMihtk0SVFAzOKSV62V8e8bkfPH3PqLoI3xUbYW6wgyWkA9qHw1WQ
 xWPwbvAod2gfgW9ngTIp3dBQXsjnpYMggRxX6uXWxZ2qZaTBYMsqFCQ8zLfCvu2A
 FFGguX4JwuhkBEtBu/odnomIhzgTQbVQd0Y2liYvG+20t8FliRjzNbee9w3b1EMN
 9LA22LtxKWMyPYHzHvape1K4a6cDTGHai8zL1LIltFnr+LglGM+n2c0UdvnEQTy4
 S2iUHkKMzpO2oCMTVocX2elNgChuj8Ov47uK34dn5frI/uuPIkLoJ/UzIQVd6Yf6
 LI6x5rs+tdyUXefPVBfBwK19IsVRQ40KJDAbPsXQ0tWQ0LJnkwm5VjXVmL5MuAx7
 Erzv4/qOG/tGbXCqc9xyxLmyOOkBMhHnj0Ho/SrxiGqJD5Ovv5fBzppzfPNuC2cS
 4yRNQBcT7A==
 =VAMy
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VbcACgkQmmx57+YA
 GNnmBQ//Y2z7sn082/oziLdc5eaK4a26O9J42eiy5lOPHUhm/NaHx4/MT91PPSbZ
 7MI+TGgqBOTD/2CQSEtnX4Y7em4AF+4sysc3qjUMDVG7OAfe3tcAsrRQDWYLrStR
 OY83o7U6Fx7hHoBsEXmPnralfA2gjIwBUlJ78KLcf8zr+BxIvivAV5GnpOSQr4Ux
 9j2cWycXXqeTFgoIenrM1TpY2/odPp5RG6YgRHsmudeKcj3OojH5DtVhnnzgf/SO
 EEudbKPLivdaCJCYyS5yR3t0RHSX+k4eWHQmwqbrwzQR7tnTQltpnSk+DC1Bx47r
 4CaF97MeohPvwlrWPAnMkFCNfNMSD6s79yb2G8OJH4RLv0H+urb45wR1tVVkMco/
 t7uHmmwBSeHTWr3yZo0IPntXn5XyyIKBN+jqWUA8sxhbAAUTlShzbXr2csKaPEY2
 738xu9SEYLr8aOWpNl9iuQBJCPB2J9lMMKXD3ANSxNeCsf5yK4kUw+oD96cJ5tXK
 q5n3DUcl41VYOeEToJTezd51nEWj/RS3tECGBrhR+cwicQnYhq0sxYaaKloj2eXs
 cegzgYTvj18pdWUJcCCNJkijuFPkpCSR2shpABUkWIjRv0mVDxTOBkDT6TuZBoBJ
 IT1bFgqfQSGSjq+/z0Ay6hIp35e6h+yn9AgM/slbMogp7as6DXI=
 =ASrH
 -----END PGP SIGNATURE-----

Merge tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

Samsung DTS ARM changes for v6.17

Just few cleanups based on dtbs_check.

* tag 'samsung-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  ARM: dts: s5pv210: Align i2c-gpio node names with dtschema
  ARM: dts: exynos: Align i2c-gpio node names with dtschema

Link: https://lore.kernel.org/r/20250709191523.171359-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 16:59:03 +02:00
Arnd Bergmann
43af11e192 VT8500 DTS ARM changes for v6.17
1. Several dtbs_check cleanups.
 2. Add missing cache topology - L2 cache controller on WM8850/WM895.
 -----BEGIN PGP SIGNATURE-----
 
 iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmhuuSEQHGtyemtAa2Vy
 bmVsLm9yZwAKCRDBN2bmhouD18ydD/wIP2a7A7cE0o08fPl9Lo4pp2TxRY1JJdSf
 wiKSce+ptQXVJHJ5ZB9RWP0yV+BxjLHpicW7k6ghdEC/9kbdDot25Wzwg5TH+DfO
 vsJbMtR8A2dRvE7gTM5H+bcfC3HiclbMKXDWcskaedtxn1a64caU0XlbR8bXhkOt
 a9HxwdRMTTXDamCor/dY5rASvhBO+r/NHiiMGZBfKqmcsE9GJy0XiIE6eVnGLCUk
 Tk6Edosoz/2M5/Kx/i/ytsp5342awbOxHoAkHMx3Ot+CrHenOq0PqkyWFrOcwyry
 AUCeD9/1cO6/7HXc05Ir9fkCg6kpVtL/pOzBWse7UBF1ngryMhGevfAyFpwe7Pxd
 67WE3uB3s//iU+dXUzrDN2JEYv1BKySoYQ+FeX7xayfeo7uEsylAYW++kKrDdFt5
 NuoxnSz1kihij9aXu94sHS2Haz9QJcvCHPV+MuFSGyAvdawhxWkVbvljFtO9FT//
 e+Pxpz/ygpBTxkgBtoQNXaKZXG6S1rPYW97sftSk7qUIIMGvhp5fBLzj5FDojJIn
 MU3S5vS84ePHAsFYpFDHRr5Z0/uP+rtV2WOn8lVmPsKZauve5RLK1yfUs7xssMWQ
 hJwstbPUZvd7sE6cmRrT+qzUrWtATi+AHh+YdM3UZOzGd9pzCLVRelkULsdsKz52
 S4OnPGHCAg==
 =A6jK
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh+VZYACgkQmmx57+YA
 GNlZMA/7BBNs+cS05gTKh1PBvvrtrnnnnG4dBActYdd1iJe+/7QDrN3uGl7zXtMn
 5L69a71YdhR/mhLziEPYhlr78NoNmJMHbtG90LOtDwtz8yRmhadhO/3FHRDGWOyU
 vZb97cFikw6zoHmU+ISwvVM8SCyLqW+gOB0w4fFjdKa7ibBicBAghmJEBdqs1IGL
 2PIT4nEbqWbtIaRjkWXSvWkrgHlsWpDodNjpwJbQcnAx2QhgKRhqlV8s+ZHe28EQ
 CgznfJ2S6bjSby3gvTAG7N6fxbc1oQuHZqaTSorHfSsPyRAYHh2X7FOIiRkKhH4D
 xm/ubYF+2frT2Hd9cNDo4ETgvuPLLjWHFTW38rmw477gAVW2dzyLNiSOVcVnBg5b
 cha2gWtJL13BLk1ipkH5g6LNwk8/TvR65JdG609b+CkmitaStUDlVEOAeP1ayPA/
 qUFUtGu6kJZvQF/VNoG278vqtwb0jxR79UoYn9xJku0vvf/GIDimJLzrpyIfJQWw
 o0FOpiweSZdM0D8aOSipOy5BI3M5HHYobImDs1XaZ3Q+sPoauD12eGrEuEmW8nCV
 T/u5P3xcO0+Jf7UqPAPwjBPwMzhC/GMK/Ni+tySOS5ZajNuio9aZ7C2Bde0yNJFd
 o5GZaZosmew7NtOpLaCI9mUN5AknqLxPAIVtB+cx65cqDXSA9Pk=
 =m5Ie
 -----END PGP SIGNATURE-----

Merge tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into soc/dt

VT8500 DTS ARM changes for v6.17

1. Several dtbs_check cleanups.
2. Add missing cache topology - L2 cache controller on WM8850/WM895.

* tag 'dt-vt8500-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt:
  ARM: dts: vt8500: Add L2 cache controller on WM8850/WM8950
  ARM: dts: vt8500: Fix the unit address of the VT8500 LCD controller
  ARM: dts: vt8500: Use generic node name for the SD/MMC controller
  ARM: dts: vt8500: Move memory nodes to board dts and fix addr/size
  ARM: dts: vt8500: Add node address and reg in CPU nodes

Link: https://lore.kernel.org/r/20250709184800.168462-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-21 16:58:30 +02:00
Florian Fainelli
0c927d4784 ARM: dts: broadcom: Fix bcm7445 memory controller compatible
The memory controller node compatible string was incompletely specified
and used the fallback compatible. After commit 501be7cece
("dt-bindings: memory-controller: Define fallback compatible") however,
we need to fully specify the compatible string.

Fixes: 501be7cece ("dt-bindings: memory-controller: Define fallback compatible")
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202507011302.ZqNlBKWX-lkp@intel.com/
Link: https://lore.kernel.org/r/20250701175538.1633435-1-florian.fainelli@broadcom.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2025-07-15 10:42:18 -07:00
Svyatoslav Ryhel
3c2c00572f ARM: tegra: chagall: Add embedded controller node
Add embedded controller node to Pegatron Chagall device-tree.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250429061803.9581-5-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11 17:11:18 +02:00
Svyatoslav Ryhel
118a745e61 ARM: tegra: Add device-tree for Asus Portable AiO P1801-T
Add a device-tree for the Asus Portable AiO P1801-T, which is a NVIDIA
Tegra30-based 2-in-1 detachable tablet, originally running Android.

The tablet was also sold together with a PC docking station as the
Transformer AiO P1801.

Tested-by: Andreas Westman Dorcsak <hedmoo@yahoo.com> # P1801-T with dock
Co-developed-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Maxim Schwalm <maxim.schwalm@gmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250616073947.13675-3-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-11 17:09:24 +02:00
Max Shevchenko
5a8e7b4eaa
ARM: dts: mediatek: add basic support for Lenovo A369i board
This smartphone uses a MediaTek MT6572 system-on-chip with 512MB of RAM.
It can currently boot into initramfs with a working UART and
Simple Framebuffer using already initialized panel by the bootloader.

Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-11-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-07-11 10:31:43 +02:00
Max Shevchenko
7f3f9e5653
ARM: dts: mediatek: add basic support for JTY D101 board
This tablet uses a MediaTek MT6572 system-on-chip with 1GB of RAM.
It can currently boot into initramfs with a working UART and
Simple Framebuffer using already initialized panel by the bootloader.

Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-10-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-07-11 10:31:43 +02:00
Max Shevchenko
38a9dac267
ARM: dts: mediatek: add basic support for MT6572 SoC
Add basic support for the MediaTek MT6572 SoC.

Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-9-bde75b7ed445@proton.me
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2025-07-11 10:31:43 +02:00
Bence Csókás
b23de67d4b ARM: dts: imx6-gw: Replace license text comment with SPDX identifier
Replace verbatim license text with a `SPDX-License-Identifier`.

The comment header mis-attributes this license to be "X11", but the
license text does not include the last line "Except as contained in this
notice, the name of the X Consortium shall not be used in advertising or
otherwise to promote the sale, use or other dealings in this Software
without prior written authorization from the X Consortium.". Therefore,
this license is actually equivalent to the SPDX "MIT" license (confirmed
by text diffing).

Cc: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Bence Csókás <csokas.bence@prolan.hu>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-11 16:23:19 +08:00
Frieder Schrempf
201e41980e ARM: dts: imx6ul-kontron-sl-common: Fix QSPI NAND node name
Rename QSPI NAND node to 'flash@0' in order to fix the following
dt-schema warning:

spi-flash@0 (spi-nand): $nodename:0: 'spi-flash@0' does not match '^(flash|.*sram|nand)(@.*)?$'

Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-11 16:21:48 +08:00
Eberhard Stoll
39abdc053b ARM: dts: imx6ul-kontron-sl-common: Add SPI NOR partitions
Describe the partitions for the bootloader and the environment
on the SPI NOR. While at it also fix the order of the properties
in the flash node itself.

Signed-off-by: Eberhard Stoll <eberhard.stoll@kontron.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-11 16:21:48 +08:00
Annette Kobou
47ef525612 ARM: dts: imx6ul-kontron-bl-common: Fix RTS polarity for RS485 interface
The polarity of the DE signal of the transceiver is active-high for
sending. Therefore rs485-rts-active-low is wrong and needs to be
removed to make RS485 transmissions work.

Signed-off-by: Annette Kobou <annette.kobou@kontron.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Fixes: 1ea4b76cdf ("ARM: dts: imx6ul-kontron-n6310: Add Kontron i.MX6UL N6310 SoM and boards")
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-11 16:05:24 +08:00
Svyatoslav Ryhel
8ae70af247 ARM: tegra: Add device-tree for ASUS VivoTab RT TF600T
Add device-tree for ASUS VivoTab RT TF600T, which is NVIDIA Tegra30-based
tablet device with Windows RT.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Link: https://lore.kernel.org/r/20250617070320.9153-3-clamor95@gmail.com
Signed-off-by: Thierry Reding <treding@nvidia.com>
2025-07-09 16:53:02 +02:00
Albin Törnqvist
a3a4be32b6 arm: dts: ti: omap: Fixup pinheader typo
This commit fixes a typo introduced in commit
ee368a10d0 ("ARM: dts: am335x-boneblack.dts: unique gpio-line-names").
gpio0_7 is located on the P9 header on the BBB.
This was verified with a BeagleBone Black by toggling the pin and
checking with a multimeter that it corresponds to pin 42 on the P9
header.

Signed-off-by: Albin Törnqvist <albin.tornqvist@codiax.se>
Link: https://lore.kernel.org/r/20250624114839.1465115-2-albin.tornqvist@codiax.se
Fixes: ee368a10d0 ("ARM: dts: am335x-boneblack.dts: unique gpio-line-names")
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-07-07 14:24:57 -07:00
Felix Brack
539e87dd66 ARM: dts: am335x-pdu001: Fix RS-485 transceiver switching
The wiring of the RS-485 transceiver of UART0 of the PDU-001 board
allows sending or receiving date exclusively. In other words: no
character transmitted will ever be received.
Hence the tx-filter counter in the OMAP serial driver can't work
correctly as it relies on receiving the transmitted characters.
This in turn will prevent reception of data unless we disable the
tx-filter counter.
This patch disables the tx-filter counter by enabling the DTS setting
rs485-rx-during-tx. This might sound like the opposite to be done but
it uses the enabling of rs485-rx-during-tx not for receiving the data
transmitted but for disabling the tx-fiter counter.

Tested-by: Felix Brack <fb@ltec.ch>
Signed-off-by: Felix Brack <fb@ltec.ch>
Link: https://lore.kernel.org/r/20250529135324.182868-1-fb@ltec.ch
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2025-07-07 14:21:44 -07:00
Wolfram Sang
28254bcf96 ARM: dts: marvell: kirkwood: use recent scl/sda gpio bindings
We have dedictaded bindings for scl/sda nowadays. Switch away from the
deprecated plain 'gpios' property.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2025-07-07 16:58:42 +02:00
Bence Csókás
db05490d41 ARM: dts: imx6-karo: Replace license text comment with SPDX identifier
Replace verbatim license text with a `SPDX-License-Identifier`

The comment header mis-attributes this license to be "X11", but the
license text does not include the last line "Except as contained in this
notice, the name of the X Consortium shall not be used in advertising or
otherwise to promote the sale, use or other dealings in this Software
without prior written authorization from the X Consortium.". Therefore,
this license is actually equivalent to the SPDX "MIT" license (confirmed
by text diffing).

Cc: Lothar Waßmann <LW@KARO-electronics.de>
Acked-By: Lothar Waßmann <LW@KARO-electronics.de>
Signed-off-by: Bence Csókás <csokas.bence@prolan.hu>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2025-07-07 17:06:28 +08:00
Mihai Sain
314862edb1 ARM: dts: microchip: sama7g5: Add cache configuration for cpu node
Describe the cache memories according with datasheet chapter 15.2:

- L1 cache configuration with 32KB for both data and instruction cache.
- L2 cache configuration with 256KB unified cache.

Before this patch the kernel reported the warning:

[    0.171425] cacheinfo: Unable to detect cache hierarchy for CPU 0

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250619070636.8844-3-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-07-05 10:43:31 +03:00
Mihai Sain
4101c8274b ARM: dts: microchip: sama7d65: Add cache configuration for cpu node
Describe the cache memories according with datasheet chapter 15.2:

- L1 cache configuration with 32KB for both data and instruction cache.
- L2 cache configuration with 256KB unified cache.

Before this patch the kernel reported the warning:

[    0.161955] cacheinfo: Unable to detect cache hierarchy for CPU 0

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250619070636.8844-2-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-07-05 10:43:30 +03:00
Mihai Sain
1e2e0ed390 ARM: dts: microchip: sama5d4: Update the cache configuration for CPU
Add the memory size properties for L1 and L2 according with block
diagram from datasheet:

- L1 cache configuration with 32 KB for both data and instruction cache.
- L2 cache configuration with 128 KB unified cache.

[root@sama5d4 ~]$ lscpu
Architecture:             armv7l
  Byte Order:             Little Endian
CPU(s):                   1
  On-line CPU(s) list:    0
Vendor ID:                ARM
  Model name:             Cortex-A5
Caches (sum of all):
  L1d:                    32 KiB (1 instance)
  L1i:                    32 KiB (1 instance)
  L2:                     128 KiB (1 instance)

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250625064934.4828-4-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-07-05 10:37:29 +03:00
Mihai Sain
31a8202459 ARM: dts: microchip: sama5d3: Update the cache configuration for CPU
Add the memory size properties for L1 according with block
diagram from datasheet:

- L1 cache configuration with 32 KB for both data and instruction cache.

[root@sama5d3 ~]$ lscpu
Architecture:             armv7l
  Byte Order:             Little Endian
CPU(s):                   1
  On-line CPU(s) list:    0
Vendor ID:                ARM
  Model name:             Cortex-A5
Caches (sum of all):
  L1d:                    32 KiB (1 instance)
  L1i:                    32 KiB (1 instance)

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250625064934.4828-3-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-07-05 10:37:28 +03:00
Mihai Sain
ab435d1265 ARM: dts: microchip: sama5d2: Update the cache configuration for CPU
Add the memory size properties for L1 and L2 according with block
diagram from datasheet:

- L1 cache configuration with 32 KB for both data and instruction cache.
- L2 cache configuration with 128 KB unified cache.

[root@sama5d2 ~]$ lscpu
Architecture:             armv7l
  Byte Order:             Little Endian
CPU(s):                   1
  On-line CPU(s) list:    0
Vendor ID:                ARM
  Model name:             Cortex-A5
Caches (sum of all):
  L1d:                    32 KiB (1 instance)
  L1i:                    32 KiB (1 instance)
  L2:                     128 KiB (1 instance)

Signed-off-by: Mihai Sain <mihai.sain@microchip.com>
Link: https://lore.kernel.org/r/20250625064934.4828-2-mihai.sain@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
2025-07-05 10:37:28 +03:00
Amelie Delaunay
fadfd41a49 ARM: dts: stm32: add stm32mp157f-dk2 board support
STM32MP157F-DK2 board embeds a STM32MP157F SoC. This SoC contains the same
level of feature than a STM32MP157C SOC but A7 clock frequency can reach
800MHz, hence the inclusion of the newly introduced stm32mp15xf.dtsi.

As for other latest STM32 MPU families, STM32MP157F-DK2 relies on OP-TEE
SCMI services for SoC clock and reset controllers resources, and for PMIC,
now under OP-TEE control. That's why stm32mp157f-dk2-scmi.dtsi is
introduced, to move all clocks, resets and regulators to SCMI-based ones.

To "disable" SCMI, just need to comment stm32mp157f-dk2-scmi.dtsi inclusion
and to replace &scmi_v3v3 with &v3v3, then to disable arm_wdt and to enable
i2c4 and its subnodes for PMIC support by Linux. Reconfigure usbotg for
dual role with type-C support if needed.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-7-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04 11:24:12 +02:00
Etienne Carriere
d1e88874c0 ARM: dts: stm32: optee async notif interrupt for MP15 scmi variants
Define the interrupt used by OP-TEE async notif on stm32mp15 scmi based
platforms.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-5-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04 11:24:12 +02:00
Amelie Delaunay
bcd6cc9ee1 ARM: dts: stm32: use internal regulators bindings for MP15 scmi variants
Use the SCMI voltage domain bindings for internal regulators on stm32mp15.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-4-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04 11:24:12 +02:00
Amelie Delaunay
8ac2fba023 ARM: dts: stm32: use 'typec' generic name for stusb1600 on stm32mp15xx-dkx
Adopt generic node name 'typec' for stusb1600, which is the USB Type-C
controller on stm32mp157x Discovery Kits.

Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-2-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04 11:24:12 +02:00
Alexandre Torgue
ab2e0f4f6c ARM: dts: stm32: fullfill diversity with OPP for STM32M15xF SOCs
This commit creates new file to manage security features and supported OPP
on STM32MP15xF SOCs. On STM32MP15xY, "Y" gives information:
 -Y = A means no cryp IP and no secure boot + A7-CPU@650MHz.
 -Y = C means cryp IP + optee + secure boot + A7-CPU@650MHz.
 -Y = D means no cryp IP and no secure boot + A7-CPU@800MHz.
 -Y = F means cryp IP + optee + secure boot + A7-CPU@800MHz.

It fullfills the initial STM32MP15x SoC diversity introduced by
commit 0eda69b6c5 ("ARM: dts: stm32: Manage security diversity
for STM32M15x SOCs").

Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
Signed-off-by: Amelie Delaunay <amelie.delaunay@foss.st.com>
Link: https://lore.kernel.org/r/20250603-stm32mp157f-dk2-v2-1-5be0854a9299@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04 11:24:12 +02:00
Olivier Moysan
ebf53abe62 ARM: dts: stm32: add system-clock-direction-out on stm32mp15xx-dkx
The commit 5725bce709
("ASoC: simple-card-utils: Unify clock direction by clk_direction")
corrupts the audio on STM32MP15 DK sound cards.
The parent clock is not correctly set, because set_sai_ck_rate() is not
executed in stm32_sai_set_sysclk() callback.
This occurs because set_sysclk() is called with the wrong direction,
SND_SOC_CLOCK_IN instead of SND_SOC_CLOCK_OUT.

Add system-clock-direction-out property in SAI2A endpoint node of
STM32MP15XX-DKX device tree, to specify the MCLK clock direction.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Link: https://lore.kernel.org/r/20250521150418.488152-1-olivier.moysan@foss.st.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04 11:17:16 +02:00
Uwe Kleine-König
998adc8cd5 ARM: dts: stm32: Add nvmem-cells to ethernet nodes for constant mac-addresses
The efuse device tree description already has the two labels pointing to
the efuse nodes that specify the mac-addresses to be used. Wire them up
to the ethernet nodes. This is enough to make barebox pick the right
mac-addresses and pass them to Linux.

Suggested-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://lore.kernel.org/r/20250328171406.3307778-2-u.kleine-koenig@baylibre.com
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2025-07-04 09:07:22 +02:00
Marshall Zhan
1c15e359ba ARM: dts: aspeed: yosemite4: add gpio name for uart mux sel
Add gpio line name to support multiplexed console

Signed-off-by: Marshall Zhan <marshall_zhan@wiwynn.com>
Link: https://patch.msgid.link/20250630073138.3315947-1-marshall_zhan@wiwynn.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-07-04 13:28:25 +09:30
Fred Chen
9237e0a207 ARM: dts: aspeed: santabarbara: Add Meta Santabarbara BMC
Add linux device tree entry related to the Meta (Facebook) compute node
system using an AST2600 BMC.

This node is named "Santabarbara". It is a compute node with accelerator
module. The system monitors voltage and temperature for the CPU, switch,
and NIC components on the motherboard and switch board.

Signed-off-by: Fred Chen <fredchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20250625073847.4054971-3-fredchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-07-04 13:28:25 +09:30
Cosmo Chou
ab5e4c9777 ARM: dts: aspeed: bletchley: enable USB PD negotiation
- Enable USB Power Delivery with revision 2.0 for all sleds
- Configure dual power/data roles with sink preference

Signed-off-by: Cosmo Chou <chou.cosmo@gmail.com>
Link: https://patch.msgid.link/20250622034247.3985727-1-chou.cosmo@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-07-04 13:28:25 +09:30
Ankit Chauhan
f0d03c44ee ARM: dts: aspeed: lanyang: Fix 'lable' typo in LED nodes
Fix an obvious spelling error in the DTS file for the Lanyang BMC
("lable" -> "label"). This was reported by bugzilla a few years ago
but never got fixed.

Reported-by: Jens Schleusener <Jens.Schleusener@fossies.org>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=205891
Signed-off-by: Ankit Chauhan <ankitchauhan2065@gmail.com>
Link: https://patch.msgid.link/20250612075057.80433-1-ankitchauhan2065@gmail.com
[arj: Replace U+2192 with '->']
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-07-04 13:28:25 +09:30
Peter Yin
2236141ed3 ARM: dts: aspeed: harma: add mmc health
Add a GPIO expander node at address 0x13 on i2c11 bus
to monitor MMC health status via a dedicated GPIO line.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-6-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-07-04 13:28:25 +09:30
Peter Yin
ce5b2797b4 ARM: dts: aspeed: Harma: revise gpio bride pin for battery
Update the GPIO bridge pin configuration for the battery circuit
on the Harma platform to reflect the correct hardware design.

Signed-off-by: Peter Yin <peteryin.openbmc@gmail.com>
Link: https://patch.msgid.link/20250611080514.3123335-5-peteryin.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>
2025-07-04 13:28:25 +09:30