Binding example should not contain other nodes, including other
providers like syscon, because this is redundant and only adds
unnecessary bloat.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://patch.msgid.link/20250509112130.123462-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Add missing "reg = <0>;" property to the flash@0 node in the example.
Fixes: dd71cd4dd6 ("spi: Add Nuvoton WPCM450 Flash Interface Unit (FIU) bindings")
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221129102225.3598044-3-j.neuschaefer@gmx.net
Signed-off-by: Mark Brown <broonie@kernel.org>
The nuvoton,wpcm450-fiu binding's example includes
nuvoton,wpcm450-clk.h, which has not been merged yet,
thus causing a dt_binding_check error on -next.
Fix this error by simply hardcoding the clock index in the example,
before the breakage spreads any further.
Fixes: dd71cd4dd6 ("spi: Add Nuvoton WPCM450 Flash Interface Unit (FIU) bindings")
Reported-by: Rob Herring <robh@kernel.org>
Reported-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221129102225.3598044-2-j.neuschaefer@gmx.net
Signed-off-by: Mark Brown <broonie@kernel.org>
The Flash Interface Unit (FIU) is the SPI flash controller in the
Nuvoton WPCM450 BMC SoC. It supports four chip selects, and direct
(memory-mapped) access to 16 MiB per chip. Larger flash chips can be
accessed by software-defined SPI transfers.
The FIU in newer NPCM7xx SoCs is not compatible with the WPCM450 FIU.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221124191400.287918-2-j.neuschaefer@gmx.net
Signed-off-by: Mark Brown <broonie@kernel.org>
