i.MX6SL and i.MX6SX SPDIF blocks are compatible with i.MX35.
Document 'fsl,imx35-spdif' as a fallback compatible for these two
chip variants.
This fixes the following dt-schema warnings:
compatible: ['fsl,imx6sl-spdif', 'fsl,imx35-spdif'] is too long
compatible: ['fsl,imx6sx-spdif', 'fsl,imx35-spdif'] is too long
Signed-off-by: Fabio Estevam <festevam@denx.de>
Link: https://patch.msgid.link/20241028020749.36972-1-festevam@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
fsl,imx8qxp-spdif and fsl,imx8qm-spdif have 2 interrupts. Other platforms
have 1 interrupt.
Increase max interrupt number to 2 and add restriction for platforms except
i.MX8QXP and i.MX8QM.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://msgid.link/r/20240328-asrc_8qxp-v8-2-801cd6bb5be2@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Add power-domains property for asrc and spdif since fsl,imx8qm-asrc/spdif
and fsl,imx8qxp-asrc/spdif require 'power-domains'.
Set 'power-domains' as required property for compatible string
fsl,imx8qm-asrc/spdif and fsl,imx8qxp-asrc/spdif.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Link: https://msgid.link/r/20240328-asrc_8qxp-v8-1-801cd6bb5be2@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Add two PLL clock source, they are the parent clocks of root clock
one is for 8kHz series rates, another one is for 11kHz series rates.
They are optional clocks, if there are such clocks, then driver
can switch between them for supporting more accurate rates.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1656667961-1799-6-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
