the diff is all the new Qualcomm clk drivers added for a few SoCs they're
working on. The other two vendors with significant work this cycle are Renesas
and Amlogic. Renesas adds a bunch of clks to existing drivers and supports some
new SoCs while Amlogic is starting a significant refactoring to simplify their
code.
The core framework gained a pair of helpers to get the 'struct device' or
'struct device_node' associated with a 'struct clk_hw'. Some associated KUnit
tests were added for these simple helpers as well. Beyond that core change
there are lots of little fixes throughout the clk drivers for the stuff we see
every day, wrong clk driver data that affects tree topology or supported
frequencies, etc. They're not found until the clks are actually used by some
consumer device driver.
New Drivers:
- Global, display, gpu, video, camera, tcsr, and rpmh clock controller for the
Qualcomm Milos SoC
- Camera, display, GPU, and video clock controllers for Qualcomm QCS615
- Video clock controller driver for Qualcomm SM6350
- Camera clock controller driver for Qualcomm SC8180X
- I3C clocks and resets on Renesas RZ/G3E
- Expanded Serial Peripheral Interface (xSPI) clocks and resets on
Renesas RZ/V2H(P) and RZ/V2N
- SPI (RSPI) clocks and resets on Renesas RZ/V2H(P)
- SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H
- Ethernet clocks and resets on Renesas RZ/G3E
- Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H
(R9A09G087) SoCs
- Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N
- Timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on Renesas
RZ/V2N
Updates:
- Support atomic PWMs in the PWM clk driver
- clk_hw_get_dev() and clk_hw_get_of_node() helpers
- Replace round_rate() with determine_rate() in various clk drivers
- Convert clk DT bindings to DT schema format for DT validation
- Various clk driver cleanups and refactorings from static analysis tools and
possibly real humans
- A lot of little fixes here and there to things like clk tree topology,
missing frequencies, flagging clks as critical, etc. The full details are in
the commits and sub-tree merge logs
-----BEGIN PGP SIGNATURE-----
iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmiLljkUHHN3Ym95ZEBj
aHJvbWl1bS5vcmcACgkQrQKIl8bklSVR1BAAm5hnFdYvNX/AYK+bNNbb/YkbveGr
wxrZFjd/1QEZii7UBBOENLjvbrxT4N93TGuwuHOy+iz53X4mWg1BST0RENtmks9v
rys7suEkDVA7KoDEbcvbUhLbLObEQvr3sxurl2mvq563y02hkJ+rt3kDqdCn/MFK
fUfqZ79oPLaMULy3XwFyrEQEcxqQTX7i+j1atCB4TPmBSu3R5WMsCS+IVKPCuxCF
qcan5hCXakv4gBE/jF9x/u28j0m9v16uB2O/7sH3uDzHo/FxShBmC53Bj2Mtaf2w
lSKhEngCAMItU2LtruO2szpsmoy9EZTIqzELr5GJGXFDQDHiTzcigRtD5MCWjdG1
aapgWs47Yslh0M+d8Im81hu1YaLGDuoY7QiOVMN/htn0nPEozU1farKJbD3/gj9U
C6648EXYa/dqDBRRHeqLi4n1RK0Fzb15VvsanKn1nLy+cOvzNI4bpJjEJlUQjZMN
8MzvzBgLNsydDQC5I8JAPPK2Fcdpk3KpchphZrXLZY8iRco5kvx1mRjh90Lvr8N8
rmpUC6p1BdEIGhL+NAh7qCz9DOKfsaFr13tHpqD/PItzfHIyd7mss+7GSD6WCa/b
MduE9172Uq0mY8ZnWe0vV7/+s9GE7oTsxdMC6oF5yTXRIpog7evkUqNyXhpNTxgS
C2DLCDhaqpHI28c=
=S+dB
-----END PGP SIGNATURE-----
Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk updates from Stephen Boyd:
"This is the usual collection of primarily clk driver updates.
The big part of the diff is all the new Qualcomm clk drivers added for
a few SoCs they're working on. The other two vendors with significant
work this cycle are Renesas and Amlogic. Renesas adds a bunch of clks
to existing drivers and supports some new SoCs while Amlogic is
starting a significant refactoring to simplify their code.
The core framework gained a pair of helpers to get the 'struct device'
or 'struct device_node' associated with a 'struct clk_hw'. Some
associated KUnit tests were added for these simple helpers as well.
Beyond that core change there are lots of little fixes throughout the
clk drivers for the stuff we see every day, wrong clk driver data that
affects tree topology or supported frequencies, etc. They're not found
until the clks are actually used by some consumer device driver.
New Drivers:
- Global, display, gpu, video, camera, tcsr, and rpmh clock
controller for the Qualcomm Milos SoC
- Camera, display, GPU, and video clock controllers for Qualcomm
QCS615
- Video clock controller driver for Qualcomm SM6350
- Camera clock controller driver for Qualcomm SC8180X
- I3C clocks and resets on Renesas RZ/G3E
- Expanded Serial Peripheral Interface (xSPI) clocks and resets on
Renesas RZ/V2H(P) and RZ/V2N
- SPI (RSPI) clocks and resets on Renesas RZ/V2H(P)
- SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H
- Ethernet clocks and resets on Renesas RZ/G3E
- Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H
(R9A09G087) SoCs
- Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N
- Timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on Renesas
RZ/V2N
Updates:
- Support atomic PWMs in the PWM clk driver
- clk_hw_get_dev() and clk_hw_get_of_node() helpers
- Replace round_rate() with determine_rate() in various clk drivers
- Convert clk DT bindings to DT schema format for DT validation
- Various clk driver cleanups and refactorings from static analysis
tools and possibly real humans
- A lot of little fixes here and there to things like clk tree
topology, missing frequencies, flagging clks as critical, etc"
* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (216 commits)
clk: clocking-wizard: Fix the round rate handling for versal
clk: Fix typos
clk: spacemit: ccu_pll: fix error return value in recalc_rate callback
clk: tegra: periph: Make tegra_clk_periph_ops static
clk: tegra: periph: Fix error handling and resolve unsigned compare warning
clk: imx: scu: convert from round_rate() to determine_rate()
clk: imx: pllv4: convert from round_rate() to determine_rate()
clk: imx: pllv3: convert from round_rate() to determine_rate()
clk: imx: pllv2: convert from round_rate() to determine_rate()
clk: imx: pll14xx: convert from round_rate() to determine_rate()
clk: imx: pfd: convert from round_rate() to determine_rate()
clk: imx: frac-pll: convert from round_rate() to determine_rate()
clk: imx: fracn-gppll: convert from round_rate() to determine_rate()
clk: imx: fixup-div: convert from round_rate() to determine_rate()
clk: imx: cpu: convert from round_rate() to determine_rate()
clk: imx: busy: convert from round_rate() to determine_rate()
clk: imx: composite-93: remove round_rate() in favor of determine_rate()
clk: imx: composite-8m: remove round_rate() in favor of determine_rate()
clk: qcom: Remove redundant pm_runtime_mark_last_busy() calls
clk: imx: Remove redundant pm_runtime_mark_last_busy() calls
...
DT bindings and binding definitions for the Renesas RZ/N2H (R9A09G087)
SoC, shared by driver and DT source files.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaFRUEAAKCRCKwlD9ZEnx
cC7OAP0bFBqHJmfJezBF/yGFbatO4Ci9uXsBvVd8cSOesd75FQD/Xc8fLaf5hkPL
TCushNiZfVZqPE3AXJBgzdCYqPH7cw4=
=/rkp
-----END PGP SIGNATURE-----
Merge tag 'renesas-r9a09g087-dt-binding-defs-tag1' into renesas-clk-for-v6.17
Renesas RZ/N2H DT Binding Definitions
DT bindings and binding definitions for the Renesas RZ/N2H (R9A09G087)
SoC, shared by driver and DT source files.
- Add SDHI, ICU, I2C, PMIC, and GPU support on the RZ/G3E SoC and the
RZ/G3E SoM and SMARC Carrier-II EVK development board,
- Add internal SDHI regulator support on the RZ/V2H(P) SoC,
- Add UFS tuning parameters in E-FUSE on the R-Car S4-8 ES1.2 SoC,
- Add support for Ethernet ports C and D, I2C, keys, and SDHI on the
RZ/N1D SoC and the RZN1D-DB and RZN1D-EB development and expansion
boards,
- Add initial support for the RZ/V2N (R9A09G056) and the RZ/V2N EVK
board,
- Add support for the Retronix Sparrow Hawk board, which is based on
R-Car V4H ES3.0,
- Add ISP core support on R-Car V3U, V4H, and V4M,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCaAtk+QAKCRCKwlD9ZEnx
cPhbAQDUvBdFFN8qHsr6dFmEnUw+iQSqW0l+Rtc9E3Lw/lB2qAD+PB34sVcOnuOi
hBP0ty3219WF8KYaAx1jOfJqA0doFQ8=
=whxP
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmgeaDQACgkQYKtH/8kJ
Uic5aRAAhQno/+CnzHBwHimXMGFEBm5ozQTEeaF+Uv+O5yMV1aPk9+S2aAwrjNlY
e1B8SFXFAT5uZ7o3QEoJBpDcQYc2dfQtR1Q9r46zo3x3cXS9DSAO/rzm1hjzuXJm
CuGw98MTV6Mn1iX+GGjpVrwFGf57uAUEKm+Fzoz6OtHMRyPJb1sIPWoLEpGLKzMs
7yO/Dp9KObb8hNW8l0KD4/7wQBTdOELdSrp6VMhEcfw8cR7E0+IHloyqQT1ujROL
cdyuWyeSwVokP3VzJUBWpxeX2T7RH+FhqGfC0hrLmdkpL/uqHCwXWlhNZxcZwJZw
9tVA2WGg3ORt7LhTj/BUHtInpBrJPGaWHv6WZm/TMj9sw58lb9JHL+CeiwW7cCYW
AN5gzVRXO7mJD8XneeZVtSLkRqaG1uWZIdVhjfNZeGPBxOoC68Dq0jcAFWmeWReW
ZzRvK59/9b5pPXQKM2gUMN8FSvio2ihukbgJ2+zj4f6ijI6hYXWUaMWUrzrlkhr1
/d+hWWAcWitekVc2NGJuo1jz335Cmoy1TZn9xZMRVfR7l/SBK/mRl24+eS2IZUkC
hAUsdO+XxTcjYQboT6gJB5kRjjw0GggNyTffBswvTf0Y+y54KqK2y94V59n+VaaY
KjkA7sEEx8HhsP0Jecizo7utaxKXIZW/CDLOopS1W8L4ufso5Vw=
=aTIg
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.16
- Add SDHI, ICU, I2C, PMIC, and GPU support on the RZ/G3E SoC and the
RZ/G3E SoM and SMARC Carrier-II EVK development board,
- Add internal SDHI regulator support on the RZ/V2H(P) SoC,
- Add UFS tuning parameters in E-FUSE on the R-Car S4-8 ES1.2 SoC,
- Add support for Ethernet ports C and D, I2C, keys, and SDHI on the
RZ/N1D SoC and the RZN1D-DB and RZN1D-EB development and expansion
boards,
- Add initial support for the RZ/V2N (R9A09G056) and the RZ/V2N EVK
board,
- Add support for the Retronix Sparrow Hawk board, which is based on
R-Car V4H ES3.0,
- Add ISP core support on R-Car V3U, V4H, and V4M,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (29 commits)
arm64: dts: renesas: r8a779h0: Add ISP core function block
arm64: dts: renesas: r8a779g0: Add ISP core function block
arm64: dts: renesas: r8a779a0: Add ISP core function block
arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support
arm64: dts: renesas: rzg3e-smarc-som: Enable Mali-G52
arm64: dts: renesas: r9a09g047: Add Mali-G52 GPU node
arm64: dts: renesas: rzg3e-smarc-som: Add RAA215300 pmic support
arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol
ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe SD card port
ARM: dts: renesas: r9a06g032: Describe SDHCI controllers
arm64: dts: renesas: Add initial device tree for RZ/V2N EVK
arm64: dts: renesas: Add initial SoC DTSI for RZ/V2N
dt-bindings: pinctrl: renesas: Document RZ/V2N SoC
dt-bindings: clock: renesas: Document RZ/V2N SoC CPG
dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC
dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK
ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe keys
ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe I2C bus
ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe I2C bus
ARM: dts: renesas: r9a06g032: Describe I2C controllers
...
Link: https://lore.kernel.org/r/cover.1745582596.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document Retronix R-Car V4H Sparrow Hawk board based on Renesas R-Car V4H ES3.0
(R8A779G3) SoC. This is a single-board computer with single gigabit ethernet,
DSI-to-eDP bridge, DSI and two CSI2 interfaces, audio codec, two CANFD ports,
micro SD card slot, USB PD supply, USB 3.0 ports, M.2 Key-M slot for NVMe SSD,
debug UART and JTAG.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Tested-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250420173829.200553-3-marek.vasut+renesas@mailbox.org
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the RZ/V2N (R9A09G056) variant to the existing RZ/V2H(P) System
Controller (SYS) binding, as both IPs are very similar.
However, they have different SoC IDs, and the RZ/V2N does not have
PCIE1 configuration registers, unlike the RZ/V2H(P) SYS IP. To handle
these differences, introduce a new compatible string
`renesas,r9a09g056-sys`.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250407191628.323613-4-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document the Renesas RZ/V2N (R9A09G056) SoC variants, distinguishing
between configurations with and without specific hardware features such
as GPU, ISP, and cryptographic extensions. Also, document the
"renesas,rzv2n-evk" compatible string for the RZ/V2N EVK board.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250407191628.323613-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document the MYIR Remi Pi" which is based on the Renesas
RZ/G2L ("R9A07G044L2") SoC.
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Julien Massot <julien.massot@collabora.com>
Link: https://lore.kernel.org/20250131-myir-remi-pi-v3-1-2dda53e79291@collabora.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add the RZ/G3E (R9A09G047) variant to the existing RZ/V2H System
Controller (SYS) binding as both IPs are very similar.
They however have different SoC IDs, RZ/G3E has VSP control register
compared to RZ/V2H SYS IP. Hence introduce a new compatible string
renesas,r9a09g047-sys to handle these differences.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: John Madieu <john.madieu.xa@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250123170508.13578-3-john.madieu.xa@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
DT bindings and binding definitions for the Renesas RZ/G3E (R9A09G047)
SoC, shared by driver and DT source files.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZ1wIdAAKCRCKwlD9ZEnx
cOEoAQCwqQx+/KkB++5y6zBQRmUf6vQaQJ65UgfVUG50xj7ojQEAm7Vx6rYhTnv0
L7a+yWQCdjvpbUNwiFa3sz5KU0jPrwA=
=Jx4b
-----END PGP SIGNATURE-----
Merge tag 'renesas-r9a09g047-dt-binding-defs-tag1' into renesas-dts-for-v6.14
Renesas RZ/G3E DT Binding Definitions
DT bindings and binding definitions for the Renesas RZ/G3E (R9A09G047)
SoC, shared by driver and DT source files.
Document the Renesas RZ/G3E SMARC Carrier-II EVK board which is based
on the Renesas RZ/G3E SMARC SoM. The RZ/G3E SMARC Carrier-II EVK
consists of an RZ/G3E SoM module and a SMARC Carrier-II carrier board.
The SoM module sits on top of the carrier board.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241203105005.103927-4-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document the compatible value for the Renesas R-Car V4H ES3.0
(R8A779G3) SoC, as used on the Renesas White Hawk Single board.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/1d2d2a6cbf31c817f574f6eed310a960e6175afe.1733156661.git.geert+renesas@glider.be
Move the R8A779G0-only White Hawk board stack section up, just below the
R8A779G0-only White Hawk CPU section, to improve sort order.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Link: https://lore.kernel.org/d553ef4b1f969f72e384f274d42ac7a62fe45fd4.1733156661.git.geert+renesas@glider.be
- Add support for Ethernet TSN and PCIe on the R-Car V4H SoC and the
White-Hawk (Single) development board,
- Add display support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVk
board,
- Add I2C support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board,
- Add support for HDMI audio on the RZ/G2L and RZ/G2LC SMARC EVK
boards,
- Add initial support for the RZ/V2H(P) (R9A09G057) SoC and the RZ/V2H
EVK board,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZtceEQAKCRCKwlD9ZEnx
cE75APwIoaxcGqJtBI0qPUt2h2zSUPlRxGAE/PJI9mghY4JRmQD+IYyj9ovxNlmR
b4xgOpKvHnYou8UK2p5289wbFLVZgA4=
=QPgq
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmbZhFgACgkQYKtH/8kJ
UicxExAAhFLpkige1Uy6SXTQWeJVR6JW+bTHp+9teeSWow9GZ0CIKU69vKNood7z
K+vwlH10zOQkR1+v6vKjE0DyVwpCz1cMW1eHurgJW5Prhm0TloF6SC026F1upcz1
D3nGsfe20MZUpuUMUGJv1SJlQYEHLKa523ClFMWDgPHmP0dFFTGjYgh/HsYXaiG+
0LPzOe+0bRa1RokhpYlULwx7I9dGubjlftTmTd5nIQ/ucpBYiWVv+vieuNvJ1g6q
0wDbhKRcbAQRtJLgP08B5sPTBJD0lQ+rFZ1e9qAnLvjlqV82AdLIfqh0EaSQfKMG
puvVfsEpL2WRE30G1BbMWx18Esfewo0jyeRKSOMjpDqNhIMJN5DzAtviAfeFTu7u
iYR9ZplLs0MJUS6UoKZdPhNKgW0zbG8nbXCNMyxrcDXxXHNLXmoAu20AGGLEHZF1
2sDRE0IK5G8fbY71VlFMKJKmfVy6fkvoTywqBZ8CHQT0wEBp/ZQzP88kE/qaVOkW
D1PLPLD1zjZVm5v1VK6S+OncSqE0DawQpc7j5v0RTAH90ZkEV/rOzyRw63cC0/zr
CA9CZnwTMULWxAys2vjBpgE2KNgr852tyPTaZ/9Wgl5aMGjWTkUp6N8oOJQQjVY5
jwX6QwLMJuBLraRSmdMkzH3X4jvyGeEDcVjl2UY+3owGcxMREjI=
=tnwU
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.12-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.12 (take two)
- Add support for Ethernet TSN and PCIe on the R-Car V4H SoC and the
White-Hawk (Single) development board,
- Add display support for the RZ/G2UL SoC and the RZ/G2UL SMARC EVk
board,
- Add I2C support for the RZ/G3S SoC and the RZ/G3S SMARC EVK board,
- Add support for HDMI audio on the RZ/G2L and RZ/G2LC SMARC EVK
boards,
- Add initial support for the RZ/V2H(P) (R9A09G057) SoC and the RZ/V2H
EVK board,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.12-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (34 commits)
arm64: dts: renesas: r8a779h0: Add family fallback for CSISP IP
arm64: dts: renesas: r8a779a0: Add family fallback for CSISP IP
arm64: dts: renesas: r8a779g0: Add family fallback for CSISP IP
arm64: dts: renesas: r8a779h0: Add family fallback for VIN IP
arm64: dts: renesas: r8a779a0: Add family fallback for VIN IP
arm64: dts: renesas: r8a779g0: Add family fallback for VIN IP
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable watchdog
arm64: dts: renesas: r9a09g057h44-rzv2h-evk: Enable OSTM, I2C, and SDHI
arm64: dts: renesas: r9a09g057: Add WDT0-WDT3 nodes
arm64: dts: renesas: r9a09g057: Add SDHI0-SDHI2 nodes
arm64: dts: renesas: r9a09g057: Add RIIC0-RIIC8 nodes
arm64: dts: renesas: r9a09g057: Add OSTM0-OSTM7 nodes
arm64: dts: renesas: Add initial DTS for RZ/V2H EVK board
arm64: dts: renesas: Add initial SoC DTSI for RZ/V2H(P) SoC
dt-bindings: soc: renesas: Document RZ/V2H EVK board
dt-bindings: clock: renesas: Document RZ/V2H(P) SoC CPG
arm64: dts: renesas: r9a07g043u11-smarc: Enable DU
arm64: dts: renesas: rzg2lc-smarc: Enable HDMI audio
arm64: dts: renesas: rzg2l-smarc: Enable HDMI audio
arm64: dts: renesas: r9a07g043u: Add DU node
...
Link: https://lore.kernel.org/r/cover.1725374275.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add DT binding documentation for System Controller (SYS) found on
RZ/V2H(P) ("R9A09G057") SoC's.
SYS block contains the SYS_LSI_DEVID register which can be used to
retrieve SoC version information.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240227232531.218159-3-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add a pattern for the Renesas Gray Hawk Single board (based on the R-Car
V4M SoC).
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240227220930.213703-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Compatibles can come in two formats. Either "vendor,ip-soc" or
"vendor,soc-ip". Add a DT schema file documenting Renesas preferred
policy and enforcing it for all new compatibles, except few existing
patterns.
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240213224259.2967533-1-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit ensures the preservation of the order of SoCs according to
their part numbers.
Fixes: 9c57c4a9a4 ("dt-bindings: soc: renesas: Document Renesas RZ/G3S SoC variants")
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20240208120455.48009-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document the compatible values for the Renesas R-Car V4H ES2.0
(R8A779G2) SoC and the Renesas White Hawk Single board.
The former is an updated version of R-Car V4H (R8A779G0).
The latter is a single-board integration of the Renesas White Hawk CPU
and Breakout board stack.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/a44d990c962c8e0aac3b133eaa563f8c92b2ce29.1706192990.git.geert+renesas@glider.be
- Improve audio clock accuracy on the RZ/{G2L,G2LC,V2L} SMARC EVK
development boards,
- Add FLASH support for the Renesas Bock-W development board,
- Add L2 cache and non-coherent DMA support on the RZ/Five SoC and the
RZ/Five SMARC development board,
- Add initial support for the RZ/G3S SoC and the RZ/G3S SMARC SoM and
SMARC Carrier-II EVK development boards,
- Add initial support for the R8A779F4 variant of the R-Car S4-8 SoC
and the R-Car S4 Starter Kit development board,
- Apply DT overlays to base DTBs to improve validation and usability.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZSkx1QAKCRCKwlD9ZEnx
cPRnAP9I5dtR2xpi5qNeEOCdWmyRXLndJ3fVzhQJkPrytjIuhQD/alIpNXsEZD08
+BUSN+3SZDfmyExNYbgUlhsVqkqEywE=
=avuX
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmUprLIACgkQYKtH/8kJ
UiedcQ/+IK8POuuE10T++//UNAeloqNZ+MOblCTTFc6Tvn8nqphA3ebmrY3myKNo
UY+tKcPOSz3koWJPAZ6GAPRATa+XAUyx+IVfy7NGPfIP9zgglmiGJlLfL908xOkR
M905CGRfSIr7u2qgQX/tBVkougIplHJPjgWpX9r6ypQtvsO1hOt5SABdX/kSeSfq
M3SQ7f6dV7fSplw7sdx6yyxEPMQxhXt7kGBobuPTaZnFGWT6F+dAjS9CettKsTwV
+n4Cw2zoK3CgpvVQGgW7mzRZ4XxxVPBBDULYT1P5cFc5XQlrU3PscBwofhAYj/qG
dhwuobByTeXux1f6Bi3dOHCQ7yZvJpiZdm/4Jat8lBkl/8Flo+EqWHs6E80nNDhr
Q4huloIjlKj9f/aXb89Nbh1b7Nre21Qv1RXBPGaF7JkguCTsTn4WofMJ7OPoIYDS
hRYuKZv2QgK5iB8DDvZaZ5rkypnhu2runuDtX01OSlIPJ2nC12Z3rNNtTJtUCWi0
LLHiNaB0r4eTTYtHtvy4421wOGr+E2rwlWfHGbLG+M4UmK2NRv+nX04vDGQiyfQy
WrxY2ksFikVHj+nWVQPmhfC6T8F8OJmPNZ/nPOnv+66Ns48lYya0pt00Piqe7ueF
hX7MSNBiD56cNC5lV/3lxg4T2ijHLTCFsrgqTU9+RZR7+/alGA8=
=e3Zm
-----END PGP SIGNATURE-----
Merge tag 'renesas-dts-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.7 (take two)
- Improve audio clock accuracy on the RZ/{G2L,G2LC,V2L} SMARC EVK
development boards,
- Add FLASH support for the Renesas Bock-W development board,
- Add L2 cache and non-coherent DMA support on the RZ/Five SoC and the
RZ/Five SMARC development board,
- Add initial support for the RZ/G3S SoC and the RZ/G3S SMARC SoM and
SMARC Carrier-II EVK development boards,
- Add initial support for the R8A779F4 variant of the R-Car S4-8 SoC
and the R-Car S4 Starter Kit development board,
- Apply DT overlays to base DTBs to improve validation and usability.
* tag 'renesas-dts-for-v6.7-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (25 commits)
arm64: dts: renesas: Apply overlays to base dtbs
arm64: dts: renesas: rzg3s-smarc-som: Spelling s/device-type/device_type/
arm64: dts: renesas: r9a08g045: Add missing cache-level for L3 cache
arm64: dts: renesas: r9a08g045: Add nodes for SDHI1 and SDHI2
arm64: dts: renesas: ebisu: Document Ebisu-4D support
arm64: dts: renesas: Add R-Car S4 Starter Kit support
arm64: dts: renesas: Add Renesas R8A779F4 SoC support
arm64: dts: renesas: Add initial device tree for RZ/G3S SMARC EVK board
arm64: dts: renesas: Add initial device tree for RZ SMARC Carrier-II Board
arm64: dts: renesas: Add initial support for RZ/G3S SMARC SoM
arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC
riscv: dts: renesas: rzfive-smarc: Enable the blocks which were explicitly disabled
riscv: dts: renesas: r9a07g043f: Add dma-noncoherent property
riscv: dts: renesas: r9a07g043f: Add L2 cache node
ARM: dts: renesas: bockw: Add FLASH node
arm64: dts: renesas: rz-smarc: Use versa3 clk for audio mclk
dt-bindings: clock: renesas,rzg2l-cpg: Document RZ/G3S SoC
clk: tegra: fix error return case for recalc_rate
clk: si521xx: Fix regmap write accessor
clk: si521xx: Use REGCACHE_FLAT instead of NONE
...
Link: https://lore.kernel.org/r/cover.1697200123.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document properly that Ebisu-support includes the Ebisu-4D variant, so
there won't be confusion what happened with support for this board.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231004152751.3917-1-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document the Renesas SMARC Carrier-II EVK board which is based on the
Renesas RZ/G3S SMARC SoM. The SMARC Carrier-II EVK consists of an
RZ/G3S SoM module and a SMARC Carrier-II carrier board; the SoM module
sits on top of the carrier board.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230929053915.1530607-27-claudiu.beznea@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document RZ/G3S (R9A08G045) SYSC bindings. The SYSC block found on the
RZ/G3S SoC is similar to the one found on the RZ/G2UL.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230912045157.177966-4-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cleanup bindings dropping the last remaining unneeded quotes. With this,
the check for this can be enabled in yamllint.
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> # for mtd
Acked-by: Sudeep Holla <sudeep.holla@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Wolfram Sang <wsa@kernel.org> # for AT24/I2C
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230823183749.2609013-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
R-Car H3 ES1.* was only available to an internal development group and
needed a lot of quirks and workarounds. These become a maintenance
burden now, so our development group decided to remove upstream support
and disable booting for this SoC. Public users only have ES2 onwards.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230307105645.5285-4-wsa+renesas@sang-engineering.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Enable yamllint to check the preferred commenting style of requiring a
space after a comment character '#'. Fix the cases in the tree which
have a warning with this enabled. Most cases just need a space after the
'#'. A couple of cases with comments which were not intended to be
comments are revealed. Those were in ti,sa2ul.yaml, ti,cal.yaml, and
brcm,bcmgenet.yaml.
Acked-by: Jakub Kicinski <kuba@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> # drm/msm
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20230303214223.49451-1-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Add "renesas,rzn1d400-eb" which target the RZ/N1 EB board when an
RZ/N1D-DB daughter board is plugged on it.
Signed-off-by: Clément Léger <clement.leger@bootlin.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20230209133507.150571-2-clement.leger@bootlin.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Add DT binding documentation for System Configuration (SYS) found on
RZ/V2M SoC's.
SYS block contains the SYS_VERSION register which can be used to retrieve
SoC version information.
Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20221116102140.852889-2-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
renesas.yaml lists out all the Renesas SoC's and the platforms/EVK's which
is either ARM32/ARM64. It would rather make sense if we move renesas.yaml
to the soc/renesas folder instead. This is in preparation for adding a new
SoC (RZ/Five) from Renesas which is based on RISC-V.
While at it drop the old entry for renesas.yaml from MAINTAINERS file and
there is no need to update the new file path of renesas.yaml as we already
have an entry for Documentation/devicetree/bindings/soc/renesas/ folder.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220920184904.90495-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Document RZ/Five (R9A07G043) SYSC bindings. The SYSC block found on the
RZ/Five SoC is almost identical to one found on the RZ/G2UL (and alike)
SoC's. "renesas,r9a07g043-sysc" compatible string will be used on the
RZ/Five SoC so to make this clear, update the comment to include RZ/Five
SoC.
The SYSC block on RZ/Five has no interrupts to the core so to accommodate
this SoC make interrupts{,-names} properties optional.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220722141506.20171-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
The Renesas RZ/{G2L,V2L} System Controller (SYSC) DT binding is not
really a power-related DT binding, hence it does not belong under
Documentation/devicetree/bindings/power/.
Move it to Documentation/devicetree/bindings/soc/renesas/.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/a47015888f99476a5206a556dce93503494d9a73.1651495078.git.geert+renesas@glider.be
