Drop common properties already defined in referenced common Qualcomm SoC
TLMM bindings and use "unevaluatedProperties: false". This makes the
binding smaller and easier to review. Additionally this allows now
"wakeup-parent" property coming from common TLMM bindings.
In few places move the "required:" block to bottom, to match convention.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231208215534.195854-10-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
All Qualcomm SoC Top Level Mode Multiplexer pin controllers have similar
capabilities regarding pin properties, thus we can just accept entire
set provided by qcom,tlmm-common.yaml schema.
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20230407184546.161168-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Several minor cleanups and fixes on Qualcomm pin controller Devicetree
bindings - add missing input-disable, correct GPIO pin name patterns in
bindings, correct number of GPIOs in gpio-ranges property.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmPiiaoQHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1+75EACXetz0bN1O8oUhwUv2mbcWoWYvy2QnfJZi
NbqnAdFjfk66p1uNBPvVV2DxRuSiGaXsH5KJRP6WY805QGF4lfVZVsaaQkl4Dug8
yjolquoV8kOuxfY2G/TI8VuTp5OK9yHnti21KGB7l0kdYc5OwbjgKkB+DBo8QZ3K
6kW5EmRjqbGZ8ED0/Ymj6K55YPARCx/IoCA1vedl770IqTEIZsag49n9r+c4IqVg
Sx7pgAhZm01XyHpQdLAc5pfmvZffGYLRr3cFhBVlA8hwVGgjdDza+AMJMoJ2rJxT
bL2/2io3FRWr0Fi3iFJObDz2rapNqbnypr4lBeKZXMGl81yQi0hwraaVJWc0+n+x
3JGD/CHWFWD4XFVO7ZO9KwZzexmuIkupMmr4FV0fgr+M6HsNyaGjpc+BNoFk1NNK
jM0l0+Lazgao3WbpKLaPyvXnoBVF2/HrG1l++wRp2+LpytHStxFmFtmUGsYP0w25
YAUmeJF2RkTQ6uZebLpCf3q0kNgfeHqv2M6Qjz4Acb5FfQSjkuHwyeiPhGgS6TUf
8ZTA26Mp8oPc6pntZUVvwHljZ8jXN5wzh+TheCAHCfAyPKOJoHdOr6+sQQEG0rc7
5J2Hd1wm4FhK197PH8lmUUYC/hfcl8MyOn8iY/jq9grN0e7lkmLbxl2r86DUNcWu
Cv1sFd7d1w==
=VNb/
-----END PGP SIGNATURE-----
Merge tag 'qcom-pinctrl-6.3-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel
Qualcomm pinctrl Devicetree bindings changes for v6.3, part two
Several minor cleanups and fixes on Qualcomm pin controller Devicetree
bindings - add missing input-disable, correct GPIO pin name patterns in
bindings, correct number of GPIOs in gpio-ranges property.
The MSM8226 TLMM pin controller has GPIOs 0-116, so correct the pattern
to bring back missing 107-109.
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230202104452.299048-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Set of cleanups and fixes for Qualcomm pin controller bindings, to match
existing DTS and correct the schema.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmPK0z0QHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD1/SQD/wJg0b+a76FBFbckFglgxhi90jsTZo3lXG9
TCZzZzVIl2pGGipxPpAzrrIQ5F7nF9HdD0ngirxWZjJB8tubeTXav0G/5Mnh9uLq
RcQcDKpMZAoH8g/C+tN9DOBq8WeGeAN+dSSBE3nfMsHN5JnbADbgWkVHf57WYfMq
2kh0609JUcgg5rqg3GxhOJqQfbyDMK3EC+fyqkuqiBacT9uRXlbwzqQ4cDmNlVi9
4SFbnDHXNXhsykhegz6bZU+nwepumnoPMXuTWjspSoSeeb1anQNDe8lR+x7i2kJA
1V6AOC/mpllxU4n6RenVq9+ASEsa6oQ/TKNu5+oGalvQPAnFoTKk0c7TbZTecFC6
pM0ograh1bNTUqDxw4LNCF6QVDcjTci2h0vXWKk8MFVTJgOUfBg6u5Yh824Q7yDk
crrNaMxwL2et6q0tNmcEuXqtLHLiwhmh0qflMgXU/+iHCfIohepE4ktjLSduvUCo
bvM+xAbZl9l4jlATbOJNQ3LGEKBAjlZAbYhb4imWR1ndW6MhXMYf4AjEB9pgeM8S
bXC9kdfcqG1WxwVq+LNY9kYZ43dUhARzQmueY49QLEiTHJeHVHVD+FlqjBH9KZ/g
jjMAE+VYXxt3cmvSVbTurH802BKzAskdDlsySTjEvGKbXxP6InFb9jb75EScYLP3
Xl2k476vIg==
=RdQE
-----END PGP SIGNATURE-----
Merge tag 'qcom-pinctrl-6.3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-dt into devel
Qualcomm pinctrl Devicetree bindings changes for v6.3
Set of cleanups and fixes for Qualcomm pin controller bindings, to match
existing DTS and correct the schema.
Almost all Qualcomm SoC Top Level Mode Multiplexers come with only
summary interrupt. SM6350 is different because downstream and upstream
DTS have nine of the interrupts. Allow such variation.
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221230135645.56401-7-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Document the general purpose clock functions that are found on MSM8226.
Signed-off-by: Matti Lehtimäki <matti.lehtimaki@gmail.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230106114403.275865-2-matti.lehtimaki@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Drop "binding" from description, because the field should describe the
hardware.
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20221017230012.47878-34-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
The MSM8226 pinctrl driver supports input-enable, blsp_i2c4, blsp_uart4
and sdc3 functions and DTS already uses it:
qcom-msm8226-samsung-s3ve3g.dtb: pinctrl@fd510000: 'blsp1-i2c1', 'blsp1-i2c2', 'blsp1-i2c3', 'blsp1-i2c4', 'blsp1-i2c5' ...
qcom-apq8026-lg-lenok.dtb: pinctrl@fd510000: touch-state: 'oneOf' conditional failed, one must be fixed:
'input-enable' does not match any of the regexes: 'pinctrl-[0-9]+'
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-17-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reference common Qualcomm TLMM pin controller schema, to bring common
properties, other pinctrl schemas and additional checks, like function
required only for GPIOs.
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-16-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
The TLMM pin controller follows generic pin-controller bindings, so
should have subnodes with '-state' and '-pins'. Otherwise the subnodes
(level one and two) are not properly matched. This method also unifies
the bindings with other Qualcomm TLMM and LPASS pinctrl bindings.
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20221016170035.35014-15-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Also fix some examples to avoid warnings like:
brcm,ns-pinmux.example.dt.yaml: pin-controller@1800c1c0: $nodename:0: 'pin-controller@1800c1c0' does not match '^pinctrl|pinmux@[0-9a-f]+$'
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211202063216.24439-1-zajec5@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Add device tree binding Documentation details for Qualcomm msm8226
pinctrl driver.
- Bindings documentation was based on qcom,ipq6018-pinctrl.yaml added by
Sricharan R <sricharan@codeaurora.org> and then modified for msm8226
content
Signed-off-by: Bartosz Dudziak <bartosz.dudziak@snejp.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200716205530.22910-2-bartosz.dudziak@snejp.pl
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
