Previous Refclk of i.MX95 PCIe RC is on when system boot to kernel. But
boot firmware change the behavior, it is off when boot. So it must be
turned on when it is used. Also it needs be turned off/on for suspend and
resume.
Add one Refclk for i.MX95 PCIe RC. Increase clocks' maxItems to 5 and keep
the same restriction with other compatible string.
Link: https://lore.kernel.org/r/20241126075702.4099164-2-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add new compatible string fsl,imx8q-pcie-ep for iMX8Q.
The 'reg-names' property only needs 'dbi' and 'addr_space' because the
others are located at a default offset. The new 'clock-names' property
aligns with the Root Complex (RC) naming.
Link: https://lore.kernel.org/r/20241119-pci_fixup_addr-v8-5-c4bfa5193288@nxp.com
Signed-off-by: Frank Li <Frank.Li@nxp.com>
[kwilczynski: commit log]
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Add reg-name: "dbi2", "atu" for i.MX8M PCIe Endpoint.
For i.MX8M PCIe EP, the dbi2 and atu addresses are pre-defined in the
driver. This method is not good.
In commit b7d67c6130 ("PCI: imx6: Add iMX95 Endpoint (EP) support"),
Frank suggests to fetch the dbi2 and atu from DT directly. This commit is
preparation to do that for i.MX8M PCIe EP.
These changes wouldn't break driver function. When "dbi2" and "atu"
properties are present, i.MX PCIe driver would fetch the according base
addresses from DT directly. If only two reg properties are provided, i.MX
PCIe driver would fall back to the old method.
Link: https://lore.kernel.org/linux-pci/1723534943-28499-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
assigned-clocks are a dependency of clocks, however the dtschema has
limitation and expects clocks to be present in the binding using
assigned-clocks, not in other referenced bindings. The clocks were
defined in common fsl,imx6q-pcie-common.yaml, which is referenced by
fsl,imx6q-pcie-ep.yaml. The fsl,imx6q-pcie-ep.yaml used assigned-clocks
thus leading to warnings:
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.example.dtb: pcie-ep@33800000:
Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
From schema: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml
Fix this by moving clocks to each specific schema from the common one
and narrowing them to strictly match what is expected for given device.
Fixes: b10f82380e ("dt-bindings: imx6q-pcie: Restruct i.MX PCIe schema")
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Link: https://lore.kernel.org/r/20230508071837.68552-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Restruct i.MX PCIe schema, derive the common properties, thus they can
be shared by both the RC and Endpoint schema.
Update the description of fsl,imx6q-pcie.yaml, and move the EP mode
compatible to fsl,imx6q-pcie-ep.yaml.
Add support for i.MX8M PCIe Endpoint modes, and update the MAINTAINER
accordingly.
Link: https://lore.kernel.org/r/1676441915-1394-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
