Commit Graph

5 Commits

Author SHA1 Message Date
Richard Zhu
d4627402bd dt-bindings: PCI: fsl,imx6q-pcie: Add Refclk for i.MX95 RC
Previous Refclk of i.MX95 PCIe RC is on when system boot to kernel. But
boot firmware change the behavior, it is off when boot. So it must be
turned on when it is used. Also it needs be turned off/on for suspend and
resume.

Add one Refclk for i.MX95 PCIe RC. Increase clocks' maxItems to 5 and keep
the same restriction with other compatible string.

Link: https://lore.kernel.org/r/20241126075702.4099164-2-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-01-16 14:18:24 -06:00
Richard Zhu
671a89c451 dt-bindings: imx6q-pcie: Add imx95 pcie compatible string
Add i.MX95 PCIe "fsl,imx95-pcie" compatible string and
"atu" and "app" to reg-names.

Link: https://lore.kernel.org/r/20240220161924.3871774-10-Frank.Li@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
2024-03-04 09:54:43 +01:00
Frank Li
3bcbdb65bf dt-bindings: imx6q-pcie: Clean up duplicate clocks check
The bindings referencing this file already define these constraints for
each of the variants, so the if not: then: is redundant.

Link: https://lore.kernel.org/r/20240220161924.3871774-8-Frank.Li@nxp.com
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2024-03-04 09:54:43 +01:00
Krzysztof Kozlowski
8bbec86ce6 dt-bindings: PCI: fsl,imx6q: fix assigned-clocks warning
assigned-clocks are a dependency of clocks, however the dtschema has
limitation and expects clocks to be present in the binding using
assigned-clocks, not in other referenced bindings.  The clocks were
defined in common fsl,imx6q-pcie-common.yaml, which is referenced by
fsl,imx6q-pcie-ep.yaml.  The fsl,imx6q-pcie-ep.yaml used assigned-clocks
thus leading to warnings:

  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.example.dtb: pcie-ep@33800000:
    Unevaluated properties are not allowed ('assigned-clock-parents', 'assigned-clock-rates', 'assigned-clocks' were unexpected)
  From schema: Documentation/devicetree/bindings/pci/fsl,imx6q-pcie-ep.yaml

Fix this by moving clocks to each specific schema from the common one
and narrowing them to strictly match what is expected for given device.

Fixes: b10f82380e ("dt-bindings: imx6q-pcie: Restruct i.MX PCIe schema")
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Richard Zhu <hongxing.zhu@nxp.com>
Link: https://lore.kernel.org/r/20230508071837.68552-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-05-09 08:01:49 +02:00
Richard Zhu
b10f82380e dt-bindings: imx6q-pcie: Restruct i.MX PCIe schema
Restruct i.MX PCIe schema, derive the common properties, thus they can
be shared by both the RC and Endpoint schema.

Update the description of fsl,imx6q-pcie.yaml, and move the EP mode
compatible to fsl,imx6q-pcie-ep.yaml.

Add support for i.MX8M PCIe Endpoint modes, and update the MAINTAINER
accordingly.

Link: https://lore.kernel.org/r/1676441915-1394-2-git-send-email-hongxing.zhu@nxp.com
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
2023-04-07 09:52:26 +02:00