Drivers:
- Add support for the IA55 interrupt controller on RZ/G3S SoC's
- Update/fix the Qualcom MPM Interrupt Controller driver's
register enumeration within the somewhat exotic "RPM Message RAM"
MMIO-mapped shared memory region that is used for other purposes
as well.
- Clean up the Xtensa built-in Programmable Interrupt Controller
driver (xtensa-pic) a bit.
Signed-off-by: Ingo Molnar <mingo@kernel.org>
-----BEGIN PGP SIGNATURE-----
iQJFBAABCgAvFiEEBpT5eoXrXCwVQwEKEnMQ0APhK1gFAmWbygsRHG1pbmdvQGtl
cm5lbC5vcmcACgkQEnMQ0APhK1gglw//dZ0+4OI3yupEVWZDzkhbtEK3BB8U2RPJ
UnmQXCrLtcM2vuW0cqtbbZ3kjFkFIjRvo9AujboCY1DzmM6ZeoKdnYRfcTEMA9Wt
fhX5Fkt0BqVsZZS92yVI8fl9l61QOOGUKEa+omG0QcpHbjkZsmujrSJvIQjXhvS3
LpQDFozPQeIIn/MO7hBykEri7gnYo5qIylBouXgDFz3I6qpWo5x0qlrIsqiNWfLb
Fk5ClTQluy7/jfSm1Nbm72ik/V0jAJyaawNWYa652VZYvN0jHXnWcHvCw4WanUQ6
wPDiDp3EkKCjbAgY10fYdWqUFLi4k+o58HhDa3xNZA7Q8dbpfBvfpo79PeN1jR+M
lL144dhkNJfTXTpGjdi7BJMnwzG9k6YB0q0TGj9gJp+B7LU4/E0sdpGWfCZR2BU5
r9Bu4aaEuLAmQSmtWBo/GCr+yGqKZPXo9WUCTbgkikV3TMC8ksotj12+Qr78f9Mq
2ZdgnDhlsrXPN7szdh2naxCxBjuAzSvj96Z0s/KY8xE30PcTRzftnSYyd26wGTqD
SFrUPkx7QYV4aR+dAuxbZ4dpk+APLMaxap3js/j3BE+nVhGLZodHEXBmHEDiqc/+
QkFA9gtpIEX6HDoEMAu7ubFJF0x7Nxf5MU3QdvTuOXyMsteccyrA0k9l6bE55LAC
5ss/CLW9wzo=
=YamS
-----END PGP SIGNATURE-----
Merge tag 'irq-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq subsystem updates from Ingo Molnar:
- Add support for the IA55 interrupt controller on RZ/G3S SoC's
- Update/fix the Qualcom MPM Interrupt Controller driver's register
enumeration within the somewhat exotic "RPM Message RAM" MMIO-mapped
shared memory region that is used for other purposes as well
- Clean up the Xtensa built-in Programmable Interrupt Controller driver
(xtensa-pic) a bit
* tag 'irq-core-2024-01-08' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
irqchip/irq-xtensa-pic: Clean up
irqchip/qcom-mpm: Support passing a slice of SRAM as reg space
dt-bindings: interrupt-controller: mpm: Pass MSG RAM slice through phandle
dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3S
irqchip/renesas-rzg2l: Add support for suspend to RAM
irqchip/renesas-rzg2l: Add macro to retrieve TITSR register offset based on register's index
irqchip/renesas-rzg2l: Implement restriction when writing ISCR register
irqchip/renesas-rzg2l: Document structure members
irqchip/renesas-rzg2l: Align struct member names to tabs
irqchip/renesas-rzg2l: Use tabs instead of spaces
Due to the wild nature of the Qualcomm RPM Message RAM, the kernel can't
really use 'reg' to point to the MPM's slice of Message RAM without cutting
into an already-defined RPM MSG RAM node used for GLINK and SMEM.
Document passing the register space as a slice of SRAM through the
qcom,rpm-msg-ram property. This also makes 'reg' deprecated.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230328-topic-msgram_mpm-v7-1-6ee2bfeaac2c@linaro.org
