Add SDX75 and SA8775p compatibles to respective if:then: blocks to
narrow their properties and add a new section for SM8650 with four 'reg'
and 'interrupts' (top-level already allows four).
SA8755p DTS comes without interrupts, but only because they might not
be available for OS under given firmware.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
List cannot have 0 items, so 'minItems: 1' in each if:then: is
redundant.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
When narrowing properties per variant, the 'interrupt-names' should have
the same constraints as 'interrupts'. Add missing upper bound on the
property.
Fixes: e690032024 ("dt-bindings: cpufreq: cpufreq-qcom-hw: Add QCM2290")
Fixes: 7ae24e054f ("dt-bindings: cpufreq: cpufreq-qcom-hw: Sanitize data per compatible")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Add a SoC-specific compatible for SC8180X. It has 2 domains and uses
the older, non-EPSS hardware.
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Add compatible for the cpufreq engine representing support on SA8255p.
Signed-off-by: Nikunj Kela <quic_nkela@quicinc.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Document the CPUFREQ Hardware on the SM8650 Platform.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
The bindings for Qualcomm CPU frequency have a compatible for each SoC.
Add the compatible for SDM670.
Fixes: 0c665213d1 ("arm64: dts: qcom: sdm670: add cpu frequency scaling")
Signed-off-by: Richard Acayan <mailingradian@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
On new platforms, a 4th frequency domain is used, document it.
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Document the OSM CPUFREQ_HW present on QCM2290, featuring just one
lonely frequency domain.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Introduce per-SoC compatibles for OSM targets (read: pre-sm8250) and
sanitize the number of interrupt{s,-names} and reg/-names per-compatible.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Some SoCs implementing CPUFREQ-HW only have a single frequency domain.
Allow such case.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Add the compatible for the cpufreq engine present on sa8775p platforms.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
- Enable thermal cooling for Tegra194 (Yi-Wei Wang).
- Register module device table and add missing compatibles for
cpufreq-qcom-hw (Nícolas F. R. A. Prado, Abel Vesa and Luca Weiss).
- Various dt binding updates for qcom-cpufreq-nvmem and opp-v2-kryo-cpu
(Christian Marangi).
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEx73Crsp7f6M6scA70rkcPK6BEhwFAmPrHSwACgkQ0rkcPK6B
Ehww0Q//e2vfx0K3lc7F7rJGpSxWJeXoxgM+POh8aKHQw+ivni2YV08QSZMFlWkB
X9QI02vcuKgTMw8Xj07+QMh/KTr4GCm3Ii+2EGK3sZaktLsQLmeNyXJ/QxG5shfi
7BfRSF5zzkcQXDn622WzW/qC08IbSiPAHjlDxjowPapZcuGopsyzYXNB0fQxn647
R9fWYKR5TtnHyqpIDMOjr1EKi88Cinqjk75okQHRDxJ7khsOMesfKNasdeCzW7D8
+gmbTrAU/tkiNDw10uufbi0TUhdK+beHBFRE/qAXztpKgOIzUPa2iH+BsdCWbazg
KGC3afZR6Zz/cqa5WtahRHtDYUdrMJnYXzH9XOggTqWv39CSjhx5V7yGhC/7nPw6
2y4kp01vemJXHJLOs+0MiP4jfb3ZAUeXMEKtc3fq6y56zfo3T0hlA3eCXdTQy3kX
lZoGhgoslxHUsmNwfM6Hejn45Gl4GXln5z8IvpAK+YDn6wFnRf+WIOqVVrsOvXnj
PGr01OvDxVb7jWVAri/afZyX9h1cZ7Aj+cybB4KY+39LdqGqAhFgfF6pJqv6I+G7
yQcgSLl4rMYAD9l3DakuTvutnaU73QdwjN1hPMm3sBueX7d4zrLKmtGPbJ0recQa
dWWbDRC/cR6Sz79T3yrfGoy7VeJOvuH35BVKyNq0uM/kh8mwxoA=
=dCgg
-----END PGP SIGNATURE-----
Merge tag 'cpufreq-arm-updates-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm
Pull cpufreq ARM updates for 6.3 from Viresh Kumar:
"- Enable thermal cooling for Tegra194 (Yi-Wei Wang).
- Register module device table and add missing compatibles for
cpufreq-qcom-hw (Nícolas F. R. A. Prado, Abel Vesa and Luca Weiss).
- Various dt binding updates for qcom-cpufreq-nvmem and opp-v2-kryo-cpu
(Christian Marangi)."
* tag 'cpufreq-arm-updates-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
dt-bindings: opp: opp-v2-kryo-cpu: enlarge opp-supported-hw maximum
dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional
dt-bindings: cpufreq: qcom-cpufreq-nvmem: specify supported opp tables
dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM8550 compatible
dt-bindings: cpufreq: cpufreq-qcom-hw: Add missing compatibles
cpufreq: mediatek-hw: Register to module device table
cpufreq: tegra194: Enable CPUFREQ thermal cooling
Add compatible for EPSS CPUFREQ-HW on SM8550.
Also document the interrupts.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Document the cpufreq-epss compatibles currently used in the tree, plus
the sc7280 which will be added in a separate commit.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
The Qualcomm Soc cpufreq hardware engine has LMh/thermal throttling
interrupts (already present in SM8250 and SM8450 DTS) and Linux driver
uses them:
sm8250-hdk.dtb: cpufreq@18591000: 'interrupt-names', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+'
sm8450-qrd.dtb: cpufreq@17d91000: 'interrupt-names', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Qualcomm platforms making use of CPUFreq HW Engine (EPSS/OSM) supply clocks
to the CPU cores. Document the same in the binding to reflect the actual
implementation.
CPUFreq HW will become the clock provider and CPU cores will become the
clock consumers.
The clock index for each CPU core is based on the frequency domain index.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
The examples' cache nodes are incomplete as 'cache-unified' and
'cache-level' are required cache properties.
Signed-off-by: Rob Herring <robh@kernel.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Add compatible for EPSS CPUFREQ-HW on SM6375.
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
