The AM62D2 SoC, part of the K3 architecture, is built for high-performance
DSP tasks in automotive audio, pro audio, radar, sonar, and medical
imaging. It features up to four Cortex-A53 cores (1.4GHz), two Cortex-R5F
cores, and a C7x DSP with 2 TOPS MMA. Key interfaces include multi-channel
McASP audio, TSN-capable Gigabit Ethernet, and a range of peripherals
(UART, SPI, I2C, CAN, USB, eMMC/SD, OSPI, CSI). It supports LPDDR4/DDR4,
secure boot with hardware security, and low-power modes with
CAN/GPIO/UART wakeup.
This SoC is of part K3 AM62x family, which includes the AM62A and AM62P
variants. A key distinction is that the AM62D does not include multimedia
components such as the video encoder/decoder, MJPEG encoder, Vision
Processing Accelerator (VPAC) for image signal processing, or the display
subsystem. Additionally, the AM62D has a different pin configuration
compared to the AM62A, which impacts embedded software development.
This adds dt bindings for TI's AM62D2 family of devices.
More details about the SoCs can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/sprujd4
Signed-off-by: Paresh Bhagat <p-bhagat@ti.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250708085839.1498505-3-p-bhagat@ti.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Document the seeed,am335x-bone-green-eco compatible string in the
appropriate place within the omap family binding file.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250620-bbg-v5-2-84f9b9a2e3a8@bootlin.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add devicetree bindings for the AM68x based phyCORE-AM68x/TDA4x SoM
and the phyBOARD-Izar carrier board.
Signed-off-by: Dominik Haller <d.haller@phytec.de>
Reviewed-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250423133635.29897-1-d.haller@phytec.de
Signed-off-by: Nishanth Menon <nm@ti.com>
Document the ti,omap4-panda-a4 compatible string in the appropriate
place within the omap family binding file.
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250123174901.1182176-1-trini@konsulko.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Add devicetree bindings for AM62Ax based phyCORE-AM62A7 SoM
and phyBOARD-Lyra RDK.
Signed-off-by: Garrett Giordano <ggiordano@phytec.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240626155244.3311436-3-ggiordano@phytec.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add bindings for SolidRun AM642 HummingBoard-T Board, which is the
evaluation board for SolidRun AM642 SoM.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240219-add-am64-som-v7-1-0e6e95b0a05d@solid-run.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
This new variant is derived from the Advanced PG2 board, removing the
Arduino interface, and adding a new ASIC for communicating with the
PLC 1200 signal modules.
Signed-off-by: Su Bao Cheng <baocheng.su@siemens.com>
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/595d8d79647a0f5e6e635a22ee0fee011f8a5c5e.1707463401.git.jan.kiszka@siemens.com
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Add Mallow carrier board for wifi and nonwifi variants of Toradex Verdin
AM62 SoM. Mallow is a low-cost carrier board in the Verdin family with
a small form factor and build for volume production making it ideal for
industrial and embedded applications.
https://www.toradex.com/products/carrier-board/mallow-carrier-board
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Joao Paulo Goncalves <joao.goncalves@toradex.com>
Signed-off-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Link: https://lore.kernel.org/r/20231205184605.35225-3-francesco@dolcini.it
Signed-off-by: Nishanth Menon <nm@ti.com>
Let's add compatibles for some xyboard tablets, these are similar to
the mapphone devices already listed but with different peripherals.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
New Boards:
- TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
- TI's AM62P5 Starter Kit (SK)
New features:
AM625:
- Support for Display (parallel only) - hdmi+audio support for
AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
for verdin.
- MCU MCAN support and enable of Toradex Verdin
- Toradex Verdin Dahlia audio support
AM62A7:
- MCU MCAN support
- Enable USB Dual Role Device(DRD) support for AM62A7
Starter Kit(SK).
AM64:
- TQ group's tqma64xxl: Overlays for SD-card and wlan.
J721E:
- Main domain CPSW9G and correponding gateway/ethernet
switch expansion - GESI board.
J721S2/AM68:
- New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
- Main domain CPSW2G and correponding gateway/ethernet
switch expansion - GESI board.
J784S4/AM69:
- Boot phase tag marking in device tree
- UFS support
Cleanups and non-urgent fixes:
- Cosmetic style fixups around "=" and "{" whitespace usage.
- Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
bindings
- Serdes header file include/dt-bindings/mux/ti-serdes.h is now
deprecated, use k3-serdes.h in soc dtsi folder.
- All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
board level.
- Fixups for AM62: Crypto powerdomains are conditional to better
represent control of the crypto engines by security controller.
- Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
- Fixups for j721s2/am68: pimux offsets for OSPI.
- Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
ranges for wkup/main gpios
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Merge tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt
TI K3 device tree updates for v6.6
New Boards:
- TQ group's TQMaX4XxL AM64 SOM and MBaX4XxL carrier board
- TI's AM62P5 Starter Kit (SK)
New features:
AM625:
- Support for Display (parallel only) - hdmi+audio support for
AM625-SK/BeaglePlay, TC358778 DPI to MIPI-DSI bridge support
for verdin.
- MCU MCAN support and enable of Toradex Verdin
- Toradex Verdin Dahlia audio support
AM62A7:
- MCU MCAN support
- Enable USB Dual Role Device(DRD) support for AM62A7
Starter Kit(SK).
AM64:
- TQ group's tqma64xxl: Overlays for SD-card and wlan.
J721E:
- Main domain CPSW9G and correponding gateway/ethernet
switch expansion - GESI board.
J721S2/AM68:
- New CAN instances, ehrpwm, Display (DSS) and am68-sk HDMI support
- Main domain CPSW2G and correponding gateway/ethernet
switch expansion - GESI board.
J784S4/AM69:
- Boot phase tag marking in device tree
- UFS support
Cleanups and non-urgent fixes:
- Cosmetic style fixups around "=" and "{" whitespace usage.
- Fixups across multiple SoCs/boards for pwm-tbclk to matchup with
bindings
- Serdes header file include/dt-bindings/mux/ti-serdes.h is now
deprecated, use k3-serdes.h in soc dtsi folder.
- All SoCs: Enable GPIO/SDHCI/OSPI/TSADC/C6/C7 DSP nodes at the
board level.
- Fixups for AM62: Crypto powerdomains are conditional to better
represent control of the crypto engines by security controller.
- Fixups for j721e: Duplicate wakeup_i2c node dropped for SoM board.
- Fixups for j721s2/am68: pimux offsets for OSPI.
- Fixups for j784s4/am69: Fixups for pinmux for ospi/adc interrupt
ranges for wkup/main gpios
* tag 'ti-k3-dt-for-v6.6' of https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (68 commits)
arm64: dts: ti: verdin-am62: Add DSI display support
arm64: dts: ti: Add support for the AM62P5 Starter Kit
arm64: dts: ti: Introduce AM62P5 family of SoCs
dt-bindings: arm: ti: Add bindings for AM62P5 SoCs
arm64: dts: ti: k3-am69-sk: Add phase tags marking
arm64: dts: ti: k3-j784s4-evm: Add phase tags marking
arm64: dts: ti: k3-j784s4: Add phase tags marking
arm64: dts: ti: k3-am625-beagleplay: Add HDMI support
arm64: dts: ti: am62x-sk: Add overlay for HDMI audio
arm64: dts: ti: k3-am62x-sk-common: Add HDMI support
arm64: dts: ti: k3-am62-main: Add node for DSS
arm64: dts: ti: k3-am62x-sk-common: Update main-i2c1 frequency
arm64: dts: ti: k3-j721e: Enable C6x DSP nodes at the board level
arm64: dts: ti: k3-j784s4: Enable C7x DSP nodes at the board level
arm64: dts: ti: k3-j721e: Enable C7x DSP nodes at the board level
arm64: dts: ti: k3-*: fix fss node dtbs check warnings
arm64: dts: ti: k3-am64: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-am65: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-j721e: Enable TSCADC nodes at the board level
arm64: dts: ti: k3-j7200: Enable GPIO nodes at the board level
...
Link: https://lore.kernel.org/r/20230814160651.frxohyshd2evp2k4@expenses
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert omap.txt to yaml.
CC: linux-omap@vger.kernel.org
Signed-off-by: Andrew Davis <afd@ti.com>
[reduced to only OMAP3/4/5 and AM3, adding Epson Moverio BT-200]
Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Message-ID: <20230515074512.66226-2-andreas@kemnade.info>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add devicetree bindings for AM62x based phyCORE-AM62 SoM
and phyBOARD-Lyra RDK.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Tony Lindgren <tony@atomide.com>
Link: https://lore.kernel.org/r/20230504140143.1425951-1-w.egorov@phytec.de
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
AM69 Starter Kit is a single board designed for TI AM69 SoC.
The AM69 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration in automotive ADAS applications,
autonomous mobile robot and edge AI applications.
Add DT binding for AM69 Starter Kit.
Signed-off-by: Dasnavis Sabiya <sabiya.d@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230119132958.124435-2-sabiya.d@ti.com
AM68 Starter Kit is a low cost, small form factor board designed for
TI's AM68 SoC which is optimized to provide best in class performance
for industrial applications and add binding for the same.
Signed-off-by: Sinthu Raja <sinthu.raja@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230116071446.28867-2-sinthu.raja@ti.com
Add devicetree bindings for AM64x based phyCORE-AM64 SoM
and phyBOARD-Electra RDK.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20230104162927.1215033-1-w.egorov@phytec.de
The Devicetree bindings document does not have to say in the title that
it is a "Devicetree binding", but instead just describe the hardware.
Drop trailing "Devicetree bindings" in various forms (also with
trailing full stop):
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[tT]ree [bB]indings\?\.\?$/title: \1/' {} \;
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD]evice[ -]\?[nN]ode [bB]indings\?\.\?$/title: \1/' {} \;
find Documentation/devicetree/bindings/ -type f -name '*.yaml' \
-not -name 'trivial-devices.yaml' \
-exec sed -i -e 's/^title: \(.*\) [dD][tT] [bB]indings\?\.\?$/title: \1/' {} \;
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> # IIO
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # MMC
Acked-by: Stephen Boyd <sboyd@kernel.org> # clk
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com> # input
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> # media
Acked-by: Sebastian Reichel <sre@kernel.org> # power
Link: https://lore.kernel.org/r/20221216163815.522628-5-krzysztof.kozlowski@linaro.org
Signed-off-by: Rob Herring <robh@kernel.org>
This adds bindings for TI's AM62A7 family of devices.
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Devarsh Thakkar <devarsht@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20220901141328.899100-3-vigneshr@ti.com
Use alphabetical sort to organize the SoCs
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220830160507.7726-3-nm@ti.com
Use alphabetical sort to organize the am654 board names.
Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20220830160507.7726-2-nm@ti.com
The AM62 SoC family is the follow on AM335x built on K3 Multicore SoC
architecture platform, providing ultra-low-power modes, dual display,
multi-sensor edge compute, security and other BOM-saving integration.
The AM62 SoC targets broad market to enable applications such as
Industrial HMI, PLC/CNC/Robot control, Medical Equipment, Building
Automation, Appliances and more.
Some highlights of this SoC are:
* Quad-Cortex-A53s (running up to 1.4GHz) in a single cluster.
Pin-to-pin compatible options for single and quad core are available.
* Cortex-M4F for general-purpose or safety usage.
* Dual display support, providing 24-bit RBG parallel interface and
OLDI/LVDS-4 Lane x2, up to 200MHz pixel clock support for 2K display
resolution.
* Selectable GPUsupport, up to 8GFLOPS, providing better user experience
in 3D graphic display case and Android.
* PRU(Programmable Realtime Unit) support for customized programmable
interfaces/IOs.
* Integrated Giga-bit Ethernet switch supporting up to a total of two
external ports (TSN capable).
* 9xUARTs, 5xSPI, 6xI2C, 2xUSB2, 3xCAN-FD, 3x eMMC and SD, GPMC for
NAND/FPGA connection, OSPI memory controller, 3xMcASP for audio,
1x CSI-RX-4L for Camera, eCAP/eQEP, ePWM, among other peripherals.
* Dedicated Centralized System Controller for Security, Power, and
Resource Management.
* Multiple low power modes support, ex: Deep sleep,Standby, MCU-only,
enabling battery powered system design.
AM625 is the first device of the family. Add DT bindings for the same.
More details can be found in the Technical Reference Manual:
https://www.ti.com/lit/pdf/spruiv7
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://lore.kernel.org/r/20220225120239.1303821-3-vigneshr@ti.com
Add compatibles for j721e and j7200 evms to allow for newer platforms
to distinguish themselves.
While doing this, maintain support for older style of description where
the board compatibility was not required.
Signed-off-by: Nishanth Menon <nm@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20210925201430.11678-2-nm@ti.com
AM642 StarterKit (SK) board is a low cost, small form factor board
designed for TI’s AM642 SoC.
Add DT binding documentation for AM642 SK.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210226184251.26451-2-lokeshvutla@ti.com
The AM642 SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable applications such as
Motor Drives, PLC, Remote IO and IoT Gateways.
Some highlights of this SoC are:
* Dual Cortex-A53s in a single cluster, two clusters of dual Cortex-R5F
MCUs, and a single Cortex-M4F.
* Two Gigabit Industrial Communication Subsystems (ICSSG).
* Integrated Ethernet switch supporting up to a total of two external
ports.
* PCIe-GEN2x1L, USB3/USB2, 2xCAN-FD, eMMC and SD, UFS, OSPI memory
controller, QSPI, I2C, eCAP/eQEP, ePWM, ADC, among other
peripherals.
* Centralized System Controller for Security, Power, and Resource
Management (DMSC).
See AM64X Technical Reference Manual (SPRUIM2, Nov 2020)
for further details: https://www.ti.com/lit/pdf/spruim2
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-2-d-gerlach@ti.com
In order to add meta-schema checks for additional/unevaluatedProperties
being present, all schema need to make this explicit. As the top-level
board/SoC schemas always have additional properties, add
'additionalProperties: true'.
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20201005183830.486085-4-robh@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
The J7200 SoC is a part of the K3 Multicore SoC architecture platform.
It is targeted for automotive gateway, vehicle compute systems,
Vehicle-to-Vehicle (V2V) and Vehicle-to-Everything (V2X) applications.
The SoC aims to meet the complex processing needs of modern embedded
products.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, two clusters of lockstep
capable dual Cortex-R5F MCUs and a Centralized Device Management and
Security Controller (DMSC).
* Configurable L3 Cache and IO-coherent architecture with high data
throughput capable distributed DMA architecture under NAVSS.
* Integrated Ethernet switch supporting up to a total of 4 external ports
in addition to legacy Ethernet switch of up to 2 ports.
* Upto 1 PCIe-GEN3 controller, 1 USB3.0 Dual-role device subsystems,
20 MCANs, 3 McASP, eMMC and SD, OSPI/HyperBus memory controller, I3C and
I2C, eCAP/eQEP, eHRPWM among other peripherals.
* One hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
See J7200 Technical Reference Manual (SPRUIU1, June 2020)
for further details: https://www.ti.com/lit/pdf/spruiu1
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Suman Anna <s-anna@ti.com>
Link: https://lore.kernel.org/r/20200914162231.2535-4-lokeshvutla@ti.com
The J721E SoC belongs to the K3 Multicore SoC architecture platform,
providing advanced system integration to enable lower system costs
of automotive applications such as infotainment, cluster, premium
Audio, Gateway, industrial and a range of broad market applications.
This SoC is designed around reducing the system cost by eliminating
the need of an external system MCU and is targeted towards ASIL-B/C
certification/requirements in addition to allowing complex software
and system use-cases.
Some highlights of this SoC are:
* Dual Cortex-A72s in a single cluster, three clusters of lockstep
capable dual Cortex-R5F MCUs, Deep-learning Matrix Multiply Accelerator(MMA),
C7x floating point Vector DSP, Two C66x floating point DSPs.
* 3D GPU PowerVR Rogue 8XE GE8430
* Vision Processing Accelerator (VPAC) with image signal processor and Depth
and Motion Processing Accelerator (DMPAC)
* Two Gigabit Industrial Communication Subsystems (ICSSG), each with dual
PRUs and dual RTUs
* Two CSI2.0 4L RX plus one CSI2.0 4L TX, one eDP/DP, One DSI Tx, and
up to two DPI interfaces.
* Integrated Ethernet switch supporting up to a total of 8 external ports in
addition to legacy Ethernet switch of up to 2 ports.
* System MMU (SMMU) Version 3.0 and advanced virtualisation
capabilities.
* Upto 4 PCIe-GEN3 controllers, 2 USB3.0 Dual-role device subsystems,
16 MCANs, 12 McASP, eMMC and SD, UFS, OSPI/HyperBus memory controller, QSPI,
I3C and I2C, eCAP/eQEP, eHRPWM, MLB among other peripherals.
* Two hardware accelerator block containing AES/DES/SHA/MD5 called SA2UL
management.
* Configurable L3 Cache and IO-coherent architecture with high data throughput
capable distributed DMA architecture under NAVSS
* Centralized System Controller for Security, Power, and Resource
Management (DMSC)
See J721E Technical Reference Manual (SPRUIL1, May 2019)
for further details: http://www.ti.com/lit/pdf/spruil1
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Convert TI NSpire SoC bindings to DT schema format using json-schema.
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Convert TI Davinci SoC bindings to DT schema format using json-schema.
Reviewed-by: Sekhar Nori <nsekhar@ti.com>
Cc: Kevin Hilman <khilman@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
