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arm64: dts: mt8183: Add kukui kodama board

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kodama is also known as Lenovo 10e Chromebook Tablet.

Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org>
Link: https://lore.kernel.org/r/20210331091327.1198529-4-hsinyi@chromium.org
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Hsin-Yi Wang 2021-03-31 17:13:27 +08:00 committed by Matthias Brugger
parent d1eaf77f2c
commit ff33d88956
6 changed files with 431 additions and 0 deletions
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4
arch/arm64/boot/dts/mediatek/Makefile
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@ -16,6 +16,10 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku32.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku0.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-krane-sku176.dtb
dtb-$(CONFIG_ARCH_MEDIATEK) += mt8192-evb.dtb

21
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku16.dts Normal file
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@ -0,0 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2021 Google LLC
*
* SKU: 0x10 => 16
* - bit 8: Camera: 0 (OV5695)
* - bits 7..4: Panel ID: 0x1 (AUO)
*/
/dts-v1/;
#include "mt8183-kukui-kodama.dtsi"
/ {
model = "MediaTek kodama sku16 board";
compatible = "google,kodama-sku16", "google,kodama", "mediatek,mt8183";
};
&panel {
status = "okay";
compatible = "auo,b101uan08.3";
};

21
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku272.dts Normal file
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@ -0,0 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2020 Google LLC
*
* SKU: 0x110 => 272
* - bit 8: Camera: 1 (GC5035)
* - bits 7..4: Panel ID: 0x1 (AUO)
*/
/dts-v1/;
#include "mt8183-kukui-kodama.dtsi"
/ {
model = "MediaTek kodama sku272 board";
compatible = "google,kodama-sku272", "google,kodama", "mediatek,mt8183";
};
&panel {
status = "okay";
compatible = "auo,b101uan08.3";
};

21
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku288.dts Normal file
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@ -0,0 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2020 Google LLC
*
* SKU: 0x120 => 288
* - bit 8: Camera: 1 (GC5035)
* - bits 7..4: Panel ID: 0x2 (BOE)
*/
/dts-v1/;
#include "mt8183-kukui-kodama.dtsi"
/ {
model = "MediaTek kodama sku288 board";
compatible = "google,kodama-sku288", "google,kodama", "mediatek,mt8183";
};
&panel {
status = "okay";
compatible = "boe,tv101wum-n53";
};

21
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama-sku32.dts Normal file
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@ -0,0 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2021 Google LLC
*
* SKU: 0x20 => 32
* - bit 8: Camera: 0 (OV5695)
* - bits 7..4: Panel ID: 0x2 (BOE)
*/
/dts-v1/;
#include "mt8183-kukui-kodama.dtsi"
/ {
model = "MediaTek kodama sku32 board";
compatible = "google,kodama-sku32", "google,kodama", "mediatek,mt8183";
};
&panel {
status = "okay";
compatible = "boe,tv101wum-n53";
};

343
arch/arm64/boot/dts/mediatek/mt8183-kukui-kodama.dtsi Normal file
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@ -0,0 +1,343 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright 2021 Google LLC
*/
/dts-v1/;
#include "mt8183-kukui.dtsi"
/ {
ppvarn_lcd: ppvarn-lcd {
compatible = "regulator-fixed";
regulator-name = "ppvarn_lcd";
pinctrl-names = "default";
pinctrl-0 = <&ppvarn_lcd_en>;
enable-active-high;
gpio = <&pio 66 GPIO_ACTIVE_HIGH>;
};
ppvarp_lcd: ppvarp-lcd {
compatible = "regulator-fixed";
regulator-name = "ppvarp_lcd";
pinctrl-names = "default";
pinctrl-0 = <&ppvarp_lcd_en>;
enable-active-high;
gpio = <&pio 166 GPIO_ACTIVE_HIGH>;
};
pp1800_lcd: pp1800-lcd {
compatible = "regulator-fixed";
regulator-name = "pp1800_lcd";
pinctrl-names = "default";
pinctrl-0 = <&pp1800_lcd_en>;
enable-active-high;
gpio = <&pio 36 GPIO_ACTIVE_HIGH>;
};
};
&i2c0 {
status = "okay";
touchscreen: touchscreen@10 {
compatible = "hid-over-i2c";
reg = <0x10>;
interrupt-parent = <&pio>;
interrupts = <155 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&touch_default>;
post-power-on-delay-ms = <10>;
hid-descr-addr = <0x0001>;
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <400000>;
eeprom@58 {
compatible = "atmel,24c64";
reg = <0x58>;
pagesize = <32>;
};
};
&i2c4 {
pinctrl-names = "default";
pinctrl-0 = <&i2c4_pins>;
status = "okay";
clock-frequency = <400000>;
eeprom@54 {
compatible = "atmel,24c64";
reg = <0x54>;
pagesize = <32>;
};
};
&mt6358_vcama2_reg {
regulator-min-microvolt = <2800000>;
regulator-max-microvolt = <2800000>;
};
&pio {
/* 192 lines */
gpio-line-names =
"SPI_AP_EC_CS_L",
"SPI_AP_EC_MOSI",
"SPI_AP_EC_CLK",
"I2S3_DO",
"USB_PD_INT_ODL",
"",
"",
"",
"",
"IT6505_HPD_L",
"I2S3_TDM_D3",
"SOC_I2C6_1V8_SCL",
"SOC_I2C6_1V8_SDA",
"DPI_D0",
"DPI_D1",
"DPI_D2",
"DPI_D3",
"DPI_D4",
"DPI_D5",
"DPI_D6",
"DPI_D7",
"DPI_D8",
"DPI_D9",
"DPI_D10",
"DPI_D11",
"DPI_HSYNC",
"DPI_VSYNC",
"DPI_DE",
"DPI_CK",
"AP_MSDC1_CLK",
"AP_MSDC1_DAT3",
"AP_MSDC1_CMD",
"AP_MSDC1_DAT0",
"AP_MSDC1_DAT2",
"AP_MSDC1_DAT1",
"",
"",
"",
"",
"",
"",
"OTG_EN",
"DRVBUS",
"DISP_PWM",
"DSI_TE",
"LCM_RST_1V8",
"AP_CTS_WIFI_RTS",
"AP_RTS_WIFI_CTS",
"SOC_I2C5_1V8_SCL",
"SOC_I2C5_1V8_SDA",
"SOC_I2C3_1V8_SCL",
"SOC_I2C3_1V8_SDA",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"SOC_I2C1_1V8_SDA",
"SOC_I2C0_1V8_SDA",
"SOC_I2C0_1V8_SCL",
"SOC_I2C1_1V8_SCL",
"AP_SPI_H1_MISO",
"AP_SPI_H1_CS_L",
"AP_SPI_H1_MOSI",
"AP_SPI_H1_CLK",
"I2S5_BCK",
"I2S5_LRCK",
"I2S5_DO",
"BOOTBLOCK_EN_L",
"MT8183_KPCOL0",
"SPI_AP_EC_MISO",
"UART_DBG_TX_AP_RX",
"UART_AP_TX_DBG_RX",
"I2S2_MCK",
"I2S2_BCK",
"CLK_5M_WCAM",
"CLK_2M_UCAM",
"I2S2_LRCK",
"I2S2_DI",
"SOC_I2C2_1V8_SCL",
"SOC_I2C2_1V8_SDA",
"SOC_I2C4_1V8_SCL",
"SOC_I2C4_1V8_SDA",
"",
"SCL8",
"SDA8",
"FCAM_PWDN_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"I2S_PMIC",
"I2S_PMIC",
"I2S_PMIC",
"I2S_PMIC",
"I2S_PMIC",
"I2S_PMIC",
"I2S_PMIC",
"I2S_PMIC",
"",
"",
"",
"",
"",
"",
/*
* AP_FLASH_WP_L is crossystem ABI. Rev1 schematics
* call it BIOS_FLASH_WP_R_L.
*/
"AP_FLASH_WP_L",
"EC_AP_INT_ODL",
"IT6505_INT_ODL",
"H1_INT_OD_L",
"",
"",
"",
"",
"",
"",
"",
"AP_SPI_FLASH_MISO",
"AP_SPI_FLASH_CS_L",
"AP_SPI_FLASH_MOSI",
"AP_SPI_FLASH_CLK",
"DA7219_IRQ",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"";
ppvarp_lcd_en: ppvarp-lcd-en {
pins1 {
pinmux = <PINMUX_GPIO66__FUNC_GPIO66>;
output-low;
};
};
ppvarn_lcd_en: ppvarn-lcd-en {
pins1 {
pinmux = <PINMUX_GPIO166__FUNC_GPIO166>;
output-low;
};
};
pp1800_lcd_en: pp1800-lcd-en {
pins1 {
pinmux = <PINMUX_GPIO36__FUNC_GPIO36>;
output-low;
};
};
touch_default: touchdefault {
pin_irq {
pinmux = <PINMUX_GPIO155__FUNC_GPIO155>;
input-enable;
bias-pull-up;
};
touch_pin_reset: pin_reset {
pinmux = <PINMUX_GPIO156__FUNC_GPIO156>;
/*
* The touchscreen driver doesn't currently support driving
* this reset line. By specifying output-high here
* we're relying on the fact that this pin has a default
* pulldown at boot (which makes sure the controller was in
* reset if it was powered) and then we set it high here
* to take it out of reset. Better would be if the touchscreen
* driver could control this and we could remove
* "output-high" here.
*/
output-high;
};
};
};
&qca_wifi {
qcom,ath10k-calibration-variant = "GO_KODAMA";
};
&i2c_tunnel {
google,remote-bus = <2>;
};