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arm64: allwinner: a100: Add MMC related nodes
The A100 has 3 MMC controllers, one of them being especially targeted to eMMC. Let's add nodes on dts. Signed-off-by: Yangtao Li <frank@allwinnertech.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Cody Eksal <masterr3c0rd@epochal.quest> Link: https://patch.msgid.link/20241031070232.1793078-10-masterr3c0rd@epochal.quest Signed-off-by: Chen-Yu Tsai <wens@csie.org>
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@ -169,12 +169,83 @@ pio: pinctrl@300b000 {
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interrupt-controller;
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interrupt-controller;
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#interrupt-cells = <3>;
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#interrupt-cells = <3>;
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mmc0_pins: mmc0-pins {
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pins = "PF0", "PF1", "PF2", "PF3",
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"PF4", "PF5";
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function = "mmc0";
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drive-strength = <30>;
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bias-pull-up;
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};
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/omit-if-no-ref/
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mmc1_pins: mmc1-pins {
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pins = "PG0", "PG1", "PG2", "PG3",
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"PG4", "PG5";
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function = "mmc1";
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drive-strength = <30>;
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bias-pull-up;
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};
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mmc2_pins: mmc2-pins {
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pins = "PC0", "PC1", "PC5", "PC6",
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"PC8", "PC9", "PC10", "PC11",
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"PC13", "PC14", "PC15", "PC16";
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function = "mmc2";
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drive-strength = <30>;
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bias-pull-up;
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};
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uart0_pb_pins: uart0-pb-pins {
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uart0_pb_pins: uart0-pb-pins {
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pins = "PB9", "PB10";
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pins = "PB9", "PB10";
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function = "uart0";
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function = "uart0";
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};
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};
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};
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};
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mmc0: mmc@4020000 {
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compatible = "allwinner,sun50i-a100-mmc";
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reg = <0x04020000 0x1000>;
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clocks = <&ccu CLK_BUS_MMC0>, <&ccu CLK_MMC0>;
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clock-names = "ahb", "mmc";
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resets = <&ccu RST_BUS_MMC0>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mmc1: mmc@4021000 {
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compatible = "allwinner,sun50i-a100-mmc";
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reg = <0x04021000 0x1000>;
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clocks = <&ccu CLK_BUS_MMC1>, <&ccu CLK_MMC1>;
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clock-names = "ahb", "mmc";
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resets = <&ccu RST_BUS_MMC1>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc1_pins>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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mmc2: mmc@4022000 {
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compatible = "allwinner,sun50i-a100-emmc";
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reg = <0x04022000 0x1000>;
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clocks = <&ccu CLK_BUS_MMC2>, <&ccu CLK_MMC2>;
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clock-names = "ahb", "mmc";
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resets = <&ccu RST_BUS_MMC2>;
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reset-names = "ahb";
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interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_pins>;
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status = "disabled";
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#address-cells = <1>;
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#size-cells = <0>;
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};
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uart0: serial@5000000 {
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uart0: serial@5000000 {
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compatible = "snps,dw-apb-uart";
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compatible = "snps,dw-apb-uart";
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reg = <0x05000000 0x400>;
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reg = <0x05000000 0x400>;
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