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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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net: libwx: add wangxun vf common api
Add common wx_configure_vf and wx_set_mac_vf for ngbevf and txgbevf. Signed-off-by: Mengyuan Lou <mengyuanlou@net-swift.com> Link: https://patch.msgid.link/20250704094923.652-4-mengyuanlou@net-swift.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Mengyuan Lou
Jakub Kicinski
parent
ba3b8490bc
commit
eb4898fde1
@ -5,4 +5,4 @@
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obj-$(CONFIG_LIBWX) += libwx.o
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libwx-objs := wx_hw.o wx_lib.o wx_ethtool.o wx_ptp.o wx_mbx.o wx_sriov.o
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libwx-objs += wx_vf.o
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libwx-objs += wx_vf.o wx_vf_lib.o wx_vf_common.o
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@ -1827,7 +1827,7 @@ void wx_disable_rx_queue(struct wx *wx, struct wx_ring *ring)
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}
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EXPORT_SYMBOL(wx_disable_rx_queue);
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static void wx_enable_rx_queue(struct wx *wx, struct wx_ring *ring)
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void wx_enable_rx_queue(struct wx *wx, struct wx_ring *ring)
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{
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u8 reg_idx = ring->reg_idx;
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u32 rxdctl;
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@ -1843,6 +1843,7 @@ static void wx_enable_rx_queue(struct wx *wx, struct wx_ring *ring)
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reg_idx);
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}
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}
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EXPORT_SYMBOL(wx_enable_rx_queue);
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static void wx_configure_srrctl(struct wx *wx,
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struct wx_ring *rx_ring)
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@ -38,6 +38,7 @@ void wx_enable_sec_rx_path(struct wx *wx);
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void wx_set_rx_mode(struct net_device *netdev);
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int wx_change_mtu(struct net_device *netdev, int new_mtu);
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void wx_disable_rx_queue(struct wx *wx, struct wx_ring *ring);
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void wx_enable_rx_queue(struct wx *wx, struct wx_ring *ring);
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void wx_configure_rx(struct wx *wx);
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void wx_configure(struct wx *wx);
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void wx_start_hw(struct wx *wx);
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@ -828,6 +828,8 @@ struct wx_mbx_info {
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u32 mailbox;
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u32 udelay;
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u32 timeout;
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/* lock mbx access */
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spinlock_t mbx_lock;
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};
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struct wx_thermal_sensor_data {
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@ -1289,6 +1291,8 @@ struct wx {
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u32 *isb_mem;
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u32 isb_tag[WX_ISB_MAX];
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bool misc_irq_domain;
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u32 eims_other;
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u32 eims_enable_mask;
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#define WX_MAX_RETA_ENTRIES 128
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#define WX_RSS_INDIR_TBL_MAX 64
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@ -14,6 +14,7 @@
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#define WX_VXMRQC 0x78
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#define WX_VXICR 0x100
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#define WX_VXIMS 0x108
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#define WX_VXIMC 0x10C
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#define WX_VF_IRQ_CLEAR_MASK 7
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#define WX_VF_MAX_TX_QUEUES 4
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#define WX_VF_MAX_RX_QUEUES 4
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@ -22,6 +23,12 @@
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#define WX_VXRXDCTL_ENABLE BIT(0)
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#define WX_VXTXDCTL_FLUSH BIT(26)
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#define WX_VXITR(i) (0x200 + (4 * (i))) /* i=[0,1] */
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#define WX_VXITR_MASK GENMASK(8, 0)
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#define WX_VXITR_CNT_WDIS BIT(31)
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#define WX_VXIVAR_MISC 0x260
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#define WX_VXIVAR(i) (0x240 + (4 * (i))) /* i=[0,3] */
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#define WX_VXRXDCTL_RSCMAX(f) FIELD_PREP(GENMASK(24, 23), f)
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#define WX_VXRXDCTL_BUFLEN(f) FIELD_PREP(GENMASK(6, 1), f)
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#define WX_VXRXDCTL_BUFSZ(f) FIELD_PREP(GENMASK(11, 8), f)
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@ -44,6 +51,49 @@
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#define WX_RX_HDR_SIZE 256
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#define WX_RX_BUF_SIZE 2048
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#define WX_RXBUFFER_2048 (2048)
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#define WX_RXBUFFER_3072 3072
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/* Receive Path */
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#define WX_VXRDBAL(r) (0x1000 + (0x40 * (r)))
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#define WX_VXRDBAH(r) (0x1004 + (0x40 * (r)))
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#define WX_VXRDT(r) (0x1008 + (0x40 * (r)))
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#define WX_VXRDH(r) (0x100C + (0x40 * (r)))
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#define WX_VXRXDCTL_RSCEN BIT(29)
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#define WX_VXRXDCTL_DROP BIT(30)
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#define WX_VXRXDCTL_VLAN BIT(31)
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#define WX_VXTDBAL(r) (0x3000 + (0x40 * (r)))
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#define WX_VXTDBAH(r) (0x3004 + (0x40 * (r)))
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#define WX_VXTDT(r) (0x3008 + (0x40 * (r)))
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#define WX_VXTDH(r) (0x300C + (0x40 * (r)))
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#define WX_VXTXDCTL_ENABLE BIT(0)
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#define WX_VXTXDCTL_BUFLEN(f) FIELD_PREP(GENMASK(6, 1), f)
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#define WX_VXTXDCTL_PTHRESH(f) FIELD_PREP(GENMASK(11, 8), f)
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#define WX_VXTXDCTL_WTHRESH(f) FIELD_PREP(GENMASK(22, 16), f)
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#define WX_VXMRQC_PSR(f) FIELD_PREP(GENMASK(5, 1), f)
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#define WX_VXMRQC_PSR_MASK GENMASK(5, 1)
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#define WX_VXMRQC_PSR_L4HDR BIT(0)
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#define WX_VXMRQC_PSR_L3HDR BIT(1)
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#define WX_VXMRQC_PSR_L2HDR BIT(2)
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#define WX_VXMRQC_PSR_TUNHDR BIT(3)
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#define WX_VXMRQC_PSR_TUNMAC BIT(4)
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#define WX_VXRSSRK(i) (0x80 + ((i) * 4)) /* i=[0,9] */
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#define WX_VXRETA(i) (0xC0 + ((i) * 4)) /* i=[0,15] */
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#define WX_VXMRQC_RSS(f) FIELD_PREP(GENMASK(31, 16), f)
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#define WX_VXMRQC_RSS_MASK GENMASK(31, 16)
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#define WX_VXMRQC_RSS_ALG_IPV4_TCP BIT(0)
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#define WX_VXMRQC_RSS_ALG_IPV4 BIT(1)
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#define WX_VXMRQC_RSS_ALG_IPV6 BIT(4)
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#define WX_VXMRQC_RSS_ALG_IPV6_TCP BIT(5)
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#define WX_VXMRQC_RSS_EN BIT(8)
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#define WX_VXMRQC_RSS_HASH(f) FIELD_PREP(GENMASK(15, 13), f)
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void wx_init_hw_vf(struct wx *wx);
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int wx_reset_hw_vf(struct wx *wx);
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void wx_get_mac_addr_vf(struct wx *wx, u8 *mac_addr);
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196
drivers/net/ethernet/wangxun/libwx/wx_vf_common.c
Normal file
196
drivers/net/ethernet/wangxun/libwx/wx_vf_common.c
Normal file
@ -0,0 +1,196 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */
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#include <linux/etherdevice.h>
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#include <linux/pci.h>
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#include "wx_type.h"
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#include "wx_mbx.h"
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#include "wx_lib.h"
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#include "wx_vf.h"
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#include "wx_vf_lib.h"
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#include "wx_vf_common.h"
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static irqreturn_t wx_msix_misc_vf(int __always_unused irq, void *data)
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{
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struct wx *wx = data;
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/* Clear the interrupt */
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if (netif_running(wx->netdev))
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wr32(wx, WX_VXIMC, wx->eims_other);
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return IRQ_HANDLED;
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}
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int wx_request_msix_irqs_vf(struct wx *wx)
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{
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struct net_device *netdev = wx->netdev;
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int vector, err;
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for (vector = 0; vector < wx->num_q_vectors; vector++) {
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struct wx_q_vector *q_vector = wx->q_vector[vector];
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struct msix_entry *entry = &wx->msix_q_entries[vector];
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if (q_vector->tx.ring && q_vector->rx.ring)
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snprintf(q_vector->name, sizeof(q_vector->name) - 1,
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"%s-TxRx-%d", netdev->name, entry->entry);
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else
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/* skip this unused q_vector */
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continue;
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err = request_irq(entry->vector, wx_msix_clean_rings, 0,
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q_vector->name, q_vector);
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if (err) {
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wx_err(wx, "request_irq failed for MSIX interrupt %s Error: %d\n",
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q_vector->name, err);
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goto free_queue_irqs;
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}
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}
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err = request_threaded_irq(wx->msix_entry->vector, NULL,
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wx_msix_misc_vf, IRQF_ONESHOT,
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netdev->name, wx);
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if (err) {
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wx_err(wx, "request_irq for msix_other failed: %d\n", err);
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goto free_queue_irqs;
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}
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return 0;
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free_queue_irqs:
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while (vector) {
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vector--;
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free_irq(wx->msix_q_entries[vector].vector,
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wx->q_vector[vector]);
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}
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wx_reset_interrupt_capability(wx);
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return err;
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}
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EXPORT_SYMBOL(wx_request_msix_irqs_vf);
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void wx_negotiate_api_vf(struct wx *wx)
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{
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int api[] = {
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wx_mbox_api_13,
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wx_mbox_api_null};
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int err = 0, idx = 0;
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spin_lock_bh(&wx->mbx.mbx_lock);
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while (api[idx] != wx_mbox_api_null) {
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err = wx_negotiate_api_version(wx, api[idx]);
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if (!err)
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break;
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idx++;
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}
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spin_unlock_bh(&wx->mbx.mbx_lock);
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}
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EXPORT_SYMBOL(wx_negotiate_api_vf);
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void wx_reset_vf(struct wx *wx)
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{
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struct net_device *netdev = wx->netdev;
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int ret = 0;
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ret = wx_reset_hw_vf(wx);
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if (!ret)
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wx_init_hw_vf(wx);
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wx_negotiate_api_vf(wx);
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if (is_valid_ether_addr(wx->mac.addr)) {
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eth_hw_addr_set(netdev, wx->mac.addr);
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ether_addr_copy(netdev->perm_addr, wx->mac.addr);
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}
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}
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EXPORT_SYMBOL(wx_reset_vf);
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void wx_set_rx_mode_vf(struct net_device *netdev)
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{
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struct wx *wx = netdev_priv(netdev);
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unsigned int flags = netdev->flags;
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int xcast_mode;
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xcast_mode = (flags & IFF_ALLMULTI) ? WXVF_XCAST_MODE_ALLMULTI :
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(flags & (IFF_BROADCAST | IFF_MULTICAST)) ?
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WXVF_XCAST_MODE_MULTI : WXVF_XCAST_MODE_NONE;
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/* request the most inclusive mode we need */
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if (flags & IFF_PROMISC)
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xcast_mode = WXVF_XCAST_MODE_PROMISC;
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else if (flags & IFF_ALLMULTI)
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xcast_mode = WXVF_XCAST_MODE_ALLMULTI;
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else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
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xcast_mode = WXVF_XCAST_MODE_MULTI;
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else
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xcast_mode = WXVF_XCAST_MODE_NONE;
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spin_lock_bh(&wx->mbx.mbx_lock);
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wx_update_xcast_mode_vf(wx, xcast_mode);
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wx_update_mc_addr_list_vf(wx, netdev);
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wx_write_uc_addr_list_vf(netdev);
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spin_unlock_bh(&wx->mbx.mbx_lock);
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}
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EXPORT_SYMBOL(wx_set_rx_mode_vf);
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/**
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* wx_configure_rx_vf - Configure Receive Unit after Reset
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* @wx: board private structure
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*
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* Configure the Rx unit of the MAC after a reset.
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**/
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static void wx_configure_rx_vf(struct wx *wx)
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{
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struct net_device *netdev = wx->netdev;
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int i, ret;
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wx_setup_psrtype_vf(wx);
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wx_setup_vfmrqc_vf(wx);
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spin_lock_bh(&wx->mbx.mbx_lock);
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ret = wx_rlpml_set_vf(wx,
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netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN);
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spin_unlock_bh(&wx->mbx.mbx_lock);
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if (ret)
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wx_dbg(wx, "Failed to set MTU at %d\n", netdev->mtu);
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/* Setup the HW Rx Head and Tail Descriptor Pointers and
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* the Base and Length of the Rx Descriptor Ring
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*/
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for (i = 0; i < wx->num_rx_queues; i++) {
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struct wx_ring *rx_ring = wx->rx_ring[i];
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#ifdef HAVE_SWIOTLB_SKIP_CPU_SYNC
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wx_set_rx_buffer_len_vf(wx, rx_ring);
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#endif
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wx_configure_rx_ring_vf(wx, rx_ring);
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}
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}
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void wx_configure_vf(struct wx *wx)
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{
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wx_set_rx_mode_vf(wx->netdev);
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wx_configure_tx_vf(wx);
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wx_configure_rx_vf(wx);
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}
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EXPORT_SYMBOL(wx_configure_vf);
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int wx_set_mac_vf(struct net_device *netdev, void *p)
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{
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struct wx *wx = netdev_priv(netdev);
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struct sockaddr *addr = p;
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int ret;
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ret = eth_prepare_mac_addr_change(netdev, addr);
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if (ret)
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return ret;
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spin_lock_bh(&wx->mbx.mbx_lock);
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ret = wx_set_rar_vf(wx, 1, (u8 *)addr->sa_data, 1);
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spin_unlock_bh(&wx->mbx.mbx_lock);
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if (ret)
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return -EPERM;
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memcpy(wx->mac.addr, addr->sa_data, netdev->addr_len);
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memcpy(wx->mac.perm_addr, addr->sa_data, netdev->addr_len);
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eth_hw_addr_set(netdev, addr->sa_data);
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return 0;
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}
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EXPORT_SYMBOL(wx_set_mac_vf);
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14
drivers/net/ethernet/wangxun/libwx/wx_vf_common.h
Normal file
14
drivers/net/ethernet/wangxun/libwx/wx_vf_common.h
Normal file
@ -0,0 +1,14 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */
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#ifndef _WX_VF_COMMON_H_
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#define _WX_VF_COMMON_H_
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int wx_request_msix_irqs_vf(struct wx *wx);
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void wx_negotiate_api_vf(struct wx *wx);
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void wx_reset_vf(struct wx *wx);
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void wx_set_rx_mode_vf(struct net_device *netdev);
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void wx_configure_vf(struct wx *wx);
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int wx_set_mac_vf(struct net_device *netdev, void *p);
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#endif /* _WX_VF_COMMON_H_ */
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280
drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c
Normal file
280
drivers/net/ethernet/wangxun/libwx/wx_vf_lib.c
Normal file
@ -0,0 +1,280 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */
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#include <linux/etherdevice.h>
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#include <linux/pci.h>
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#include "wx_type.h"
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#include "wx_hw.h"
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#include "wx_lib.h"
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#include "wx_vf.h"
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#include "wx_vf_lib.h"
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static void wx_write_eitr_vf(struct wx_q_vector *q_vector)
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{
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struct wx *wx = q_vector->wx;
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int v_idx = q_vector->v_idx;
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u32 itr_reg;
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itr_reg = q_vector->itr & WX_VXITR_MASK;
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/* set the WDIS bit to not clear the timer bits and cause an
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* immediate assertion of the interrupt
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*/
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itr_reg |= WX_VXITR_CNT_WDIS;
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wr32(wx, WX_VXITR(v_idx), itr_reg);
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}
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static void wx_set_ivar_vf(struct wx *wx, s8 direction, u8 queue,
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u8 msix_vector)
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{
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u32 ivar, index;
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if (direction == -1) {
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/* other causes */
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msix_vector |= WX_PX_IVAR_ALLOC_VAL;
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ivar = rd32(wx, WX_VXIVAR_MISC);
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ivar &= ~0xFF;
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ivar |= msix_vector;
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wr32(wx, WX_VXIVAR_MISC, ivar);
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} else {
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/* tx or rx causes */
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msix_vector |= WX_PX_IVAR_ALLOC_VAL;
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index = ((16 * (queue & 1)) + (8 * direction));
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ivar = rd32(wx, WX_VXIVAR(queue >> 1));
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ivar &= ~(0xFF << index);
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ivar |= (msix_vector << index);
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wr32(wx, WX_VXIVAR(queue >> 1), ivar);
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}
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}
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void wx_configure_msix_vf(struct wx *wx)
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{
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int v_idx;
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wx->eims_enable_mask = 0;
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for (v_idx = 0; v_idx < wx->num_q_vectors; v_idx++) {
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||||
struct wx_q_vector *q_vector = wx->q_vector[v_idx];
|
||||
struct wx_ring *ring;
|
||||
|
||||
wx_for_each_ring(ring, q_vector->rx)
|
||||
wx_set_ivar_vf(wx, 0, ring->reg_idx, v_idx);
|
||||
|
||||
wx_for_each_ring(ring, q_vector->tx)
|
||||
wx_set_ivar_vf(wx, 1, ring->reg_idx, v_idx);
|
||||
|
||||
/* add q_vector eims value to global eims_enable_mask */
|
||||
wx->eims_enable_mask |= BIT(v_idx);
|
||||
wx_write_eitr_vf(q_vector);
|
||||
}
|
||||
|
||||
wx_set_ivar_vf(wx, -1, 1, v_idx);
|
||||
|
||||
/* setup eims_other and add value to global eims_enable_mask */
|
||||
wx->eims_other = BIT(v_idx);
|
||||
wx->eims_enable_mask |= wx->eims_other;
|
||||
}
|
||||
|
||||
int wx_write_uc_addr_list_vf(struct net_device *netdev)
|
||||
{
|
||||
struct wx *wx = netdev_priv(netdev);
|
||||
int count = 0;
|
||||
|
||||
if (!netdev_uc_empty(netdev)) {
|
||||
struct netdev_hw_addr *ha;
|
||||
|
||||
netdev_for_each_uc_addr(ha, netdev)
|
||||
wx_set_uc_addr_vf(wx, ++count, ha->addr);
|
||||
} else {
|
||||
/*
|
||||
* If the list is empty then send message to PF driver to
|
||||
* clear all macvlans on this VF.
|
||||
*/
|
||||
wx_set_uc_addr_vf(wx, 0, NULL);
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
/**
|
||||
* wx_configure_tx_ring_vf - Configure Tx ring after Reset
|
||||
* @wx: board private structure
|
||||
* @ring: structure containing ring specific data
|
||||
*
|
||||
* Configure the Tx descriptor ring after a reset.
|
||||
**/
|
||||
static void wx_configure_tx_ring_vf(struct wx *wx, struct wx_ring *ring)
|
||||
{
|
||||
u8 reg_idx = ring->reg_idx;
|
||||
u64 tdba = ring->dma;
|
||||
u32 txdctl = 0;
|
||||
int ret;
|
||||
|
||||
/* disable queue to avoid issues while updating state */
|
||||
wr32(wx, WX_VXTXDCTL(reg_idx), WX_VXTXDCTL_FLUSH);
|
||||
wr32(wx, WX_VXTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
|
||||
wr32(wx, WX_VXTDBAH(reg_idx), tdba >> 32);
|
||||
|
||||
/* enable relaxed ordering */
|
||||
pcie_capability_clear_and_set_word(wx->pdev, PCI_EXP_DEVCTL,
|
||||
0, PCI_EXP_DEVCTL_RELAX_EN);
|
||||
|
||||
/* reset head and tail pointers */
|
||||
wr32(wx, WX_VXTDH(reg_idx), 0);
|
||||
wr32(wx, WX_VXTDT(reg_idx), 0);
|
||||
ring->tail = wx->hw_addr + WX_VXTDT(reg_idx);
|
||||
|
||||
/* reset ntu and ntc to place SW in sync with hardwdare */
|
||||
ring->next_to_clean = 0;
|
||||
ring->next_to_use = 0;
|
||||
|
||||
txdctl |= WX_VXTXDCTL_BUFLEN(wx_buf_len(ring->count));
|
||||
txdctl |= WX_VXTXDCTL_ENABLE;
|
||||
|
||||
/* reinitialize tx_buffer_info */
|
||||
memset(ring->tx_buffer_info, 0,
|
||||
sizeof(struct wx_tx_buffer) * ring->count);
|
||||
|
||||
wr32(wx, WX_VXTXDCTL(reg_idx), txdctl);
|
||||
/* poll to verify queue is enabled */
|
||||
ret = read_poll_timeout(rd32, txdctl, txdctl & WX_VXTXDCTL_ENABLE,
|
||||
1000, 10000, true, wx, WX_VXTXDCTL(reg_idx));
|
||||
if (ret == -ETIMEDOUT)
|
||||
wx_err(wx, "Could not enable Tx Queue %d\n", reg_idx);
|
||||
}
|
||||
|
||||
/**
|
||||
* wx_configure_tx_vf - Configure Transmit Unit after Reset
|
||||
* @wx: board private structure
|
||||
*
|
||||
* Configure the Tx unit of the MAC after a reset.
|
||||
**/
|
||||
void wx_configure_tx_vf(struct wx *wx)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
/* Setup the HW Tx Head and Tail descriptor pointers */
|
||||
for (i = 0; i < wx->num_tx_queues; i++)
|
||||
wx_configure_tx_ring_vf(wx, wx->tx_ring[i]);
|
||||
}
|
||||
|
||||
static void wx_configure_srrctl_vf(struct wx *wx, struct wx_ring *ring,
|
||||
int index)
|
||||
{
|
||||
u32 srrctl;
|
||||
|
||||
srrctl = rd32m(wx, WX_VXRXDCTL(index),
|
||||
(u32)~(WX_VXRXDCTL_HDRSZ_MASK | WX_VXRXDCTL_BUFSZ_MASK));
|
||||
srrctl |= WX_VXRXDCTL_DROP;
|
||||
srrctl |= WX_VXRXDCTL_HDRSZ(wx_hdr_sz(WX_RX_HDR_SIZE));
|
||||
srrctl |= WX_VXRXDCTL_BUFSZ(wx_buf_sz(WX_RX_BUF_SIZE));
|
||||
|
||||
wr32(wx, WX_VXRXDCTL(index), srrctl);
|
||||
}
|
||||
|
||||
void wx_setup_psrtype_vf(struct wx *wx)
|
||||
{
|
||||
/* PSRTYPE must be initialized */
|
||||
u32 psrtype = WX_VXMRQC_PSR_L2HDR |
|
||||
WX_VXMRQC_PSR_L3HDR |
|
||||
WX_VXMRQC_PSR_L4HDR |
|
||||
WX_VXMRQC_PSR_TUNHDR |
|
||||
WX_VXMRQC_PSR_TUNMAC;
|
||||
|
||||
wr32m(wx, WX_VXMRQC, WX_VXMRQC_PSR_MASK, WX_VXMRQC_PSR(psrtype));
|
||||
}
|
||||
|
||||
void wx_setup_vfmrqc_vf(struct wx *wx)
|
||||
{
|
||||
u16 rss_i = wx->num_rx_queues;
|
||||
u32 vfmrqc = 0, vfreta = 0;
|
||||
u8 i, j;
|
||||
|
||||
/* Fill out hash function seeds */
|
||||
netdev_rss_key_fill(wx->rss_key, sizeof(wx->rss_key));
|
||||
for (i = 0; i < WX_RSS_KEY_SIZE / 4; i++)
|
||||
wr32(wx, WX_VXRSSRK(i), wx->rss_key[i]);
|
||||
|
||||
for (i = 0, j = 0; i < WX_MAX_RETA_ENTRIES; i++, j++) {
|
||||
if (j == rss_i)
|
||||
j = 0;
|
||||
|
||||
wx->rss_indir_tbl[i] = j;
|
||||
|
||||
vfreta |= j << (i & 0x3) * 8;
|
||||
if ((i & 3) == 3) {
|
||||
wr32(wx, WX_VXRETA(i >> 2), vfreta);
|
||||
vfreta = 0;
|
||||
}
|
||||
}
|
||||
|
||||
/* Perform hash on these packet types */
|
||||
vfmrqc |= WX_VXMRQC_RSS_ALG_IPV4 |
|
||||
WX_VXMRQC_RSS_ALG_IPV4_TCP |
|
||||
WX_VXMRQC_RSS_ALG_IPV6 |
|
||||
WX_VXMRQC_RSS_ALG_IPV6_TCP;
|
||||
|
||||
vfmrqc |= WX_VXMRQC_RSS_EN;
|
||||
|
||||
if (wx->num_rx_queues > 3)
|
||||
vfmrqc |= WX_VXMRQC_RSS_HASH(2);
|
||||
else if (wx->num_rx_queues > 1)
|
||||
vfmrqc |= WX_VXMRQC_RSS_HASH(1);
|
||||
wr32m(wx, WX_VXMRQC, WX_VXMRQC_RSS_MASK, WX_VXMRQC_RSS(vfmrqc));
|
||||
}
|
||||
|
||||
void wx_configure_rx_ring_vf(struct wx *wx, struct wx_ring *ring)
|
||||
{
|
||||
u8 reg_idx = ring->reg_idx;
|
||||
union wx_rx_desc *rx_desc;
|
||||
u64 rdba = ring->dma;
|
||||
u32 rxdctl;
|
||||
|
||||
/* disable queue to avoid issues while updating state */
|
||||
rxdctl = rd32(wx, WX_VXRXDCTL(reg_idx));
|
||||
wx_disable_rx_queue(wx, ring);
|
||||
|
||||
wr32(wx, WX_VXRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
|
||||
wr32(wx, WX_VXRDBAH(reg_idx), rdba >> 32);
|
||||
|
||||
/* enable relaxed ordering */
|
||||
pcie_capability_clear_and_set_word(wx->pdev, PCI_EXP_DEVCTL,
|
||||
0, PCI_EXP_DEVCTL_RELAX_EN);
|
||||
|
||||
/* reset head and tail pointers */
|
||||
wr32(wx, WX_VXRDH(reg_idx), 0);
|
||||
wr32(wx, WX_VXRDT(reg_idx), 0);
|
||||
ring->tail = wx->hw_addr + WX_VXRDT(reg_idx);
|
||||
|
||||
/* initialize rx_buffer_info */
|
||||
memset(ring->rx_buffer_info, 0,
|
||||
sizeof(struct wx_rx_buffer) * ring->count);
|
||||
|
||||
/* initialize Rx descriptor 0 */
|
||||
rx_desc = WX_RX_DESC(ring, 0);
|
||||
rx_desc->wb.upper.length = 0;
|
||||
|
||||
/* reset ntu and ntc to place SW in sync with hardwdare */
|
||||
ring->next_to_clean = 0;
|
||||
ring->next_to_use = 0;
|
||||
ring->next_to_alloc = 0;
|
||||
|
||||
wx_configure_srrctl_vf(wx, ring, reg_idx);
|
||||
|
||||
/* allow any size packet since we can handle overflow */
|
||||
rxdctl &= ~WX_VXRXDCTL_BUFLEN_MASK;
|
||||
rxdctl |= WX_VXRXDCTL_BUFLEN(wx_buf_len(ring->count));
|
||||
rxdctl |= WX_VXRXDCTL_ENABLE | WX_VXRXDCTL_VLAN;
|
||||
|
||||
/* enable RSC */
|
||||
rxdctl &= ~WX_VXRXDCTL_RSCMAX_MASK;
|
||||
rxdctl |= WX_VXRXDCTL_RSCMAX(0);
|
||||
rxdctl |= WX_VXRXDCTL_RSCEN;
|
||||
|
||||
wr32(wx, WX_VXRXDCTL(reg_idx), rxdctl);
|
||||
|
||||
/* pf/vf reuse */
|
||||
wx_enable_rx_queue(wx, ring);
|
||||
wx_alloc_rx_buffers(ring, wx_desc_unused(ring));
|
||||
}
|
||||
14
drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h
Normal file
14
drivers/net/ethernet/wangxun/libwx/wx_vf_lib.h
Normal file
@ -0,0 +1,14 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/* Copyright (c) 2015 - 2025 Beijing WangXun Technology Co., Ltd. */
|
||||
|
||||
#ifndef _WX_VF_LIB_H_
|
||||
#define _WX_VF_LIB_H_
|
||||
|
||||
void wx_configure_msix_vf(struct wx *wx);
|
||||
int wx_write_uc_addr_list_vf(struct net_device *netdev);
|
||||
void wx_setup_psrtype_vf(struct wx *wx);
|
||||
void wx_setup_vfmrqc_vf(struct wx *wx);
|
||||
void wx_configure_tx_vf(struct wx *wx);
|
||||
void wx_configure_rx_ring_vf(struct wx *wx, struct wx_ring *ring);
|
||||
|
||||
#endif /* _WX_VF_LIB_H_ */
|
||||
Loading…
Reference in New Issue
Block a user