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arm64: dts: apple: t7000: Add cpufreq nodes

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Add cpufreq nodes for Apple A8 SoC.

Signed-off-by: Nick Chan <towinchenmi@gmail.com>
Reviewed-by: Neal Gompa <neal@gompa.dev>
Signed-off-by: Sven Peter <sven@svenpeter.dev>
This commit is contained in:
Nick Chan 2025-02-03 20:43:41 +08:00 committed by Sven Peter
parent 9e908d5f24
commit e97323994f
4 changed files with 58 additions and 0 deletions
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4
arch/arm64/boot/dts/apple/t7000-6.dtsi
View File

@ -52,3 +52,7 @@ switch-mute {
&framebuffer0 {
power-domains = <&ps_disp0 &ps_mipi_dsi>;
};
&typhoon_opp06 {
status = "okay";
};

4
arch/arm64/boot/dts/apple/t7000-j42d.dts
View File

@ -30,3 +30,7 @@ framebuffer0: framebuffer@0 {
&serial6 {
status = "okay";
};
&typhoon_opp06 {
status = "okay";
};

4
arch/arm64/boot/dts/apple/t7000-mini4.dtsi
View File

@ -53,3 +53,7 @@ switch-mute {
&framebuffer0 {
power-domains = <&ps_disp0 &ps_dp>;
};
&typhoon_opp06 {
status = "okay";
};

46
arch/arm64/boot/dts/apple/t7000.dtsi
View File

@ -33,6 +33,8 @@ cpu0: cpu@0 {
compatible = "apple,typhoon";
reg = <0x0 0x0>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
performance-domains = <&cpufreq>;
operating-points-v2 = <&typhoon_opp>;
enable-method = "spin-table";
device_type = "cpu";
};
@ -41,11 +43,49 @@ cpu1: cpu@1 {
compatible = "apple,typhoon";
reg = <0x0 0x1>;
cpu-release-addr = <0 0>; /* To be filled in by loader */
performance-domains = <&cpufreq>;
operating-points-v2 = <&typhoon_opp>;
enable-method = "spin-table";
device_type = "cpu";
};
};
typhoon_opp: opp-table {
compatible = "operating-points-v2";
opp01 {
opp-hz = /bits/ 64 <300000000>;
opp-level = <1>;
clock-latency-ns = <300>;
};
opp02 {
opp-hz = /bits/ 64 <396000000>;
opp-level = <2>;
clock-latency-ns = <50000>;
};
opp03 {
opp-hz = /bits/ 64 <600000000>;
opp-level = <3>;
clock-latency-ns = <29000>;
};
opp04 {
opp-hz = /bits/ 64 <840000000>;
opp-level = <4>;
clock-latency-ns = <29000>;
};
opp05 {
opp-hz = /bits/ 64 <1128000000>;
opp-level = <5>;
clock-latency-ns = <36000>;
};
typhoon_opp06: opp06 {
opp-hz = /bits/ 64 <1392000000>;
opp-level = <6>;
clock-latency-ns = <42000>;
status = "disabled"; /* Not available on N102 */
};
};
soc {
compatible = "simple-bus";
#address-cells = <2>;
@ -53,6 +93,12 @@ soc {
nonposted-mmio;
ranges;
cpufreq: performance-controller@202220000 {
compatible = "apple,t7000-cluster-cpufreq", "apple,s5l8960x-cluster-cpufreq";
reg = <0x2 0x02220000 0 0x1000>;
#performance-domain-cells = <0>;
};
serial0: serial@20a0c0000 {
compatible = "apple,s5l-uart";
reg = <0x2 0x0a0c0000 0x0 0x4000>;