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https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
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iio: adc: ad7606: add SPI offload support
Add SPI offload support for this family. Signed-off-by: Angelo Dureghello <adureghello@baylibre.com> Reviewed-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250403-wip-bl-spi-offload-ad7606-v1-3-1b00cb638b12@baylibre.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Angelo Dureghello
Jonathan Cameron
parent
89e1f95a61
commit
e96d35faf3
@ -289,6 +289,8 @@ config AD7606_IFACE_SPI
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tristate "Analog Devices AD7606 ADC driver with spi interface support"
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depends on SPI
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select AD7606
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select IIO_BUFFER_DMAENGINE
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select SPI_OFFLOAD
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help
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Say yes here to build spi interface support for Analog Devices:
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ad7605-4, ad7606, ad7606-6, ad7606-4 analog to digital converters (ADC).
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@ -138,6 +138,7 @@ const struct ad7606_chip_info ad7606_6_info = {
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.oversampling_avail = ad7606_oversampling_avail,
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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.scale_setup_cb = ad7606_16bit_chan_scale_setup,
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.offload_storagebits = 32,
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};
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EXPORT_SYMBOL_NS_GPL(ad7606_6_info, "IIO_AD7606");
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@ -149,6 +150,7 @@ const struct ad7606_chip_info ad7606_4_info = {
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.oversampling_avail = ad7606_oversampling_avail,
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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.scale_setup_cb = ad7606_16bit_chan_scale_setup,
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.offload_storagebits = 32,
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};
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EXPORT_SYMBOL_NS_GPL(ad7606_4_info, "IIO_AD7606");
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@ -161,6 +163,7 @@ const struct ad7606_chip_info ad7606b_info = {
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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.scale_setup_cb = ad7606_16bit_chan_scale_setup,
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.sw_setup_cb = ad7606b_sw_mode_setup,
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.offload_storagebits = 32,
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};
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EXPORT_SYMBOL_NS_GPL(ad7606b_info, "IIO_AD7606");
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@ -173,6 +176,7 @@ const struct ad7606_chip_info ad7606c_16_info = {
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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.scale_setup_cb = ad7606c_16bit_chan_scale_setup,
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.sw_setup_cb = ad7606b_sw_mode_setup,
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.offload_storagebits = 32,
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};
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EXPORT_SYMBOL_NS_GPL(ad7606c_16_info, "IIO_AD7606");
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@ -184,6 +188,7 @@ const struct ad7606_chip_info ad7607_info = {
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.oversampling_avail = ad7606_oversampling_avail,
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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.scale_setup_cb = ad7607_chan_scale_setup,
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.offload_storagebits = 32,
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};
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EXPORT_SYMBOL_NS_GPL(ad7607_info, "IIO_AD7606");
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@ -195,6 +200,7 @@ const struct ad7606_chip_info ad7608_info = {
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.oversampling_avail = ad7606_oversampling_avail,
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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.scale_setup_cb = ad7608_chan_scale_setup,
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.offload_storagebits = 32,
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};
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EXPORT_SYMBOL_NS_GPL(ad7608_info, "IIO_AD7606");
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@ -206,6 +212,7 @@ const struct ad7606_chip_info ad7609_info = {
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.oversampling_avail = ad7606_oversampling_avail,
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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.scale_setup_cb = ad7609_chan_scale_setup,
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.offload_storagebits = 32,
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};
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EXPORT_SYMBOL_NS_GPL(ad7609_info, "IIO_AD7606");
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@ -218,6 +225,7 @@ const struct ad7606_chip_info ad7606c_18_info = {
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.oversampling_num = ARRAY_SIZE(ad7606_oversampling_avail),
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.scale_setup_cb = ad7606c_18bit_chan_scale_setup,
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.sw_setup_cb = ad7606b_sw_mode_setup,
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.offload_storagebits = 32,
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};
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EXPORT_SYMBOL_NS_GPL(ad7606c_18_info, "IIO_AD7606");
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@ -232,6 +240,7 @@ const struct ad7606_chip_info ad7616_info = {
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.os_req_reset = true,
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.scale_setup_cb = ad7606_16bit_chan_scale_setup,
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.sw_setup_cb = ad7616_sw_mode_setup,
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.offload_storagebits = 16,
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};
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EXPORT_SYMBOL_NS_GPL(ad7616_info, "IIO_AD7606");
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@ -514,7 +523,7 @@ static int ad7606_pwm_set_high(struct ad7606_state *st)
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return ret;
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}
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static int ad7606_pwm_set_low(struct ad7606_state *st)
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int ad7606_pwm_set_low(struct ad7606_state *st)
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{
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struct pwm_state cnvst_pwm_state;
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int ret;
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@ -527,8 +536,9 @@ static int ad7606_pwm_set_low(struct ad7606_state *st)
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return ret;
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}
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EXPORT_SYMBOL_NS_GPL(ad7606_pwm_set_low, "IIO_AD7606");
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static int ad7606_pwm_set_swing(struct ad7606_state *st)
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int ad7606_pwm_set_swing(struct ad7606_state *st)
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{
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struct pwm_state cnvst_pwm_state;
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@ -538,6 +548,7 @@ static int ad7606_pwm_set_swing(struct ad7606_state *st)
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return pwm_apply_might_sleep(st->cnvst_pwm, &cnvst_pwm_state);
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}
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EXPORT_SYMBOL_NS_GPL(ad7606_pwm_set_swing, "IIO_AD7606");
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static bool ad7606_pwm_is_swinging(struct ad7606_state *st)
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{
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@ -626,7 +637,7 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch,
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* will not happen because IIO_CHAN_INFO_RAW is not supported for the backend.
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* TODO: Add support for reading a single value when the backend is used.
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*/
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if (!st->back) {
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if (st->trig) {
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ret = wait_for_completion_timeout(&st->completion,
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msecs_to_jiffies(1000));
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if (!ret) {
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@ -634,7 +645,12 @@ static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch,
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goto error_ret;
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}
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} else {
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fsleep(1);
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/*
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* If the BUSY interrupt is not available, wait enough time for
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* the longest possible conversion (max for the whole family is
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* around 350us).
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*/
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fsleep(400);
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}
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ret = ad7606_read_samples(st);
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@ -698,10 +714,6 @@ static int ad7606_read_raw(struct iio_dev *indio_dev,
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*val = st->oversampling;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SAMP_FREQ:
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/*
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* TODO: return the real frequency intead of the requested one once
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* pwm_get_state_hw comes upstream.
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*/
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pwm_get_state(st->cnvst_pwm, &cnvst_pwm_state);
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*val = DIV_ROUND_CLOSEST_ULL(NSEC_PER_SEC, cnvst_pwm_state.period);
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return IIO_VAL_INT;
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@ -1196,7 +1208,7 @@ static int ad7606_probe_channels(struct iio_dev *indio_dev)
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bool slow_bus;
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int ret, i;
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slow_bus = !st->bops->iio_backend_config;
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slow_bus = !(st->bops->iio_backend_config || st->offload_en);
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indio_dev->num_channels = st->chip_info->num_adc_channels;
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/* Slow buses also get 1 more channel for soft timestamp */
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@ -1217,7 +1229,14 @@ static int ad7606_probe_channels(struct iio_dev *indio_dev)
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chan->scan_index = i;
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chan->scan_type.sign = 's';
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chan->scan_type.realbits = st->chip_info->bits;
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chan->scan_type.storagebits = st->chip_info->bits > 16 ? 32 : 16;
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/*
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* If in SPI offload mode, storagebits are set based
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* on the spi-engine hw implementation.
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*/
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chan->scan_type.storagebits = st->offload_en ?
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st->chip_info->offload_storagebits :
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(st->chip_info->bits > 16 ? 32 : 16);
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chan->scan_type.endianness = IIO_CPU;
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if (indio_dev->modes & INDIO_DIRECT_MODE)
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@ -1335,6 +1354,13 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
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indio_dev->modes = st->bops->iio_backend_config ? 0 : INDIO_DIRECT_MODE;
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indio_dev->name = chip_info->name;
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/* Using spi-engine with offload support ? */
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if (st->bops->offload_config) {
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ret = st->bops->offload_config(dev, indio_dev);
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if (ret)
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return ret;
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}
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ret = ad7606_probe_channels(indio_dev);
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if (ret)
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return ret;
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@ -1350,7 +1376,7 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
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}
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/* If convst pin is not defined, setup PWM. */
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if (!st->gpio_convst) {
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if (!st->gpio_convst || st->offload_en) {
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st->cnvst_pwm = devm_pwm_get(dev, NULL);
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if (IS_ERR(st->cnvst_pwm))
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return PTR_ERR(st->cnvst_pwm);
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@ -1389,8 +1415,7 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
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return ret;
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indio_dev->setup_ops = &ad7606_backend_buffer_ops;
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} else {
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} else if (!st->offload_en) {
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/* Reserve the PWM use only for backend (force gpio_convst definition) */
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if (!st->gpio_convst)
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return dev_err_probe(dev, -EINVAL,
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@ -1428,7 +1453,8 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
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st->write_scale = ad7606_write_scale_hw;
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st->write_os = ad7606_write_os_hw;
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if (st->sw_mode_en) {
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/* Offload needs 1 DOUT line, applying this setting in sw_setup_cb. */
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if (st->sw_mode_en || st->offload_en) {
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indio_dev->info = &ad7606_info_sw_mode;
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st->chip_info->sw_setup_cb(indio_dev);
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}
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@ -60,6 +60,7 @@ typedef int (*ad7606_sw_setup_cb_t)(struct iio_dev *indio_dev);
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* @os_req_reset: some devices require a reset to update oversampling
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* @init_delay_ms: required delay in milliseconds for initialization
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* after a restart
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* @offload_storagebits: storage bits used by the offload hw implementation
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*/
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struct ad7606_chip_info {
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unsigned int max_samplerate;
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@ -72,6 +73,7 @@ struct ad7606_chip_info {
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unsigned int oversampling_num;
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bool os_req_reset;
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unsigned long init_delay_ms;
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u8 offload_storagebits;
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};
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/**
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@ -118,6 +120,8 @@ struct ad7606_chan_scale {
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* @trig: The IIO trigger associated with the device.
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* @completion: completion to indicate end of conversion
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* @data: buffer for reading data from the device
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* @offload_en: SPI offload enabled
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* @bus_data: bus-specific variables
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* @d16: be16 buffer for reading data from the device
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*/
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struct ad7606_state {
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@ -145,6 +149,9 @@ struct ad7606_state {
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struct iio_trigger *trig;
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struct completion completion;
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bool offload_en;
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void *bus_data;
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/*
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* DMA (thus cache coherency maintenance) may require the
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* transfer buffers to live in their own cache lines.
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@ -165,6 +172,8 @@ struct ad7606_state {
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* @read_block: function pointer for reading blocks of data
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* @sw_mode_config: pointer to a function which configured the device
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* for software mode
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* @offload_config: function pointer for configuring offload support,
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* where any
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* @reg_read: function pointer for reading spi register
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* @reg_write: function pointer for writing spi register
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* @update_scan_mode: function pointer for handling the calls to iio_info's
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@ -174,6 +183,7 @@ struct ad7606_state {
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struct ad7606_bus_ops {
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/* more methods added in future? */
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int (*iio_backend_config)(struct device *dev, struct iio_dev *indio_dev);
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int (*offload_config)(struct device *dev, struct iio_dev *indio_dev);
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int (*read_block)(struct device *dev, int num, void *data);
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int (*sw_mode_config)(struct iio_dev *indio_dev);
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int (*reg_read)(struct ad7606_state *st, unsigned int addr);
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@ -199,6 +209,8 @@ int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
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const struct ad7606_bus_ops *bops);
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int ad7606_reset(struct ad7606_state *st);
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int ad7606_pwm_set_swing(struct ad7606_state *st);
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int ad7606_pwm_set_low(struct ad7606_state *st);
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extern const struct ad7606_chip_info ad7605_4_info;
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extern const struct ad7606_chip_info ad7606_8_info;
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@ -6,15 +6,31 @@
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*/
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#include <linux/err.h>
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#include <linux/math.h>
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#include <linux/module.h>
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#include <linux/pwm.h>
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#include <linux/spi/offload/consumer.h>
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#include <linux/spi/offload/provider.h>
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#include <linux/spi/spi.h>
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#include <linux/types.h>
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#include <linux/units.h>
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#include <linux/iio/buffer-dmaengine.h>
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#include <linux/iio/iio.h>
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#include <dt-bindings/iio/adc/adi,ad7606.h>
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#include "ad7606.h"
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#define MAX_SPI_FREQ_HZ 23500000 /* VDRIVE above 4.75 V */
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struct spi_bus_data {
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struct spi_offload *offload;
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struct spi_offload_trigger *offload_trigger;
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struct spi_transfer offload_xfer;
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struct spi_message offload_msg;
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};
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static u16 ad7616_spi_rd_wr_cmd(int addr, char is_write_op)
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{
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/*
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@ -125,19 +141,211 @@ static int ad7606b_sw_mode_config(struct iio_dev *indio_dev)
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AD7606_SINGLE_DOUT);
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}
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static const struct spi_offload_config ad7606_spi_offload_config = {
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.capability_flags = SPI_OFFLOAD_CAP_TRIGGER |
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SPI_OFFLOAD_CAP_RX_STREAM_DMA,
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};
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static int ad7606_spi_offload_buffer_postenable(struct iio_dev *indio_dev)
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{
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const struct iio_scan_type *scan_type;
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struct ad7606_state *st = iio_priv(indio_dev);
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struct spi_bus_data *bus_data = st->bus_data;
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struct spi_transfer *xfer = &bus_data->offload_xfer;
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struct spi_device *spi = to_spi_device(st->dev);
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struct spi_offload_trigger_config config = {
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.type = SPI_OFFLOAD_TRIGGER_DATA_READY,
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};
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int ret;
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scan_type = &indio_dev->channels[0].scan_type;
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xfer->bits_per_word = scan_type->realbits;
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xfer->offload_flags = SPI_OFFLOAD_XFER_RX_STREAM;
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/*
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* Using SPI offload, storagebits are related to the spi-engine
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* hw implementation, can be 16 or 32, so can't be used to compute
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* struct spi_transfer.len. Using realbits instead.
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*/
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xfer->len = (scan_type->realbits > 16 ? 4 : 2) *
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st->chip_info->num_adc_channels;
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spi_message_init_with_transfers(&bus_data->offload_msg, xfer, 1);
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bus_data->offload_msg.offload = bus_data->offload;
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ret = spi_optimize_message(spi, &bus_data->offload_msg);
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if (ret) {
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dev_err(st->dev, "failed to prepare offload, err: %d\n", ret);
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return ret;
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}
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ret = spi_offload_trigger_enable(bus_data->offload,
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bus_data->offload_trigger,
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&config);
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if (ret)
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goto err_unoptimize_message;
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ret = ad7606_pwm_set_swing(st);
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if (ret)
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goto err_offload_exit_conversion_mode;
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return 0;
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err_offload_exit_conversion_mode:
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spi_offload_trigger_disable(bus_data->offload,
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bus_data->offload_trigger);
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err_unoptimize_message:
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spi_unoptimize_message(&bus_data->offload_msg);
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return ret;
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}
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static int ad7606_spi_offload_buffer_predisable(struct iio_dev *indio_dev)
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{
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struct ad7606_state *st = iio_priv(indio_dev);
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struct spi_bus_data *bus_data = st->bus_data;
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int ret;
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ret = ad7606_pwm_set_low(st);
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if (ret)
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return ret;
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spi_offload_trigger_disable(bus_data->offload,
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bus_data->offload_trigger);
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spi_unoptimize_message(&bus_data->offload_msg);
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return 0;
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}
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static const struct iio_buffer_setup_ops ad7606_offload_buffer_setup_ops = {
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.postenable = ad7606_spi_offload_buffer_postenable,
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||||
.predisable = ad7606_spi_offload_buffer_predisable,
|
||||
};
|
||||
|
||||
static bool ad7606_spi_offload_trigger_match(
|
||||
struct spi_offload_trigger *trigger,
|
||||
enum spi_offload_trigger_type type,
|
||||
u64 *args, u32 nargs)
|
||||
{
|
||||
if (type != SPI_OFFLOAD_TRIGGER_DATA_READY)
|
||||
return false;
|
||||
|
||||
/*
|
||||
* Requires 1 arg:
|
||||
* args[0] is the trigger event.
|
||||
*/
|
||||
if (nargs != 1 || args[0] != AD7606_TRIGGER_EVENT_BUSY)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
static int ad7606_spi_offload_trigger_request(
|
||||
struct spi_offload_trigger *trigger,
|
||||
enum spi_offload_trigger_type type,
|
||||
u64 *args, u32 nargs)
|
||||
{
|
||||
/* Should already be validated by match, but just in case. */
|
||||
if (nargs != 1)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ad7606_spi_offload_trigger_validate(
|
||||
struct spi_offload_trigger *trigger,
|
||||
struct spi_offload_trigger_config *config)
|
||||
{
|
||||
if (config->type != SPI_OFFLOAD_TRIGGER_DATA_READY)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct spi_offload_trigger_ops ad7606_offload_trigger_ops = {
|
||||
.match = ad7606_spi_offload_trigger_match,
|
||||
.request = ad7606_spi_offload_trigger_request,
|
||||
.validate = ad7606_spi_offload_trigger_validate,
|
||||
};
|
||||
|
||||
static int ad7606_spi_offload_probe(struct device *dev,
|
||||
struct iio_dev *indio_dev)
|
||||
{
|
||||
struct ad7606_state *st = iio_priv(indio_dev);
|
||||
struct spi_device *spi = to_spi_device(dev);
|
||||
struct spi_bus_data *bus_data;
|
||||
struct dma_chan *rx_dma;
|
||||
struct spi_offload_trigger_info trigger_info = {
|
||||
.fwnode = dev_fwnode(dev),
|
||||
.ops = &ad7606_offload_trigger_ops,
|
||||
.priv = st,
|
||||
};
|
||||
int ret;
|
||||
|
||||
bus_data = devm_kzalloc(dev, sizeof(*bus_data), GFP_KERNEL);
|
||||
if (!bus_data)
|
||||
return -ENOMEM;
|
||||
st->bus_data = bus_data;
|
||||
|
||||
bus_data->offload = devm_spi_offload_get(dev, spi,
|
||||
&ad7606_spi_offload_config);
|
||||
ret = PTR_ERR_OR_ZERO(bus_data->offload);
|
||||
if (ret && ret != -ENODEV)
|
||||
return dev_err_probe(dev, ret, "failed to get SPI offload\n");
|
||||
/* Allow main ad7606_probe function to continue. */
|
||||
if (ret == -ENODEV)
|
||||
return 0;
|
||||
|
||||
ret = devm_spi_offload_trigger_register(dev, &trigger_info);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret,
|
||||
"failed to register offload trigger\n");
|
||||
|
||||
bus_data->offload_trigger = devm_spi_offload_trigger_get(dev,
|
||||
bus_data->offload, SPI_OFFLOAD_TRIGGER_DATA_READY);
|
||||
if (IS_ERR(bus_data->offload_trigger))
|
||||
return dev_err_probe(dev, PTR_ERR(bus_data->offload_trigger),
|
||||
"failed to get offload trigger\n");
|
||||
|
||||
/* TODO: PWM setup should be ok, done for the backend. PWM mutex ? */
|
||||
rx_dma = devm_spi_offload_rx_stream_request_dma_chan(dev,
|
||||
bus_data->offload);
|
||||
if (IS_ERR(rx_dma))
|
||||
return dev_err_probe(dev, PTR_ERR(rx_dma),
|
||||
"failed to get offload RX DMA\n");
|
||||
|
||||
ret = devm_iio_dmaengine_buffer_setup_with_handle(dev, indio_dev,
|
||||
rx_dma, IIO_BUFFER_DIRECTION_IN);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret,
|
||||
"failed to setup offload RX DMA\n");
|
||||
|
||||
/* Use offload ops. */
|
||||
indio_dev->setup_ops = &ad7606_offload_buffer_setup_ops;
|
||||
|
||||
st->offload_en = true;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct ad7606_bus_ops ad7606_spi_bops = {
|
||||
.offload_config = ad7606_spi_offload_probe,
|
||||
.read_block = ad7606_spi_read_block,
|
||||
};
|
||||
|
||||
static const struct ad7606_bus_ops ad7607_spi_bops = {
|
||||
.offload_config = ad7606_spi_offload_probe,
|
||||
.read_block = ad7606_spi_read_block14to16,
|
||||
};
|
||||
|
||||
static const struct ad7606_bus_ops ad7608_spi_bops = {
|
||||
.offload_config = ad7606_spi_offload_probe,
|
||||
.read_block = ad7606_spi_read_block18to32,
|
||||
};
|
||||
|
||||
static const struct ad7606_bus_ops ad7616_spi_bops = {
|
||||
.offload_config = ad7606_spi_offload_probe,
|
||||
.read_block = ad7606_spi_read_block,
|
||||
.reg_read = ad7606_spi_reg_read,
|
||||
.reg_write = ad7606_spi_reg_write,
|
||||
@ -145,6 +353,7 @@ static const struct ad7606_bus_ops ad7616_spi_bops = {
|
||||
};
|
||||
|
||||
static const struct ad7606_bus_ops ad7606b_spi_bops = {
|
||||
.offload_config = ad7606_spi_offload_probe,
|
||||
.read_block = ad7606_spi_read_block,
|
||||
.reg_read = ad7606_spi_reg_read,
|
||||
.reg_write = ad7606_spi_reg_write,
|
||||
@ -153,6 +362,7 @@ static const struct ad7606_bus_ops ad7606b_spi_bops = {
|
||||
};
|
||||
|
||||
static const struct ad7606_bus_ops ad7606c_18_spi_bops = {
|
||||
.offload_config = ad7606_spi_offload_probe,
|
||||
.read_block = ad7606_spi_read_block18to32,
|
||||
.reg_read = ad7606_spi_reg_read,
|
||||
.reg_write = ad7606_spi_reg_write,
|
||||
@ -270,3 +480,4 @@ MODULE_AUTHOR("Michael Hennerich <michael.hennerich@analog.com>");
|
||||
MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
MODULE_IMPORT_NS("IIO_AD7606");
|
||||
MODULE_IMPORT_NS("IIO_DMAENGINE_BUFFER");
|
||||
|
||||
Loading…
Reference in New Issue
Block a user