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dt-bindings: phy: rename phy nodename in phy-rockchip-inno-usb2.yaml

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The pattern: "^(|usb-|usb2-|usb3-|pci-|pcie-|sata-)phy(@[0-9a-f,]+)*$"
in phy-provider.yaml has required "#phy-cells" for phy nodes.
The "phy-cells" in rockchip-inno-usb2 nodes are located in subnodes.
Rename the nodename to pattern "usb2phy@[0-9a-f]+$" to prevent
notifications. Remove unneeded "#phy-cells" from parent node.
Also sort example.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=~/.local/lib/python3.5/site-packages/dtschema/schemas/
phy/phy-provider.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Link: https://lore.kernel.org/r/20210601164800.7670-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Johan Jonker 2021-06-01 18:47:56 +02:00 committed by Heiko Stuebner
parent 2ed2732ef2
commit e71ccdff37
2 changed files with 5 additions and 10 deletions
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11
Documentation/devicetree/bindings/phy/phy-rockchip-inno-usb2.yaml
View File

@ -29,9 +29,6 @@ properties:
"#clock-cells": "#clock-cells":
const: 0 const: 0
"#phy-cells":
const: 0
clocks: clocks:
maxItems: 1 maxItems: 1
@ -119,7 +116,6 @@ required:
- reg - reg
- clock-output-names - clock-output-names
- "#clock-cells" - "#clock-cells"
- "#phy-cells"
- host-port - host-port
- otg-port - otg-port
@ -130,26 +126,25 @@ examples:
#include <dt-bindings/clock/rk3399-cru.h> #include <dt-bindings/clock/rk3399-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/interrupt-controller/irq.h>
u2phy0: usb2-phy@e450 { u2phy0: usb2phy@e450 {
compatible = "rockchip,rk3399-usb2phy"; compatible = "rockchip,rk3399-usb2phy";
reg = <0xe450 0x10>; reg = <0xe450 0x10>;
clocks = <&cru SCLK_USB2PHY0_REF>; clocks = <&cru SCLK_USB2PHY0_REF>;
clock-names = "phyclk"; clock-names = "phyclk";
clock-output-names = "clk_usbphy0_480m"; clock-output-names = "clk_usbphy0_480m";
#clock-cells = <0>; #clock-cells = <0>;
#phy-cells = <0>;
u2phy0_host: host-port { u2phy0_host: host-port {
#phy-cells = <0>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "linestate"; interrupt-names = "linestate";
#phy-cells = <0>;
}; };
u2phy0_otg: otg-port { u2phy0_otg: otg-port {
#phy-cells = <0>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>, interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>, <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>; <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "otg-bvalid", "otg-id", "linestate"; interrupt-names = "otg-bvalid", "otg-id", "linestate";
#phy-cells = <0>;
}; };
}; };

4
Documentation/devicetree/bindings/soc/rockchip/grf.yaml
View File

@ -184,7 +184,7 @@ allOf:
- "#size-cells" - "#size-cells"
patternProperties: patternProperties:
"usb2-phy@[0-9a-f]+$": "usb2phy@[0-9a-f]+$":
type: object type: object
$ref: "/schemas/phy/phy-rockchip-inno-usb2.yaml#" $ref: "/schemas/phy/phy-rockchip-inno-usb2.yaml#"
@ -233,7 +233,7 @@ examples:
#phy-cells = <0>; #phy-cells = <0>;
}; };
u2phy0: usb2-phy@e450 { u2phy0: usb2phy@e450 {
compatible = "rockchip,rk3399-usb2phy"; compatible = "rockchip,rk3399-usb2phy";
reg = <0xe450 0x10>; reg = <0xe450 0x10>;
clocks = <&cru SCLK_USB2PHY0_REF>; clocks = <&cru SCLK_USB2PHY0_REF>;