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ARM: dts: imx6qdl-skov-cpu: configure ethernet reference clock parent
On this board the PHY is the ref clock provider. So, configure ethernet reference clock as input. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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c812c91bda
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c89614079e
@ -105,6 +105,7 @@ clk50m_phy: phy-clock {
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compatible = "fixed-clock";
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compatible = "fixed-clock";
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#clock-cells = <0>;
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-frequency = <50000000>;
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clock-output-names = "enet_ref_pad";
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};
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};
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reg_3v3: regulator-3v3 {
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reg_3v3: regulator-3v3 {
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@ -232,13 +233,16 @@ adc: adc@0 {
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};
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};
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};
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};
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&clks {
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clocks = <&clk50m_phy>;
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clock-names = "enet_ref_pad";
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assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
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assigned-clock-parents = <&clk50m_phy>;
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};
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&fec {
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&fec {
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pinctrl-names = "default";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_enet>;
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pinctrl-0 = <&pinctrl_enet>;
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clocks = <&clks IMX6QDL_CLK_ENET>,
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<&clks IMX6QDL_CLK_ENET>,
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<&clk50m_phy>;
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clock-names = "ipg", "ahb", "ptp";
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phy-mode = "rmii";
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phy-mode = "rmii";
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phy-supply = <®_3v3>;
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phy-supply = <®_3v3>;
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status = "okay";
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status = "okay";
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