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iommufd: Add fault and response message definitions
iommu_hwpt_pgfaults represent fault messages that the userspace can retrieve. Multiple iommu_hwpt_pgfaults might be put in an iopf group, with the IOMMU_PGFAULT_FLAGS_LAST_PAGE flag set only for the last iommu_hwpt_pgfault. An iommu_hwpt_page_response is a response message that the userspace should send to the kernel after finishing handling a group of fault messages. The @dev_id, @pasid, and @grpid fields in the message identify an outstanding iopf group for a device. The @cookie field, which matches the cookie field of the last fault in the group, will be used by the kernel to look up the pending message. Link: https://lore.kernel.org/r/20240702063444.105814-6-baolu.lu@linux.intel.com Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Reviewed-by: Kevin Tian <kevin.tian@intel.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@ -692,4 +692,87 @@ struct iommu_hwpt_invalidate {
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__u32 __reserved;
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};
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#define IOMMU_HWPT_INVALIDATE _IO(IOMMUFD_TYPE, IOMMUFD_CMD_HWPT_INVALIDATE)
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/**
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* enum iommu_hwpt_pgfault_flags - flags for struct iommu_hwpt_pgfault
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* @IOMMU_PGFAULT_FLAGS_PASID_VALID: The pasid field of the fault data is
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* valid.
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* @IOMMU_PGFAULT_FLAGS_LAST_PAGE: It's the last fault of a fault group.
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*/
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enum iommu_hwpt_pgfault_flags {
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IOMMU_PGFAULT_FLAGS_PASID_VALID = (1 << 0),
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IOMMU_PGFAULT_FLAGS_LAST_PAGE = (1 << 1),
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};
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/**
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* enum iommu_hwpt_pgfault_perm - perm bits for struct iommu_hwpt_pgfault
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* @IOMMU_PGFAULT_PERM_READ: request for read permission
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* @IOMMU_PGFAULT_PERM_WRITE: request for write permission
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* @IOMMU_PGFAULT_PERM_EXEC: (PCIE 10.4.1) request with a PASID that has the
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* Execute Requested bit set in PASID TLP Prefix.
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* @IOMMU_PGFAULT_PERM_PRIV: (PCIE 10.4.1) request with a PASID that has the
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* Privileged Mode Requested bit set in PASID TLP
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* Prefix.
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*/
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enum iommu_hwpt_pgfault_perm {
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IOMMU_PGFAULT_PERM_READ = (1 << 0),
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IOMMU_PGFAULT_PERM_WRITE = (1 << 1),
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IOMMU_PGFAULT_PERM_EXEC = (1 << 2),
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IOMMU_PGFAULT_PERM_PRIV = (1 << 3),
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};
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/**
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* struct iommu_hwpt_pgfault - iommu page fault data
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* @flags: Combination of enum iommu_hwpt_pgfault_flags
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* @dev_id: id of the originated device
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* @pasid: Process Address Space ID
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* @grpid: Page Request Group Index
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* @perm: Combination of enum iommu_hwpt_pgfault_perm
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* @addr: Fault address
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* @length: a hint of how much data the requestor is expecting to fetch. For
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* example, if the PRI initiator knows it is going to do a 10MB
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* transfer, it could fill in 10MB and the OS could pre-fault in
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* 10MB of IOVA. It's default to 0 if there's no such hint.
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* @cookie: kernel-managed cookie identifying a group of fault messages. The
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* cookie number encoded in the last page fault of the group should
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* be echoed back in the response message.
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*/
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struct iommu_hwpt_pgfault {
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__u32 flags;
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__u32 dev_id;
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__u32 pasid;
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__u32 grpid;
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__u32 perm;
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__u64 addr;
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__u32 length;
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__u32 cookie;
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};
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/**
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* enum iommufd_page_response_code - Return status of fault handlers
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* @IOMMUFD_PAGE_RESP_SUCCESS: Fault has been handled and the page tables
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* populated, retry the access. This is the
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* "Success" defined in PCI 10.4.2.1.
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* @IOMMUFD_PAGE_RESP_INVALID: Could not handle this fault, don't retry the
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* access. This is the "Invalid Request" in PCI
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* 10.4.2.1.
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* @IOMMUFD_PAGE_RESP_FAILURE: General error. Drop all subsequent faults from
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* this device if possible. This is the "Response
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* Failure" in PCI 10.4.2.1.
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*/
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enum iommufd_page_response_code {
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IOMMUFD_PAGE_RESP_SUCCESS = 0,
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IOMMUFD_PAGE_RESP_INVALID,
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IOMMUFD_PAGE_RESP_FAILURE,
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};
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/**
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* struct iommu_hwpt_page_response - IOMMU page fault response
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* @cookie: The kernel-managed cookie reported in the fault message.
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* @code: One of response code in enum iommufd_page_response_code.
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*/
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struct iommu_hwpt_page_response {
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__u32 cookie;
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__u32 code;
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};
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#endif
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