arm64: dts: rockchip: Add Orange Pi 5 Max board

The RK3588 Single Board Computer includes
- eMMC
- microSD
- UART
- 2 PWM LEDs
- RTC
- RTL8125 network controller on PCIe 2.0x1.
- M.2 M-key connector routed to PCIe 3.0x4
- PWM controlled heat sink fan.
- 2 USB2 ports
- lower USB3 port
- upper USB3 port with OTG capability
- Mali GPU
- SPI NOR flash
- Mask Rom button
- Analog audio using es8388 codec via the headset jack and onboard mic
- HDMI0
- HDMI1

the vcc5v0_usb30 regulator shares the same enable gpio pin as the
vcc5v0_usb20 regulator.

The Orange Pi 5 Max and Orange Pi 5 Ultra are both credit-card sized
boards with similar layout, so these boards will share a common dtsi.
The 5 Max has an extra HDMI0 while the 5 Ultra has a HDMI IN instead.

Signed-off-by: Jimmy Hon <honyuenkwun@gmail.com>
Link: https://lore.kernel.org/r/20250109051619.1825-4-honyuenkwun@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Jimmy Hon 2025-01-08 23:16:17 -06:00 committed by Heiko Stuebner
parent 6327f2d83d
commit c600d252dc
4 changed files with 220 additions and 0 deletions

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@ -147,6 +147,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-jaguar.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-nanopc-t6-lts.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-ok3588-c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-max.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-orangepi-5-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-quartzpro64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3588-rock-5-itx.dtb

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@ -0,0 +1,151 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3588-orangepi-5.dtsi"
/ {
model = "Xunlong Orange Pi 5 Max";
compatible = "xunlong,orangepi-5-max", "rockchip,rk3588";
vcc5v0_usb30_otg: vcc5v0-usb30-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
/* USB_OTG_PWREN */
gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_otg_pwren>;
regulator-name = "vcc5v0_usb30_otg";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_sys>;
};
};
&headphone_amp {
/* PHONE_CTL */
enable-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
};
&analog_sound {
pinctrl-names = "default";
pinctrl-0 = <&hp_detect>;
simple-audio-card,aux-devs = <&headphone_amp>;
simple-audio-card,hp-det-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
simple-audio-card,routing =
"Headphones", "LOUT1",
"Headphones", "ROUT1",
"LINPUT1", "Microphone Jack",
"RINPUT1", "Microphone Jack",
"LINPUT2", "Onboard Microphone",
"RINPUT2", "Onboard Microphone";
simple-audio-card,widgets =
"Microphone", "Microphone Jack",
"Microphone", "Onboard Microphone",
"Headphone", "Headphones";
};
&fan {
/* FAN_CTL_H */
pwms = <&pwm9 0 50000 0>;
};
&hym8563 {
interrupt-parent = <&gpio0>;
interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&rtc_int_l>;
};
&led_blue_pwm {
/* PWM_LED1 */
pwms = <&pwm4 0 25000 0>;
status = "okay";
};
&led_green_pwm {
/* PWM_LED2 */
pwms = <&pwm5 0 25000 0>;
};
/* phy2 */
&pcie2x1l1 {
reset-gpios = <&gpio4 RK_PD4 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie_eth>;
status = "okay";
};
&pinctrl {
hym8563 {
rtc_int_l: hym8563-int {
rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sound {
hp_detect: hp-detect {
rockchip,pins = <3 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb {
usb_host_pwren: usb-host-pwren {
rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&pwm4 {
pinctrl-names = "default";
pinctrl-0 = <&pwm4m0_pins>;
status = "okay";
};
&pwm5 {
pinctrl-names = "default";
pinctrl-0 = <&pwm5m1_pins>;
status = "okay";
};
&pwm9 {
pinctrl-names = "default";
pinctrl-0 = <&pwm9m2_pins>;
status = "okay";
};
&sfc {
pinctrl-names = "default";
pinctrl-0 = <&fspim2_pins>;
};
&u2phy0_otg {
phy-supply = <&vcc5v0_usb30_otg>;
};
&u2phy1_otg {
phy-supply = <&vcc5v0_usb20>;
};
&usb_host0_xhci {
dr_mode = "host";
};
/* pcie eth. not a real regulator. 33VAUX */
&vcc3v3_pcie_eth {
/* Ethernet_power_en */
gpios = <&gpio0 RK_PD3 GPIO_ACTIVE_LOW>;
};
/*
* Represents the vcc5v0_usb20 and vcc5v0_usb30 in the schematic,
* both regulators share the same enable gpio
*/
&vcc5v0_usb20 {
/* USB_HOST_PWREN */
gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb_host_pwren>;
};

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@ -0,0 +1,60 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,vop2.h>
#include "rk3588-orangepi-5-compact.dtsi"
/ {
model = "Xunlong Orange Pi 5 Max";
compatible = "xunlong,orangepi-5-max", "rockchip,rk3588";
hdmi0-con {
compatible = "hdmi-connector";
type = "a";
port {
hdmi0_con_in: endpoint {
remote-endpoint = <&hdmi0_out_con>;
};
};
};
};
&hdmi0 {
status = "okay";
};
&hdmi0_in {
hdmi0_in_vp0: endpoint {
remote-endpoint = <&vp0_out_hdmi0>;
};
};
&hdmi0_out {
hdmi0_out_con: endpoint {
remote-endpoint = <&hdmi0_con_in>;
};
};
&hdptxphy_hdmi0 {
status = "okay";
};
&pinctrl {
usb {
usb_otg_pwren: usb-otg-pwren {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&vp0 {
vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 {
reg = <ROCKCHIP_VOP2_EP_HDMI0>;
remote-endpoint = <&hdmi0_in_vp0>;
};
};

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@ -83,6 +83,14 @@ fan: pwm-fan {
pwm-leds {
compatible = "pwm-leds";
led_blue_pwm: led-1 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
linux,default-trigger = "heartbeat";
max-brightness = <255>;
status = "disabled";
};
led_green_pwm: led-2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_INDICATOR;