mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
synced 2025-09-07 14:19:35 +00:00
arm64: dts: ti: Add support for phyBOARD-Electra-AM642
Add basic support for phyCORE-AM64x SoM & phyBOARD-Electra-AM642 CB. The phyCORE-AM64x [1] is a SoM (System on Module) featuring TI's AM64x SoC. It can be used in combination with different carrier boards. This module can come with different sizes and models for DDR, eMMC, SPI NOR Flash and various SoCs from the AM64x family. A development Kit, called phyBOARD-Electra [2] is used as a carrier board reference design around the AM64x SoM. Supported features: * Debug UART * Heartbeat LED * GPIO buttons & LEDs * SPI NOR flash * eMMC * CAN * Ethernet * Micro SD card * I2C EEPROM * I2C RTC * I2C LED Dimmer * USB For more details, see: [1] Product page SoM: https://www.phytec.com/product/phycore-am64x [2] Product page CB: https://www.phytec.com/product/phyboard-am64x Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Reviewed-by: Ravi Gunasekaran <r-gunasekaran@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20230104162927.1215033-2-w.egorov@phytec.de
This commit is contained in:
Wadim Egorov
Vignesh Raghavendra
parent
86fc17d849
commit
c48ac0efe6
@ -23,6 +23,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-j784s4-evm.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am642-phyboard-electra-rdk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb
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dtb-$(CONFIG_ARCH_K3) += k3-am625-sk.dtb
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231
arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
Normal file
231
arch/arm64/boot/dts/ti/k3-am64-phycore-som.dtsi
Normal file
@ -0,0 +1,231 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
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* Author: Matt McKee <mmckee@phytec.com>
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*
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* Copyright (C) 2022 PHYTEC Messtechnik GmbH
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* Author: Wadim Egorov <w.egorov@phytec.de>
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*
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* Product homepage:
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* https://www.phytec.com/product/phycore-am64x
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*/
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/net/ti-dp83867.h>
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/ {
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model = "PHYTEC phyCORE-AM64x";
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compatible = "phytec,am64-phycore-som", "ti,am642";
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aliases {
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ethernet0 = &cpsw_port1;
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mmc0 = &sdhci0;
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rtc0 = &i2c_som_rtc;
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x00000000 0x80000000 0x00000000 0x80000000>;
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};
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reserved-memory {
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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secure_ddr: optee@9e800000 {
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reg = <0x00 0x9e800000 0x00 0x01800000>; /* for OP-TEE */
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alignment = <0x1000>;
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no-map;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins_default>;
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led-0 {
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&main_gpio0 12 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "heartbeat";
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function = LED_FUNCTION_HEARTBEAT;
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};
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};
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vcc_5v0_som: regulator-vcc-5v0-som {
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/* VIN / VCC_5V0_SOM */
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compatible = "regulator-fixed";
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regulator-name = "VCC_5V0_SOM";
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-always-on;
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regulator-boot-on;
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};
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};
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&main_pmx0 {
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cpsw_mdio_pins_default: cpsw-mdio-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x01f8, PIN_INPUT, 4) /* (P5) PRG0_PRU1_GPO18.MDIO0_MDIO */
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AM64X_IOPAD(0x01fc, PIN_OUTPUT, 4) /* (R2) PRG0_PRU1_GPO19.MDIO0_MDC */
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AM64X_IOPAD(0x0100, PIN_OUTPUT, 7) /* (V7) PRG1_PRU0_GPO18.GPIO0_63 */
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>;
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};
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cpsw_rgmii1_pins_default: cpsw-rgmii1-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0184, PIN_INPUT, 4) /* (W6) PRG0_PRU0_GPO9.RGMII1_RX_CTL */
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AM64X_IOPAD(0x0188, PIN_INPUT, 4) /* (AA5) PRG0_PRU0_GPO10.RGMII1_RXC */
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AM64X_IOPAD(0x00dc, PIN_OUTPUT, 4) /* (U15) PRG1_PRU0_GPO9.RGMII1_TX_CTL */
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AM64X_IOPAD(0x00e0, PIN_OUTPUT, 4) /* (U14) PRG1_PRU0_GPO10.RGMII1_TXC */
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AM64X_IOPAD(0x01cc, PIN_INPUT, 4) /* (W5) PRG0_PRU1_GPO7.RGMII1_RD0 */
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AM64X_IOPAD(0x0124, PIN_OUTPUT, 4) /* (V15) PRG1_PRU1_GPO7.RGMII1_TD0 */
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AM64X_IOPAD(0x01d4, PIN_INPUT, 4) /* (Y5) PRG0_PRU1_GPO9.RGMII1_RD1 */
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AM64X_IOPAD(0x012c, PIN_OUTPUT, 4) /* (V14) PRG1_PRU1_GPO9.RGMII1_TD1 */
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AM64X_IOPAD(0x01d8, PIN_INPUT, 4) /* (V6) PRG0_PRU1_GPO10.RGMII1_RD2 */
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AM64X_IOPAD(0x0130, PIN_OUTPUT, 4) /* (W14) PRG1_PRU1_GPO10.RGMII1_TD2 */
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AM64X_IOPAD(0x01f4, PIN_INPUT, 4) /* (V5) PRG0_PRU1_GPO17.RGMII1_RD3 */
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AM64X_IOPAD(0x014c, PIN_OUTPUT, 4) /* (AA14) PRG1_PRU1_GPO17.RGMII1_TD3 */
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AM64X_IOPAD(0x0154, PIN_INPUT, 7) /* (V12) PRG1_PRU1_GPO19.GPIO0_84 */
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>;
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};
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eeprom_wp_pins_default: eeprom-wp-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0208, PIN_OUTPUT, 7) /* (D12) SPI0_CS0.GPIO1_42 */
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>;
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};
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leds_pins_default: leds-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0030, PIN_OUTPUT, 7) /* (L18) OSPI0_CSn1.GPIO0_12 */
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>;
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};
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main_i2c0_pins_default: main-i2c0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0260, PIN_INPUT, 0) /* (A18) I2C0_SCL */
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AM64X_IOPAD(0x0264, PIN_INPUT, 0) /* (B18) I2C0_SDA */
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>;
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};
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ospi0_pins_default: ospi0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0000, PIN_OUTPUT, 0) /* (N20) OSPI0_CLK */
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AM64X_IOPAD(0x0008, PIN_INPUT, 0) /* (N19) OSPI0_DQS */
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AM64X_IOPAD(0x000c, PIN_INPUT, 0) /* (M19) OSPI0_D0 */
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AM64X_IOPAD(0x0010, PIN_INPUT, 0) /* (M18) OSPI0_D1 */
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AM64X_IOPAD(0x0014, PIN_INPUT, 0) /* (M20) OSPI0_D2 */
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AM64X_IOPAD(0x0018, PIN_INPUT, 0) /* (M21) OSPI0_D3 */
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AM64X_IOPAD(0x001c, PIN_INPUT, 0) /* (P21) OSPI0_D4 */
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AM64X_IOPAD(0x0020, PIN_INPUT, 0) /* (P20) OSPI0_D5 */
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AM64X_IOPAD(0x0024, PIN_INPUT, 0) /* (N18) OSPI0_D6 */
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AM64X_IOPAD(0x0028, PIN_INPUT, 0) /* (M17) OSPI0_D7 */
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AM64X_IOPAD(0x002c, PIN_OUTPUT, 0) /* (L19) OSPI0_CSn0 */
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>;
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};
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};
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&cpsw3g {
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pinctrl-names = "default";
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pinctrl-0 = <&cpsw_rgmii1_pins_default>;
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};
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&cpsw3g_mdio {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&cpsw_mdio_pins_default>;
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cpsw3g_phy1: ethernet-phy@1 {
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compatible = "ethernet-phy-id2000.a231", "ethernet-phy-ieee802.3-c22";
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reg = <1>;
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interrupt-parent = <&main_gpio0>;
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interrupts = <84 IRQ_TYPE_EDGE_FALLING>;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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reset-gpios = <&main_gpio0 63 GPIO_ACTIVE_LOW>;
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reset-assert-us = <1000>;
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reset-deassert-us = <1000>;
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};
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};
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&cpsw_port1 {
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phy-mode = "rgmii-rxid";
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phy-handle = <&cpsw3g_phy1>;
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};
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&cpsw_port2 {
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status = "disabled";
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};
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&mailbox0_cluster2 {
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status = "disabled";
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};
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&mailbox0_cluster3 {
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status = "disabled";
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};
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&mailbox0_cluster4 {
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status = "disabled";
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};
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&mailbox0_cluster5 {
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status = "disabled";
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};
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&mailbox0_cluster6 {
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status = "disabled";
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};
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&mailbox0_cluster7 {
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status = "disabled";
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};
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&main_i2c0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&main_i2c0_pins_default>;
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clock-frequency = <400000>;
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eeprom@50 {
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compatible = "atmel,24c32";
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pinctrl-names = "default";
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pinctrl-0 = <&eeprom_wp_pins_default>;
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pagesize = <32>;
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reg = <0x50>;
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};
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i2c_som_rtc: rtc@52 {
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compatible = "microcrystal,rv3028";
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reg = <0x52>;
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};
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};
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&ospi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&ospi0_pins_default>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <8>;
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spi-rx-bus-width = <8>;
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spi-max-frequency = <25000000>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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cdns,read-delay = <0>;
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};
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};
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&sdhci0 {
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bus-width = <8>;
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non-removable;
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ti,driver-strength-ohm = <50>;
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disable-wp;
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keep-power-in-suspend;
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};
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277
arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
Normal file
277
arch/arm64/boot/dts/ti/k3-am642-phyboard-electra-rdk.dts
Normal file
@ -0,0 +1,277 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2021 PHYTEC America, LLC - https://www.phytec.com
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* Author: Matt McKee <mmckee@phytec.com>
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*
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* Copyright (C) 2022 PHYTEC Messtechnik GmbH
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* Author: Wadim Egorov <w.egorov@phytec.de>
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*
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* Product homepage:
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* https://www.phytec.com/product/phyboard-am64x
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*/
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/mux/ti-serdes.h>
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#include <dt-bindings/phy/phy.h>
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#include "k3-am642.dtsi"
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#include "k3-am64-phycore-som.dtsi"
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/ {
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compatible = "phytec,am642-phyboard-electra-rdk",
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"phytec,am64-phycore-som", "ti,am642";
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model = "PHYTEC phyBOARD-Electra-AM64x RDK";
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aliases {
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mmc1 = &sdhci1;
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serial2 = &main_uart0;
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serial3 = &main_uart1;
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};
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chosen {
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stdout-path = &main_uart0;
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};
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can_tc1: can-phy0 {
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compatible = "ti,tcan1042";
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pinctrl-names = "default";
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pinctrl-0 = <&can_tc1_pins_default>;
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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standby-gpios = <&main_gpio0 32 GPIO_ACTIVE_HIGH>;
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};
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can_tc2: can-phy1 {
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compatible = "ti,tcan1042";
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pinctrl-names = "default";
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pinctrl-0 = <&can_tc2_pins_default>;
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#phy-cells = <0>;
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max-bitrate = <5000000>;
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standby-gpios = <&main_gpio0 35 GPIO_ACTIVE_HIGH>;
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};
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keys {
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compatible = "gpio-keys";
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autorepeat;
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pinctrl-names = "default";
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pinctrl-0 = <&gpio_keys_pins_default>;
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key-home {
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label = "home";
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linux,code = <KEY_HOME>;
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gpios = <&main_gpio0 17 GPIO_ACTIVE_HIGH>;
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};
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key-menu {
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label = "menu";
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linux,code = <KEY_MENU>;
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gpios = <&main_gpio0 21 GPIO_ACTIVE_HIGH>;
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&leds_pins_default &user_leds_pins_default>;
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led-1 {
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color = <LED_COLOR_ID_RED>;
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gpios = <&main_gpio0 15 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc0";
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function = LED_FUNCTION_DISK;
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};
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led-2 {
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&main_gpio0 16 GPIO_ACTIVE_HIGH>;
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linux,default-trigger = "mmc1";
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function = LED_FUNCTION_DISK;
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};
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};
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vcc_3v3_mmc: regulator-sd {
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/* TPS22963C */
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compatible = "regulator-fixed";
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regulator-name = "VCC_3V3_MMC";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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regulator-boot-on;
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regulator-always-on;
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};
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};
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&main_pmx0 {
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can_tc1_pins_default: can-tc1-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0084, PIN_OUTPUT, 7) /* (P16) GPMC0_ADVn_ALE.GPIO0_32 */
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>;
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};
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can_tc2_pins_default: can-tc2-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0090, PIN_OUTPUT, 7) /* (P17) GPMC0_BE0n_CLE.GPIO0_35 */
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>;
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};
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gpio_keys_pins_default: gpio-keys-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0044, PIN_INPUT, 7) /* (T18) GPMC0_AD2.GPIO0_17 */
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AM64X_IOPAD(0x0054, PIN_INPUT, 7) /* (V20) GPMC0_AD6.GPIO0_21 */
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>;
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};
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main_i2c1_pins_default: main-i2c1-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0268, PIN_INPUT, 0) /* (C18) I2C1_SCL */
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AM64X_IOPAD(0x026c, PIN_INPUT, 0) /* (B19) I2C1_SDA */
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>;
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};
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main_mcan0_pins_default: main-mcan0-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */
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AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */
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>;
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};
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main_mcan1_pins_default: main-mcan1-pins-default {
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pinctrl-single,pins = <
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AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */
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AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */
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>;
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};
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main_mmc1_pins_default: main-mmc1-pins-default {
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||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
|
||||
AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
|
||||
AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
|
||||
AM64X_IOPAD(0x0288, PIN_INPUT_PULLUP, 0) /* (K21) MMC1_DAT0 */
|
||||
AM64X_IOPAD(0x028c, PIN_INPUT_PULLDOWN, 0) /* (L20) MMC1_CLK */
|
||||
AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */
|
||||
AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
|
||||
AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_uart0_pins_default: main-uart0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x0230, PIN_INPUT, 0) /* (D15) UART0_RXD */
|
||||
AM64X_IOPAD(0x0234, PIN_OUTPUT, 0) /* (C16) UART0_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_uart1_pins_default: main-uart1-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
|
||||
AM64X_IOPAD(0x024C, PIN_OUTPUT, 0) /* (E16) UART1_RTSn */
|
||||
AM64X_IOPAD(0x0240, PIN_INPUT, 0) /* (E15) UART1_RXD */
|
||||
AM64X_IOPAD(0x0244, PIN_OUTPUT, 0) /* (E14) UART1_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_usb0_pins_default: main-usb0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x02a8, PIN_OUTPUT, 0) /* (E19) USB0_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
|
||||
pcie_usb_sel_pins_default: pcie-usb-sel-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x017c, PIN_OUTPUT, 7) /* (T1) PRG0_PRU0_GPO7.GPIO1_7 */
|
||||
>;
|
||||
};
|
||||
|
||||
pcie0_pins_default: pcie0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x0098, PIN_OUTPUT, 7) /* (W19) GPMC0_WAIT0.GPIO0_37 */
|
||||
>;
|
||||
};
|
||||
|
||||
user_leds_pins_default: user-leds-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
AM64X_IOPAD(0x003c, PIN_OUTPUT, 7) /* (T20) GPMC0_AD0.GPIO0_15 */
|
||||
AM64X_IOPAD(0x0040, PIN_OUTPUT, 7) /* (U21) GPMC0_AD1.GPIO0_16 */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c02";
|
||||
pagesize = <16>;
|
||||
reg = <0x51>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_mcan0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mcan0_pins_default>;
|
||||
phys = <&can_tc1>;
|
||||
};
|
||||
|
||||
&main_mcan1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mcan1_pins_default>;
|
||||
phys = <&can_tc2>;
|
||||
};
|
||||
|
||||
&main_uart0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart0_pins_default>;
|
||||
};
|
||||
|
||||
&main_uart1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_uart1_pins_default>;
|
||||
uart-has-rtscts;
|
||||
};
|
||||
|
||||
&sdhci1 {
|
||||
vmmc-supply = <&vcc_3v3_mmc>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
bus-width = <4>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
disable-wp;
|
||||
no-1-8-v;
|
||||
};
|
||||
|
||||
&serdes0 {
|
||||
serdes0_pcie_usb_link: phy@0 {
|
||||
reg = <0>;
|
||||
cdns,num-lanes = <1>;
|
||||
#phy-cells = <0>;
|
||||
cdns,phy-type = <PHY_TYPE_USB3>;
|
||||
resets = <&serdes_wiz0 1>;
|
||||
};
|
||||
};
|
||||
|
||||
&serdes_ln_ctrl {
|
||||
idle-states = <AM64_SERDES0_LANE0_USB>;
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
ti,vbus-divider;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_usb0_pins_default>;
|
||||
dr_mode = "host";
|
||||
maximum-speed = "super-speed";
|
||||
phys = <&serdes0_pcie_usb_link>;
|
||||
phy-names = "cdns3,usb3-phy";
|
||||
};
|
||||
Loading…
Reference in New Issue
Block a user