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arm64: dts: qcom: msm8953: add APPS IOMMU
Add the nodes describing the iommu and its context banks that are found on msm8953 SoCs. Signed-off-by: Vladimir Lypak <vladimir.lypak@gmail.com> Signed-off-by: Luca Weiss <luca@z3ntu.xyz> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221016161554.673006-3-luca@z3ntu.xyz
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@ -726,6 +726,42 @@ tcsr_phy_clk_scheme_sel: syscon@193f044 {
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reg = <0x193f044 0x4>;
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reg = <0x193f044 0x4>;
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};
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};
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apps_iommu: iommu@1e00000 {
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compatible = "qcom,msm8953-iommu", "qcom,msm-iommu-v1";
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ranges = <0 0x1e20000 0x20000>;
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clocks = <&gcc GCC_SMMU_CFG_CLK>,
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<&gcc GCC_APSS_TCU_ASYNC_CLK>;
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clock-names = "iface", "bus";
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qcom,iommu-secure-id = <17>;
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#address-cells = <1>;
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#iommu-cells = <1>;
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#size-cells = <1>;
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// vfe
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iommu-ctx@14000 {
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compatible = "qcom,msm-iommu-v1-ns";
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reg = <0x14000 0x1000>;
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interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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};
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// mdp_0
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iommu-ctx@15000 {
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compatible = "qcom,msm-iommu-v1-ns";
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reg = <0x15000 0x1000>;
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interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
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};
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// venus_ns
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iommu-ctx@16000 {
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compatible = "qcom,msm-iommu-v1-ns";
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reg = <0x16000 0x1000>;
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interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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spmi_bus: spmi@200f000 {
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spmi_bus: spmi@200f000 {
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compatible = "qcom,spmi-pmic-arb";
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compatible = "qcom,spmi-pmic-arb";
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reg = <0x200f000 0x1000>,
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reg = <0x200f000 0x1000>,
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