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arm64: dts: qcom: sm6350: add uart1 node

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Add the node describing uart1 incl. opp table and pinctrl.

Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230421-fp4-bluetooth-v2-3-3de840d5483e@fairphone.com
This commit is contained in:
Luca Weiss 2023-05-12 15:58:25 +02:00 committed by Bjorn Andersson
parent 4b2c7ac8e4
commit b179f35b88
1 changed files with 63 additions and 0 deletions
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63
arch/arm64/boot/dts/qcom/sm6350.dtsi
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@ -464,6 +464,25 @@ opp-2073600000 {
}; };
}; };
qup_opp_table: opp-table-qup {
compatible = "operating-points-v2";
opp-75000000 {
opp-hz = /bits/ 64 <75000000>;
required-opps = <&rpmhpd_opp_low_svs>;
};
opp-100000000 {
opp-hz = /bits/ 64 <100000000>;
required-opps = <&rpmhpd_opp_svs>;
};
opp-128000000 {
opp-hz = /bits/ 64 <128000000>;
required-opps = <&rpmhpd_opp_nom>;
};
};
pmu { pmu {
compatible = "arm,armv8-pmuv3"; compatible = "arm,armv8-pmuv3";
interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_LOW>; interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_LOW>;
@ -882,6 +901,22 @@ i2c0: i2c@880000 {
status = "disabled"; status = "disabled";
}; };
uart1: serial@884000 {
compatible = "qcom,geni-uart";
reg = <0 0x00884000 0 0x4000>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
pinctrl-names = "default";
pinctrl-0 = <&qup_uart1_cts>, <&qup_uart1_rts>, <&qup_uart1_tx>, <&qup_uart1_rx>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&rpmhpd SM6350_CX>;
operating-points-v2 = <&qup_opp_table>;
interconnects = <&clk_virt MASTER_QUP_CORE_0 0 &clk_virt SLAVE_QUP_CORE_0 0>,
<&aggre1_noc MASTER_QUP_0 0 &clk_virt SLAVE_EBI_CH0 0>;
interconnect-names = "qup-core", "qup-config";
status = "disabled";
};
i2c2: i2c@888000 { i2c2: i2c@888000 {
compatible = "qcom,geni-i2c"; compatible = "qcom,geni-i2c";
reg = <0 0x00888000 0 0x4000>; reg = <0 0x00888000 0 0x4000>;
@ -1867,6 +1902,34 @@ qup_i2c10_default: qup-i2c10-default-state {
drive-strength = <2>; drive-strength = <2>;
bias-pull-up; bias-pull-up;
}; };
qup_uart1_cts: qup-uart1-cts-default-state {
pins = "gpio61";
function = "qup01";
drive-strength = <2>;
bias-disable;
};
qup_uart1_rts: qup-uart1-rts-default-state {
pins = "gpio62";
function = "qup01";
drive-strength = <2>;
bias-pull-down;
};
qup_uart1_rx: qup-uart1-rx-default-state {
pins = "gpio64";
function = "qup01";
drive-strength = <2>;
bias-disable;
};
qup_uart1_tx: qup-uart1-tx-default-state {
pins = "gpio63";
function = "qup01";
drive-strength = <2>;
bias-pull-up;
};
}; };
apps_smmu: iommu@15000000 { apps_smmu: iommu@15000000 {