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arm64: dts: qcom: qdu1000: correct LLCC reg entries

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According to bindings and Linux driver there is no
"multi_channel_register" address space for LLCC.  The first "reg" entry
is supposed to be llcc0_base since commit 43aa006e07 ("dt-bindings:
arm: msm: Fix register regions used for LLCC banks"):

  qdu1000-idp.dtb: system-cache-controller@19200000: reg: [[0, 421527552, 0, 14155776], [0, 438304768, 0, 524288], [0, 572293416, 0, 4]] is too long
  qdu1000-idp.dtb: system-cache-controller@19200000: reg-names:0: 'llcc0_base' was expected
  qdu1000-idp.dtb: system-cache-controller@19200000: reg-names: ['llcc_base', 'llcc_broadcast_base', 'multi_channel_register'] is too long

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Mukesh Ojha <quic_mojha@quicinc.com>
Link: https://lore.kernel.org/r/20231107080417.16700-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Krzysztof Kozlowski 2023-11-07 09:04:16 +01:00 committed by Bjorn Andersson
parent 11fcb81373
commit b0e0290bc4
1 changed files with 3 additions and 5 deletions
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8
arch/arm64/boot/dts/qcom/qdu1000.dtsi
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@ -1446,11 +1446,9 @@ gem_noc: interconnect@19100000 {
system-cache-controller@19200000 { system-cache-controller@19200000 {
compatible = "qcom,qdu1000-llcc"; compatible = "qcom,qdu1000-llcc";
reg = <0 0x19200000 0 0xd80000>, reg = <0 0x19200000 0 0xd80000>,
<0 0x1a200000 0 0x80000>, <0 0x1a200000 0 0x80000>;
<0 0x221c8128 0 0x4>; reg-names = "llcc0_base",
reg-names = "llcc_base", "llcc_broadcast_base";
"llcc_broadcast_base",
"multi_channel_register";
interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>;
multi-ch-bit-off = <24 2>; multi-ch-bit-off = <24 2>;
}; };