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arm64: dts: qcom: qcs8300: add QCrypto nodes
Add the QCE and Crypto BAM DMA nodes. Signed-off-by: Yuvaraj Ranganathan <quic_yrangana@quicinc.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20241223110936.3428125-1-quic_yrangana@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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@ -736,6 +736,31 @@ ufs_mem_phy: phy@1d87000 {
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status = "disabled";
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status = "disabled";
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};
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};
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cryptobam: dma-controller@1dc4000 {
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compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
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reg = <0x0 0x01dc4000 0x0 0x28000>;
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interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <1>;
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qcom,ee = <0>;
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qcom,controlled-remotely;
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num-channels = <20>;
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qcom,num-ees = <4>;
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iommus = <&apps_smmu 0x480 0x00>,
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<&apps_smmu 0x481 0x00>;
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};
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crypto: crypto@1dfa000 {
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compatible = "qcom,qcs8300-qce", "qcom,qce";
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reg = <0x0 0x01dfa000 0x0 0x6000>;
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dmas = <&cryptobam 4>, <&cryptobam 5>;
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dma-names = "rx", "tx";
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iommus = <&apps_smmu 0x480 0x00>,
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<&apps_smmu 0x481 0x00>;
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interconnects = <&aggre2_noc MASTER_CRYPTO_CORE0 QCOM_ICC_TAG_ALWAYS
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&mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
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interconnect-names = "memory";
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};
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tcsr_mutex: hwlock@1f40000 {
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tcsr_mutex: hwlock@1f40000 {
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compatible = "qcom,tcsr-mutex";
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compatible = "qcom,tcsr-mutex";
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reg = <0x0 0x01f40000 0x0 0x20000>;
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reg = <0x0 0x01f40000 0x0 0x20000>;
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